rdi_rti_format.h

realview22.rar

/* -*-C-*-
 *
 * $Revision: 1.4.4.2.22.1 $
 *   $Author: gevans $
 *     $Date: 2002/05/09 15:53:02 $
 *
 * Copyright (c) ARM Limited 1998.  All rights reserved.
 *
 * rdi_rti_format.h - Trace extensions to RDI
 */


#ifndef __RDI_RTI_FORMAT_H__
#define __RDI_RTI_FORMAT_H__

#include "armtypes.h"
/* To allow this file to be used in Trace Components it should not pull in the rest of RDI */



#if defined(__cplusplus) && !defined(CLX_CPP_LINKAGE)
extern "C" {
#endif

/*
 * RDI_TraceBufferFormat defines the formats to be used by the trace buffer (TPA). 
 * It consists of a sequence of bitmasks.
 */

typedef uint32 RDI_TraceBufferFormat; 

/* RDI_TraceBufferFormat bitmasks */

#define RDI_TraceBufferWidth4           0x00000001ul /* 4 bit data */
#define RDI_TraceBufferWidth8           0x00000002ul /* 8 bit data */
#define RDI_TraceBufferWidth16          0x00000004ul /* 16 bit data */

#define RDI_TraceMultiplexed            0x00000008ul /* muliplexing on ETM/buffer link */
#define RDI_TraceDemultiplexed          0x00000010ul /* demultiplexing on ETM/buffer link */
#define RDI_TraceClockBothEdges         0x00000020ul /* clock data on both edges on ETM/buffer link */

#define RDI_TraceETM7_9_protocols       0x00000040ul /* Use ETM7/ETM9 protocol */
#define RDI_TraceETM10_protocols        0x00000080ul /* Use ETM10 protocol */

#define RDI_TraceTimestamp              0x00000100ul /* Use timestamps */

#define RDI_TraceXScale_protocols       0x00000200ul /* Use XScale on-chip trace protocol */

/*
 * Raw Trace Format - used by the ARMulator
 */

/*
 * Typedef:  RDITrace_Raw
 * Purpose:  A trace packet of raw, uncompressed, data.  Each Trace packet
 *           consists of some flag words, an address, and a data word (which
 *           may or may not be used).  The structure is designed to be packed
 *           into a three-word packet. The exact packing is host dependent.
 */
typedef struct
{
    unsigned8 size; /*
                     * When a single transaction is split into
                     * multiple events the size field is set for the
                     * first event of the transaction as the total
                     * number of events in the transaction. For
                     * example, a burst transfer resulting from an LDM
                     * instruction may consist of one instruction
                     * event followed by up to sixteen data
                     * events. Subsequent events of the same
                     * transaction are flagged with a size of zero.  A
                     * Target that does not implement this facility
                     * can set size to one for all transactions.
                     */
    unsigned8 type; /*
                     * Encodes the format of the packet. (Six types
                     * are currently defined.)
                     */
    unsigned16 flags;
                    /* A bit-mask of values which determine the interpretation
                     * to be placed on the rest of the packet.  
                     */
    ARMword address;
    ARMword data;
} RDITrace_Raw;

/*
 * Enumeration: Allowed values of RDITrace_Raw.type
 */
enum
{
    RDITrace_Raw_PacketError            = 0,
    RDITrace_Raw_PacketInstr            = 1,
    RDITrace_Raw_PacketMem              = 2,
    RDITrace_Raw_PacketMem_Data         = 3,
    RDITrace_Raw_PacketMem_Addr         = 4,
    RDITrace_Raw_PacketMem_DataAddr     = 5
};

/*
 * Error packets are used to specify an error in the trace. Flags
 * encodes an error field; address and data may be used to convey more
 * information in an error-specific way.
 *
 * Where an error packet indicates a failure to decode a single instruction
 * it may be followed by the packets for that instruction (and its count
 * will include these packets). Some of the fields of these packets should
 * be ignored.
 *
 * The following errors are defined:
 * Error       Description
 *
 *                  Errors codes indicating a break in the trace stream
 *                  ===================================================
 *
 * Stop                     Trace stops at this point. (This isn't necessarily the last
 *                          packet. It signals that the packets before and the packets
 *                          after are not sequential.)
 *
 * SynchronisationLost      Where a decompressor (for example, one that
 *                          decompresses ARM Compressed format) is generating
 *                          the uncompressed format, this error may be used to
 *                          indicate that decompression has failed.
 *
 * Overflow                 A particular case of SynchronisationLost where the
 *                          synchronisation has been lost because of an internal FIFO
 *                          overflow
 *
 * OutOfDebug               A particular case of a trace discontinuity, caused by the
 *                          processor coming out of debug state
 *
 * JavaState                The processor has been traced in Java state. At present the
 *                          decompressor is unable to decompress this. All trace is ignored
 *                          until the processor leaves Java state
 *
 * Empty Buffer             *XSCALE SPECIFIC* There was no data in the buffer that was passed
 *                          for decompression.
 *
 *              Other errors on instructions
 *              ============================
 *
 * BranchExpected           The trace stream indicated a branch, but the instruction
 *                          is not a branch - followed by all normal instruction and memory
 *                          packets
 *
 * UnexpectedIndirectBranch The instruction is an indirect branch, but the trace
 *                          stream did not indicate a branch - followed by all normal
 *                          instruction and memory packets
 *
 * InstructionNotRead       The decompressor could not read the memory containing the 
 *                          instruction - followed by an instruction packet only, ignore
 *                          instruction packet data
 *
 * NotConditional           The trace stream indicated that an unconditional instruction was
 *                          not executed - followed by all normal instruction and memory packets
 *
 * TooManyCheckpoints       *XSCALE SPECIFIC* Indicates that more than two checkpointed entries
 *                          were found in the buffer. The decompressor has attempted to use the
 *                          most recent entries
 *
 * UnexpectedBranch         Complement of BranchExpected, The current instuction is a branch but
 *                          the trace does not indicate one. note this can be output for
 *                          direct branches as well which UnexpectedIndirectBranch cannot.
 *
 * BranchAddressMismatch    *CURRENTLY XSCALE SPECIFIC* A branch address read from the the trace
 *                          and one calculated from disassembling an instruction disagreed.
 *
 *
 *              Errors on tracing data
 *              ======================    
 *
 * UnknownCPDT              The instruction being decompressed is a coprocessor data
 *                          transfer not recognised by the instruction decoder. As
 *                          a result the decompressor does not know how much data the
 *                          the instruction has, and loses data and data address 
 *                          synchronization. The data address is traced. 
 *                          Instruction decompression continues correctly.
 *
 * UnexpectedData           The trace stream contained data for an instruction that does not
 *                          access memory - followed by a memory address packet (if addresses
 *                          are traced),  but no data packets. Data and data address
 *                          synchronization are lost.Traced data and data addresses will be
 *                          ignored until data and data address synchronization are restored.
 * 
 * DataAddressUnknown       The decompressor could not determine the address of the data
 *                          associated with the instruction. No data packets are generated and
 *                          data and data address synchronization are lost.
 *                  
 * FIFOFULLCorruption       The decompressor has detected that the trace stream may be corrupt due
 *                          to the FIFOfull ETM erratum. No data packets are generated and
 *                          data and data address synchronization are lost.Traced data and data 
 *                          addresses will be ignored until data and data address synchronization
 *                          are restored.
 *
 * BadAddress               A traced data address is corrupt. Traced data and data addresses will be
 *                          ignored until data and data address synchronization are restored. Traced
 *                          data and data addresses will be ignored until data and data address
 *                          synchronization are restored.
 *
 * DataTruncated            The data for the instruction is not in the buffer. This can happen when
 *                          trace capture stops because it filled the buffer between the instruction
 *                          being traced and its data being traced. All available data addresses and
 *                          data will be traced.
 *
 * DataAddressSync          Data address synchronization has been restored.
 *
 * DataSync                 Data synchronization has been restored.
 *                       
 * Note that Stop, Overflow, and OutOfDebug error packets imply restoration of data and data address synchronization.
 */
#define RDITrace_Raw_ErrorPacket_Stop                       0
#define RDITrace_Raw_ErrorPacket_SynchronisationLost        1
#define RDITrace_Raw_ErrorPacket_UnknownCPDT                2
#define RDITrace_Raw_ErrorPacket_Overflow                   3
#define RDITrace_Raw_ErrorPacket_OutOfDebug                 4
#define RDITrace_Raw_ErrorPacket_BranchExpected             5
#define RDITrace_Raw_ErrorPacket_UnexpectedIndirectBranch   6
#define RDITrace_Raw_ErrorPacket_UnexpectedData             7
#define RDITrace_Raw_ErrorPacket_NotConditional             8
#define RDITrace_Raw_ErrorPacket_InstructionNotRead         9
#define RDITrace_Raw_ErrorPacket_DataAddressUnknown         10
#define RDITrace_Raw_ErrorPacket_FIFOFULLCorruption         11
#define RDITrace_Raw_ErrorPacket_BadAddress                 12
#define RDITrace_Raw_ErrorPacket_DataTruncated              13
#define RDITrace_Raw_ErrorPacket_DataAddressSync            14
#define RDITrace_Raw_ErrorPacket_DataSync                   15
#define RDITrace_Raw_ErrorPacket_JavaState                  16
#define RDITrace_Raw_ErrorPacket_EmptyBuffer                17
#define RDITrace_Raw_ErrorPacket_TooManyCheckpoints         18
#define RDITrace_Raw_ErrorPacket_UnexpectedBranch           19
#define RDITrace_Raw_ErrorPacket_BranchAddressMismatch      20



/*
 * Memory packets
 *
 * Memory packets form a sequence of cycles. The address and data fields
 * represent the values on the address and data busses for that cycle.
 * Note: Only PacketMem_DataAddr has both the address and data field set. 
 * PacketMem_Data only has a data field; PacketMem_Addr only has an address
 * field; PacketMem has neither.
 *
 * The following flags are set for memory packets:
 */