init.s

realview22.rar

;;  Copyright ARM Ltd 2004. All rights reserved.
;;
;;  This code initialises the Versatile board (eg REMAP) before calling
;;  TCM Initialization and MMU Initialization if they exist.
;;  this allows scatter loading to relocate code into the TCMs
;;
;;  This code must be run from a privileged mode

    PRESERVE8

; --- Standard definitions of mode bits and interrupt (I & F) flags in PSRs

Mode_USR        EQU     0x10
Mode_FIQ        EQU     0x11
Mode_IRQ        EQU     0x12
Mode_SVC        EQU     0x13
Mode_ABT        EQU     0x17
Mode_UND        EQU     0x1B
Mode_SYS        EQU     0x1F ; available on ARM Arch 4 and later

I_Bit           EQU     0x80 ; when I bit is set, IRQ is disabled
F_Bit           EQU     0x40 ; when F bit is set, FIQ is disabled


Len_FIQ_Stack    EQU     256
Len_IRQ_Stack    EQU     256
Len_UND_Stack    EQU     256

Offset_FIQ_Stack         EQU     0
Offset_IRQ_Stack         EQU     Offset_FIQ_Stack + Len_FIQ_Stack
Offset_UND_Stack         EQU     Offset_IRQ_Stack + Len_IRQ_Stack
Offset_SVC_Stack         EQU     Offset_UND_Stack + Len_UND_Stack

SC_BASE         EQU 0x101E0000
SC_CTRL         EQU 0x00
SC_REMAP        EQU 0x100
SC_1MHZ_TIMER   EQU 0x8000

        
        AREA   INIT, CODE, READONLY   ; name this block of code

        ENTRY

        EXPORT  Reset_Handler
Reset_Handler   FUNCTION

; --- Perform ROM/RAM remapping, if required
        IF :DEF: ROM_RAM_REMAP
        
; On reset, an aliased copy of ROM is at 0x0.
; Continue execution from 'real' ROM rather than aliased copy
        LDR     pc, =Instruct_2

Instruct_2
       
; Initialize MPMC so that we can use the SDRAM
        IMPORT  InitMPMCentry
        BL      InitMPMCentry
            
        ; Set the REMAP bit
        LDR     r8, =SC_BASE
        LDR     r6, [r8, #SC_CTRL]
        ORR     r6, r6, #SC_REMAP
        STR     r6, [r8, #SC_CTRL]
        
; SDRAM is now at 0x0.
; The exception vectors (in vectors.s) must be copied from ROM to the RAM
; The copying is done later by the C library code inside __main

        ENDIF
        
; --- Initialize stack pointer registers

        IMPORT ||Image$$STACKS$$ZI$$Limit||      ; Linker generated symbol pointing to stack base
        LDR     r0, =||Image$$STACKS$$ZI$$Limit||; STACKS$$Limit is used for stack_base as stack_base is above stack_limit in memory

; Enter each mode in turn and set up the stack pointer
        MSR     CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit
        SUB     sp, r0, #Offset_FIQ_Stack

        MSR     CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit
        SUB     sp, r0, #Offset_IRQ_Stack

        MSR     CPSR_c, #Mode_UND:OR:I_Bit:OR:F_Bit
        SUB     sp, r0, #Offset_UND_Stack

        MSR     CPSR_c, #Mode_SVC:OR:I_Bit:OR:F_Bit
        SUB     sp, r0, #Offset_SVC_Stack

; Leave core in SVC mode


        IMPORT  InitTCMentry [WEAK]         ; Import label to TCM init code, but don't fault if not present
        BL      InitTCMentry                ; ignore call if function not present

        IMPORT  InitMMUentry [WEAK]         ; Import label to MMU init code, but don't fault if not present
        BL      InitMMUentry                ; And execute it.


; Branch to C Library entry point

        IMPORT  __main                      ; before MMU enabled import label to __main
        LDR     r12,=__main                 ; save this in register for possible long jump
        
        BX      r12                         ; branch to __main
        ENDFUNC
   

        END                                 ; mark the end of this file