📄 inittcm.s
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;; Copyright ARM Ltd 2002. All rights reserved.
;;
;; This code initialises the TCMs before calling __main
;; this allows scatter loading to relocate code into the TCMs
;;
;; This code must be run from a privileged mode
; --- Standard definitions of mode bits and interrupt (I & F) flags in PSRs
Mode_USR EQU 0x10
Mode_FIQ EQU 0x11
Mode_IRQ EQU 0x12
Mode_SVC EQU 0x13
Mode_ABT EQU 0x17
Mode_UND EQU 0x1B
Mode_SYS EQU 0x1F ; available on ARM Arch 4 and later
I_Bit EQU 0x80 ; when I bit is set, IRQ is disabled
F_Bit EQU 0x40 ; when F bit is set, FIQ is disabled
EXPORT InitTCM
AREA INIT966TCM, CODE, READONLY
ENTRY
InitTCM FUNCTION
IMPORT ||Image$$STACKS$$ZI$$Limit|| ; defined by linker and located by scatter file
LDR SP, =||Image$$STACKS$$ZI$$Limit||
;
;Next block sets the TCMs base and size registers to their actual size
;Note actual size should be contained in the register by default.
;
;
;;TCM Configuration
;==================
;
; Set global core configurations
;===============================
;
MRC p15, 0, r0, c1, c0, 0 ; read CP15 register 1 into r0
IF :DEF: TCM
ORR r0, r0, #(0x1 <<12) ; enable I-TCM
ORR r0, r0, #(0x1 <<2) ; enable D-TCM
ELSE
BIC r0, r0, #(0x1 <<12) ; Don't enable I-TCM
BIC r0, r0, #(0x1 <<2) ; Don't enable D-TCM
ENDIF
MCR p15, 0, r0, c1, c0, 0 ; write cp15 register 1
;
;
IMPORT __main
; --- Now enter the C code
B __main ; note use B not BL, because an application will never return this way
ENDFUNC
END
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