vpb926ej-s.bcd

realview22.rar

  }:Register_enum.E_GXIPAGESIZE={\
    names="2K,4K,8K,16K"\
  }:Register_enum.E_IRQFIQ={\
    names="IRQ,FIQ"\
  }:Register_enum.E_AHB1AHB2={\
    names="AHB1,AHB2"\
  }:Register_enum.E_DMASIZE={\
    names="1,4,8,16,32,64,128,256"\
  }:Register_enum.E_DMAWIDTH={\
    names="Byte,Halfword,Word,Reserved,Reserved,Reserved,Reserved,Reserved"\
  }:Register_enum.E_USERPRIV={\
    names="User Mode,Priveleged Mode"\
  }:Register_enum.E_NONBUFFBUFF={\
    names="Non Bufferable,Bufferable"\
  }:Register_enum.E_NONCACHECACHE={\
    names="Non Cacheable,Cacheable"\
  }:Register_enum.E_NODATADATA={\
    names="No Data,Data"\
  }:Register_enum.E_DMAFLOWCTRL={\
    names="Primcell DMA - Mem to Mem,Primcell - Mem to Periph,Primecell - Periph to Mem,Primecell - Src Periph to Dest Periph,Destination - Src Periph to Dest Periph,Peripheral - Mem to Periph,Peripheral - Periph to Mem,Source - Src Periph to Dest Periph"\
  }:Register_enum.E_SMBCRRBLE={\
    names="nSMBLS[3:0]=0,nSMBLS[3:0]=1"\
  }:Register_enum.E_SMBCRMW={\
    names="8 bit,16 bit,32 bit,Reserved"\
  }:Register_enum.E_NONBURSTBURST={\
    names="Non Burst,Burst"\
  }:Register_enum.E_SMBCRBURSTLEN={\
    names="4 bit,8 bit,16 bit,Continuous"\
  }:Register_enum.E_HIGHACTIVE={\
    names="Always High,Signal Active"\
  }:Register_enum.E_NOERRORERROR={\
    names="No Error,Error"\
  }:Register_enum.E_NORMALLOW={\
    names="Normal,Low-Power"\
  }:Register_enum.E_NORMALSELF={\
    names="Normal,Self-refresh"\
  }:Register_enum.E_POWERHIGH={\
    names="Power Saving,Always Enabled"\
  }:Register_enum.E_STOPRUN={\
    names="Stopped,Run"\
  }:Register_enum.E_SDRAMINIT={\
    names="SDRAM NORMAL,SDRAM MODE,SDRAM PALL,SDRAM NOP"\
  }:Register_enum.E_DLLCALIBRATION={\
    names="Calibrating,Calibration Complete"\
  }:Register_enum.E_LOWPOWERSDRAM={\
    names="Normal,Enter Deep Sleep"\
  }:Register_enum.E_NORMALHIGH={\
    names="Normal,High"\
  }:Register_enum.E_SDRSDRAMREAD={\
    names="Delayed using MPMCCLKOUT,Delayed using MPMCCLKDELAY,Delayed plus one clock using MPMCCLKDELAY,Delayed plus two clocks using MPMCCLKDELAY"\
  }:Register_enum.E_NEGPOS={\
    names="Negative,Positive"\
  }:Register_enum.E_MPMCMEMDEVICE={\
    names="SDR_SDRAM,SDR SynchFlash,Low-Power SDR_SDRAM,SDR V-SynchFlash,DDR-SDRAM,DDR SynchFlash,Low-Power DDR_SDRAM,,DDR V-SynchFlash"\
  }:Register_enum.E_NOTPROTECTPROTECT={\
    names="Not Protected,Protected"\
  }:Register_enum.E_CASLATENCY={\
    names="Reserved,0.5,1,1.5,2,2.5,3,3.5,4,4.5,5,5.5,6,6.5,7,7.5"\
  }:Register_enum.E_MPMCSTATICMW={\
    names="8 bit,16 bit,32 bit,Reserved"\
  }:Register_enum.E_HIGHLOW={\
    names="High,Low"\
  }:Register_enum.E_UNLOCKED_LOCKED={\
    names="Unlocked,Locked"\
  }:Register_enum.E_CFGBOOTDYDEVICE={\
    names="SDR SDRAM,SDR Micron SyncFlash,low power SDR SDRAM,SDR VsyncFlash"\
  }:Register_enum.E_CFGBOOTDYCASDEL={\
    names="Rsvd,1 cycle delay,2 cycle delay,3 cycle delay,4 cycle delay,5 cycle delay,6 cycle delay,7 cycle delay"\
  }:Register_enum.E_CFGDATA2_VINITHI={\
    names="at 0x0,at 0xFFFF0000"\
  }:Register_enum.E_SMCMPMC={\
    names="SMC,MPMC"\
  }:Register_enum.E_CFGDATA2_CFGREMAPSTEXEN={\
    names="Static at 0x0,Expansion at 0x0"\
  }:Register_enum.E_CGDATA2_CFGREMAPDYEXEN={\
    names="Dynamic at 0x0,Expansion at 0x0"\
  }:Register_enum.E_1234={\
    names="1,2,3,4"\
  }:Register_enum.E_12345678={\
    names="1,2,3,4,5,6,7,8"\
  }:Register.default={\
    bit_fields.default={}\
  }:Concat_Register.default={\
  }:Concat_Register.C_FPGAREMAPBITS={\
    low_name="G_SYS_BOOTCS":low_shift=0x0:low_mask=0x3:high_name="G_BRD_SYS_MISC":\
    high_shift=0x0:high_mask=0x4:length=4:\
    gui_name="FPGA Remap Bits"\
  }:Concat_Register.C_REMAPBITS={\
    low_name="C_FPGAREMAPBITS":low_shift=0x0:low_mask=0x7:high_name="G_SCCTRL":\
    high_shift=0x6:high_mask=0x8:length=4:\
    gui_name="FPGA and DevChip Remap Bits"\
  }:Peripherals.default={\
    Register.default={\
    bit_fields.default={}\
    }\
  }:Peripherals.SYSREGS={\
    base=M_BRD_SYS_REGS:description="System Registers":\
    Register.G_BRD_SYS_ID={\
    gui_name="System ID":read_only=TRUE:start=0x10000000:\
    length=4:\
      bit_fields.B_REV_A={\
      gui_name="Rev":read_only=TRUE:\
      position=0:size=4\
      }:bit_fields.B_BUILD_A={\
      gui_name="Build":read_only=TRUE:\
      position=4:size=8\
      }:bit_fields.B_FPGA_A={\
      gui_name="FPGA":read_only=TRUE:\
      position=12:size=4\
      }:bit_fields.B_ARCH_A={\
      gui_name="Arch.":read_only=TRUE:\
      position=16:size=8\
      }:bit_fields.B_MAN_A={\
      gui_name="Man.":read_only=TRUE:\
      position=24:size=8\
    }\
    }:Register.G_BRD_SYS_SW={\
    gui_name="Switches":read_only=TRUE:start=0x10000004:\
    length=4:\
      bit_fields.B_SYS_SW={\
      gui_name="Switches":read_only=TRUE:\
      position=0:size=8\
    }\
    }:Register.G_BRD_SYS_LED={\
    gui_name="LEDs":start=0x10000008:\
    length=4:\
      bit_fields.B_SYS_LED={\
      gui_name="LEDs":\
      position=0:size=8\
    }\
    }:Register.G_BRD_SYS_OSC0={\
    gui_name="Oscillator 0":start=0x1000000C:\
    length=4:\
      bit_fields.B_OSC0_R={\
      gui_name="OSC0 R":\
      position=0:size=7\
      }:bit_fields.B_OSC0_V={\
      gui_name="OSC0 V":\
      position=7:size=9\
      }:bit_fields.B_OSC0_S={\
      gui_name="OSC0 S":enum=E_OSC_S:\
      position=16:size=3\
    }\
    }:Register.G_BRD_SYS_OSC1={\
    gui_name="Oscillator 1":start=0x10000010:\
    length=4:\
      bit_fields.B_OSC1_R={\
      gui_name="OSC1 R":\
      position=0:size=7\
      }:bit_fields.B_OSC1_V={\
      gui_name="OSC1 V":\
      position=7:size=9\
      }:bit_fields.B_OSC1_S={\
      gui_name="OSC1 S":enum=E_OSC_S:\
      position=16:size=3\
    }\
    }:Register.G_BRD_SYS_OSC2={\
    gui_name="Oscillator 2":start=0x10000014:\
    length=4:\
      bit_fields.B_OSC2_R={\
      gui_name="OSC2 R":\
      position=0:size=7\
      }:bit_fields.B_OSC2_V={\
      gui_name="OSC2 V":\
      position=7:size=9\
      }:bit_fields.B_OSC2_S={\
      gui_name="OSC2 S":enum=E_OSC_S:\
      position=16:size=3\
    }\
    }:Register.G_BRD_SYS_OSC3={\
    gui_name="Oscillator 3":start=0x10000018:\
    length=4:\
      bit_fields.B_OSC3_R={\
      gui_name="OSC3 R":\
      position=0:size=7\
      }:bit_fields.B_OSC3_V={\
      gui_name="OSC3 V":\
      position=7:size=9\
      }:bit_fields.B_OSC3_S={\
      gui_name="OSC3 S":enum=E_OSC_S:\
      position=16:size=3\
    }\
    }:Register.G_BRD_SYS_OSC4={\
    gui_name="Oscillator 4":start=0x1000001C:\
    length=4:\
      bit_fields.B_OSC4_R={\
      gui_name="OSC4 R":\
      position=0:size=7\
      }:bit_fields.B_OSC4_V={\
      gui_name="OSC4 V":\
      position=7:size=9\
      }:bit_fields.B_OSC4_S={\
      gui_name="OSC4 S":enum=E_OSC_S:\
      position=16:size=3\
    }\
    }:Register.G_BRD_SYS_LOCK={\
    gui_name="Lock":start=0x10000020:\
    length=4:\
      bit_fields.B_BRD_SYS_LOCK={\
      gui_name="Lock Value":\
      position=0:size=16\
      }:bit_fields.B_BRD_SYS_LOCKED={\
      gui_name="Locked":read_only=TRUE:enum=E_UNLOCKED_LOCKED:\
      position=16:size=1\
    }\
    }:Register.G_BRD_SYS_100HZ={\
    gui_name="100Hz Counter":read_only=TRUE:start=0x10000024:\
    length=4:\
      bit_fields.default={}\
    }:Register.G_BRD_SYS_CFGDATA1={\
    gui_name="CFGDATA1":start=0x10000028:\
    length=4:\
      bit_fields.B_BRD_SYS_CFGDATA1_CFGBOOTDYDEVICE={\
      gui_name="Boot Device":enum=E_CFGBOOTDYDEVICE:\
      position=0:size=2\
      }:bit_fields.B_BRD_SYS_CFGDATA1_CFGBOOTDYCASDEL={\
      gui_name="Memory Control":enum=E_CFGBOOTDYCASDEL:\
      position=2:size=3\
      }:bit_fields.B_BRD_SYS_CFGDATA1_CFGBOOTDYADRMAP={\
      gui_name="Address Map for Micron SyncFlash":\
      position=5:size=8\
      }:bit_fields.B_BRD_SYS_CFGDATA1_CFGBOOTDYSDRDLY={\
      gui_name="SDR data capture clocking scheme":\
      position=13:size=2\
      }:bit_fields.B_BRD_SYS_CFGDATA1_CFGBOOTDYSDRPOL={\
      gui_name="MPMC flip-flop polarity":\
      position=15:size=1\
    }\
    }:Register.G_BRD_SYS_CFGDATA2={\
    gui_name="CFGDATA2":start=0x1000002C:\
    length=4:\
      bit_fields.B_BRD_SYS_CFDATA2_VINITHI={\
      gui_name="Reset location of Vectors":enum=E_CFGDATA2_VINITHI:\
      position=0:size=1\
      }:bit_fields.B_BRD_SYS_CFGDATA2_BIGENDINIT={\
      gui_name="Endianess":enum=E_LITTLEBIG:\
      position=1:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGFPENABLE={\
      gui_name="Copro Enable":enum=E_OFFON:\
      position=2:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGMPMCnSMC={\
      gui_name="Memory Controller Select":enum=E_SMCMPMC:\
      position=3:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGREMAPSTEXEN={\
      gui_name="Static/Exp Memory Alias":enum=E_CFGDATA2_CFGREMAPSTEXEN:\
      position=4:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGREMAPDYEXEN={\
      gui_name="Dynamic/Exp Memory Alias":enum=E_CGDATA2_CFGREMAPDYEXEN:\
      position=5:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGBRIDGEMEMMAP={\
      gui_name="AMBA Bridge Mapping":\
      position=6:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGBOOTMEMWIDTH={\
      gui_name="Boot Memory width":enum=E_SMBCRMW:\
      position=7:size=2\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGBOOTCSPOL={\
      gui_name="Static CS Polarity":enum=E_LOWHIGH:\
      position=9:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGUSEPLL={\
      gui_name="PLL Clocks AMBA subsystem":enum=E_DISABLEENABLE:\
      position=10:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGPLLBYPASS={\
      gui_name="PLL Bypassed. XTALCLKEXT clocks AMBA subsystem":enum=E_DISABLEENABLE:\
      position=11:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGPLLSHORTFB={\
      gui_name="Remove PLL Clock tree delay":enum=E_DISABLEENABLE:\
      position=12:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGHCLKDIVSEL={\
      gui_name="CPUCLK to HCLK divide ratio":enum=E_1234:\
      position=13:size=2\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGHCLKEXTDIVSEL={\
      gui_name="HCLK to HCLKEXT divide ratio":enum=E_12345678:\
      position=15:size=3\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGMBXCLKDIVSEL={\
      gui_name="HCLK to MXCLK divide ratio":enum=E_1234:\
      position=18:size=2\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGSMCCLKDIVSEL={\
      gui_name="HCLK to SMCLK divide ratio":enum=E_1234:\
      position=20:size=2\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGAHBM1ASYNC={\
      gui_name="Off chip bridge 1 async":enum=E_DISABLEENABLE:\
      position=22:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGAHMM2ASYNC={\
      gui_name="Off chip bridge 2 async":enum=E_DISABLEENABLE:\
      position=23:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGAHBASYNC={\
      gui_name="On chip bridge async":enum=E_DISABLEENABLE:\
      position=24:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGAHBPASST={\
      gui_name="Off and On chip bridges in pass through":enum=E_DISABLEENABLE:\
      position=25:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGINCROVERRIDEM1={\
      gui_name="Off chip AHB bridge 1 Override burst transfer":enum=E_DISABLEENABLE:\
      position=26:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGINCROVERRIDEM2={\
      gui_name="Off chip AHB bridge 2 Override burst transfer":enum=E_DISABLEENABLE:\
      position=27:size=1\
      }:bit_fields.B_BRD_SYSCFGDATA2_CFGINCROVERRIDES={\
      gui_name="Off chip AHB slave bridge Override burst transfer":enum=E_DISABLEENABLE:\
      position=28:size=1\
    }\
    }:Register.G_BRD_SYS_FLAGS={\
    gui_name="Flags Read/Set":start=0x10000030:\
    length=4:\
      bit_fields.default={}\
    }:Register.G_BRD_SYS_FLAGSCLR={\
    gui_name="Flags Clear":start=0x10000034:\
    length=4:\
      bit_fields.default={}\
    }:Register.G_BRD_NVFLAGS={\
    gui_name="NVFLAGS Read/Set":start=0x10000038:\
    length=4:\
      bit_fields.default={}\
    }:Register.G_BRD_NVFLAGSCLR={\
    gui_name="NVFLAGS Clear":start=0x1000003C:\
    length=4:\
      bit_fields.default={}\
    }:Register.G_BRD_RESETCTL={\
    gui_name="Reset Controller":start=0x10000040:\
    length=4:\
      bit_fields.B_RESET_DPTH={\
      gui_name="Reset Depth":enum=E_RST_DEPTH:\
      position=0:size=3\
      }:bit_fields.B_SFT_RST={\
      gui_name="Soft Reset":\
      position=8:size=1\
    }\
    }:Register.G_BRD_PCICTL={\
    gui_name="PCI Control":start=0x10000044:\
    length=4:\
      bit_fields.B_PCIDETECT={\
      gui_name="PCI Detect":enum=E_PRESnPRES:\
      position=0:size=1\
    }\
    }:Register.G_BRD_SYS_MCI={\
    gui_name="MCI Control":start=0x10000048:\
    length=4:\
      bit_fields.B_CARD_DETECT0={\
      gui_name="Card Detect0":read_only=TRUE:\
      position=0:size=1\
      }:bit_fields.B_CARD_DETECT1={\
      gui_name="Card Detect1":read_only=TRUE:\
      position=1:size=1\
      }:bit_fields.B_WRITE_PROTECT0={\
      gui_name="Write Protect0":read_only=TRUE:\
      position=2:size=1\
      }:bit_fields.B_WRITE_PROTECT1={\
      gui_name="Write Protect1":read_only=TRUE:\
      position=3:size=1\
    }\
    }:Register.G_BRD_SYS_FLASH={\
    gui_name="Flash Write Protect":start=0x1000004C:\
    length=4:\
      bit_fields.B_FLWEN={\
      gui_name="Flash Write Enable":enum=E_DISABLEENABLE:\
      position=0:size=1\
    }\
    }:Register.G_BRD_SYS_CLCD={\
    gui_name="LCD Adaptor Board Control":start=0x10000050:\
    length=4:\
      bit_fields.B_LCD_MUX={\
      gui_name="LCD Mode":enum=E_LCDMODE:\
      position=0:size=2\
      }:bit_fields.B_LCDIOON={\
      gui_name="LCDIOON":enum=E_OFFON:\
      position=2:size=1\
      }:bit_fields.B_VDDPOSSWITCH={\
      gui_name="VDDPOSSWITCH":enum=E_OFFON:\
      position=3:size=1\
      }:bit_fields.B_PWR3V5VSWITCH={\
      gui_name="PWR3V5VSWITCH":enum=E_OFFON:\
      position=4:size=1\
      }:bit_fields.B_VDDNEGSWITCH={\
      gui_name="VDDNEGSWITCH":enum=E_OFFON:\
      position=5:size=1\
      }:bit_fields.B_TOUCHSELECT={\