eval7t.bcd

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# EVAL7T.BCD file. This file contains the board definition for the
# ARM Evaluator7T platform
#
# Copyright 2001-2003 ARM Limited.
[CHIP=KS32C50100] 
Advanced_Information.KS32C50100={\
  Memory_block.System={\
    start=0x3FF0000:length=0x10000:description="System Special Registers":\
        Attributes.internal=True:Attributes.access_size=4\
  }:Memory_block.I_SRAM={\
    start=0x3FF0000:length=0x2000:description="Internal SRAM":\
        Attributes.internal=True\
  }:Map_rule.default={}:Register_enum.Dis_Enab={\
    names="Dis,Enab"\
  }:Register_enum.CacheModes={\
    names="4K/4K,0K/8K,8K/0K,undef."\
  }:Register_enum.ProductIDs={\
    names="KS32C5000,KS32C50100"\
  }:Register_enum.SyncModes={\
    names="EDO,Sync"\
  }:Register_enum.BusWidths={\
    names="Dis,Byte,16Bits,32Bits"\
  }:Register_enum.PMC={\
    names="Norm,4Word,8Word,16Word"\
  }:Register_enum.tPA={\
    names="5cyc,2cyc,3cyc,4cyc"\
  }:Register_enum.tACC={\
    names="Dis,2cyc,3cyc,4cyc,5cyc,6cyc,7cyc,Resv"\
  }:Register_enum.MuxBus={\
    names="1Mclk,2Mclk,4Mclk,Resv"\
  }:Register_enum.Cycles={\
    names="0cyc,1cyc,2cyc,3cyc,4cyc,5cyc,6cyc,7cyc"\
  }:Register_enum.EDO={\
    names="FPM,EDO"\
  }:Register_enum.CAS={\
    names="1cyc,2cyc,3cyc,4cyc"\
  }:Register_enum.PRECHG={\
    names="1cyc,2cyc"\
  }:Register_enum.RAS={\
    names="1cyc,2cyc"\
  }:Register_enum.COL={\
    names="8-bits,9-bits,10-bits,11-bits"\
  }:Register_enum.CASHOLD={\
    names="1cyc,2cyc,3cyc,4cyc,5cyc,(6cyc),resv,resv"\
  }:Register_enum.INC={\
    names="..,++"\
  }:Register_enum.Walign={\
    names="No Invalid,1 invalid,2 invalid,3 invalid"\
  }:Register_enum.Reset={\
    names="ok,RST"\
  }:Register_enum.StartLvl={\
    names="none,1/8,2/8,3/8,4/8,5/8,6/8,7/8"\
  }:Register_enum.ONEBIT={\
    names="0,1"\
  }:Register.default={\
    bit_fields.default={}\
  }:Concat_Register.default={}:Peripherals.SysManager={\
    start=0x0000:base=System:Register.SYSCFG={\
      start=0x0000:length=4:base=Peripheral_start:bit_fields.SE={\
        enum=Dis_Enab:gui_name="Stall"\
      }:bit_fields.CE={\
        position=1:enum=Dis_Enab:gui_name="Cache"\
      }:bit_fields.WE={\
        position=2:enum=Dis_Enab:gui_name="WriteBuffer"\
      }:bit_fields.CM={\
        position=4:size=2:enum=CacheModes:gui_name="Cache"\
      }:bit_fields.SRAMBase={\
        position=6:size=10:gui_name="Mode"\
      }:bit_fields.RegBankPtr={\
        position=16:size=10:gui_name="RegBank"\
      }:bit_fields.PD_ID={\
        position=26:size=4:enum=ProductIDs:read_only=True:gui_name="ID"\
      }:bit_fields.DMODE={\
        position=31:enum=SyncModes\
      }\
    }:Register.CLKCON={\
      start=0x3000:length=4:base=Peripheral_start:bit_fields.ClkDiv={\
        position=0:size=16\
      }:bit_fields.ROMB5EN={\
        position=16:enum=Dis_Enab:gui_name="Bank5Wait"\
      }:bit_fields.ROMB5ADEN={\
        position=17:enum=Dis_Enab:gui_name="Bank5 A/D Mux"\
      }:bit_fields.MuxBusAddr={\
        position=18:size=2:enum=MuxBus:gui_name="MuxCycl"\
      }:bit_fields.Test={\
        position=31\
      }\
    }:Register.EXTACON0={\
      start=0x3008:length=4:base=Peripheral_start:bit_fields.TCOS0={\
        size=3:enum=Cycles\
      }:bit_fields.TACS0={\
        position=3:size=3:enum=Cycles\
      }:bit_fields.TCOH0={\
        position=6:size=3:enum=Cycles\
      }:bit_fields.TACC0={\
        position=9:size=3:enum=Cycles\
      }:bit_fields.TCOS1={\
        position=16:size=3:enum=Cycles\
      }:bit_fields.TACS1={\
        position=19:size=3:enum=Cycles\
      }:bit_fields.TCOH1={\
        position=22:size=3:enum=Cycles\
      }:bit_fields.TACC1={\
        position=25:size=3:enum=Cycles\
      }\
    }:Register.EXTACON1={\
      start=0x300C:length=4:base=Peripheral_start:bit_fields.TCOS2={\
        size=3:enum=Cycles\
      }:bit_fields.TACS2={\
        position=3:size=3:enum=Cycles\
      }:bit_fields.TCOH2={\
        position=6:size=3:enum=Cycles\
      }:bit_fields.TACC2={\
        position=9:size=3:enum=Cycles\
      }:bit_fields.TCOS3={\
        position=16:size=3:enum=Cycles\
      }:bit_fields.TACS3={\
        position=19:size=3:enum=Cycles\
      }:bit_fields.TCOH3={\
        position=22:size=3:enum=Cycles\
      }:bit_fields.TACC3={\
        position=25:size=3:enum=Cycles\
      }\
    }:Register.EXTDBWTH={\
      start=0x3010:length=4:base=Peripheral_start:bit_fields.DSR0={\
        size=2:enum=BusWidths\
      }:bit_fields.DSR1={\
        position=2:size=2:enum=BusWidths\
      }:bit_fields.DSR2={\
        position=4:size=2:enum=BusWidths\
      }:bit_fields.DSR3={\
        position=6:size=2:enum=BusWidths\
      }:bit_fields.DSR4={\
        position=8:size=2:enum=BusWidths\
      }:bit_fields.DSR5={\
        position=10:size=2:enum=BusWidths\
      }:bit_fields.DSD0={\
        position=12:size=2:enum=BusWidths\
      }:bit_fields.DSD1={\
        position=14:size=2:enum=BusWidths\
      }:bit_fields.DSD2={\
        position=16:size=2:enum=BusWidths\
      }:bit_fields.DSD3={\
        position=18:size=2:enum=BusWidths\
      }:bit_fields.DSX0={\
        position=20:size=2:enum=BusWidths\
      }:bit_fields.DSX1={\
        position=22:size=2:enum=BusWidths\
      }:bit_fields.DSX2={\
        position=24:size=2:enum=BusWidths\
      }:bit_fields.DSX3={\
        position=26:size=2:enum=BusWidths\
      }\
    }:Register.ROMCON0={\
      start=0x3014:length=4:base=Peripheral_start:bit_fields.RPMC0={\
        size=2:enum=PMC:gui_name="PMC"\
      }:bit_fields.RTPA0={\
        position=2:size=2:enum=tPA:gui_name="TPA"\
      }:bit_fields.RTACC0={\
        position=4:size=3:enum=tACC:gui_name="TACC"\
      }:bit_fields.RBase0={\
        position=10:size=10:gui_name="Base"\
      }:bit_fields.REND0={\
        position=20:size=10:gui_name="End"\
      }\
    }:Register.ROMCON1={\
      start=0x3018:length=4:base=Peripheral_start:bit_fields.RPMC1={\
        size=2:enum=PMC:gui_name="PMC"\
      }:bit_fields.RTPA1={\
        position=2:size=2:enum=tPA:gui_name="TPA"\
      }:bit_fields.RTACC1={\
        position=4:size=3:enum=tACC:gui_name="TACC"\
      }:bit_fields.RBase1={\
        position=10:size=10:gui_name="Base"\
      }:bit_fields.REND1={\
        position=20:size=10:gui_name="End"\
      }\
    }:Register.ROMCON2={\
      start=0x301C:length=4:base=Peripheral_start:bit_fields.RPMC2={\
        size=2:enum=PMC:gui_name="PMC"\
      }:bit_fields.RTPA2={\
        position=2:size=2:enum=tPA:gui_name="TPA"\
      }:bit_fields.RTACC2={\
        position=4:size=3:enum=tACC:gui_name="TACC"\
      }:bit_fields.RBase2={\
        position=10:size=10:gui_name="Base"\
      }:bit_fields.REND2={\
        position=20:size=10:gui_name="End"\
      }\
    }:Register.ROMCON3={\
      start=0x3020:length=4:base=Peripheral_start:bit_fields.RPMC3={\
        size=2:enum=PMC:gui_name="PMC"\
      }:bit_fields.RTPA3={\
        position=2:size=2:enum=tPA:gui_name="TPA"\
      }:bit_fields.RTACC3={\
        position=4:size=3:enum=tACC:gui_name="TACC"\
      }:bit_fields.RBase3={\
        position=10:size=10:gui_name="Base"\
      }:bit_fields.REND3={\
        position=20:size=10:gui_name="End"\
      }\
    }:Register.ROMCON4={\
      start=0x3024:length=4:base=Peripheral_start:bit_fields.RPMC4={\
        size=2:enum=PMC:gui_name="PMC"\
      }:bit_fields.RTPA4={\
        position=2:size=2:enum=tPA:gui_name="TPA"\
      }:bit_fields.RTACC4={\
        position=4:size=3:enum=tACC:gui_name="TACC"\
      }:bit_fields.RBase4={\
        position=10:size=10:gui_name="Base"\
      }:bit_fields.REND4={\
        position=20:size=10:gui_name="End"\
      }\
    }:Register.ROMCON5={\
      start=0x3028:length=4:base=Peripheral_start:bit_fields.RPMC5={\
        size=2:enum=PMC:gui_name="PMC"\
      }:bit_fields.RTPA5={\
        position=2:size=2:enum=tPA:gui_name="TPA"\
      }:bit_fields.RTACC5={\
        position=4:size=3:enum=tACC:gui_name="TACC"\
      }:bit_fields.RBase5={\
        position=10:size=10:gui_name="Base"\
      }:bit_fields.REND5={\
        position=20:size=10:gui_name="End"\
      }\
    }:Register.DRAMCON0={\
      start=0x302C:length=4:base=Peripheral_start:bit_fields.DEDO0={\
        position=0:enum=EDO:gui_name="EDO"\
      }:bit_fields.DTCS0={\
        position=1:size=2:enum=CAS:gui_name="TCS"\
      }:bit_fields.DTCP0={\
        position=3:enum=PRECHG:gui_name="TCP"\
      }:bit_fields.DTRC0={\
        position=7:enum=RAS:gui_name="TRC"\
      }:bit_fields.DTRP0={\
        position=8:size=2:enum=PRECHG:gui_name="TRP"\
      }:bit_fields.DBASE0={\
        position=10:size=10:gui_name="Base"\
      }:bit_fields.DEND0={\
        position=20:size=10:gui_name="End"\
      }:bit_fields.DCAN0={\
        position=30:size=2:enum=COL:gui_name="Col"\
      }\
    }:Register.DRAMCON1={\
      start=0x3030:length=4:base=Peripheral_start:bit_fields.DEDO1={\
        position=0:enum=EDO:gui_name="EDO"\
      }:bit_fields.DTCS1={\
        position=1:size=2:enum=CAS:gui_name="TCS"\
      }:bit_fields.DTCP1={\
        position=3:enum=PRECHG:gui_name="TCP"\
      }:bit_fields.DTRC1={\
        position=7:enum=RAS:gui_name="TRC"\
      }:bit_fields.DTRP1={\
        position=8:size=2:enum=PRECHG:gui_name="TRP"\
      }:bit_fields.DBASE1={\
        position=10:size=10:gui_name="Base"\
      }:bit_fields.DEND1={\
        position=20:size=10:gui_name="End"\
      }:bit_fields.DCAN1={\
        position=30:size=2:enum=COL:gui_name="Col"\
      }\
    }:Register.DRAMCON2={\
      start=0x3034:length=4:base=Peripheral_start:bit_fields.DEDO2={\
        position=0:enum=EDO:gui_name="EDO"\
      }:bit_fields.DTCS2={\
        position=1:size=2:enum=CAS:gui_name="TCS"\
      }:bit_fields.DTCP2={\
        position=3:enum=PRECHG:gui_name="TCP"\
      }:bit_fields.DTRC2={\
        position=7:enum=RAS:gui_name="TRC"\
      }:bit_fields.DTRP2={\
        position=8:size=2:enum=PRECHG:gui_name="TRP"\
      }:bit_fields.DBASE2={\
        position=10:size=10:gui_name="Base"\
      }:bit_fields.DEND2={\
        position=20:size=10:gui_name="End"\
      }:bit_fields.DCAN2={\
        position=30:size=2:enum=COL:gui_name="Col"\
      }\
    }:Register.DRAMCON3={\
      start=0x3038:length=4:base=Peripheral_start:bit_fields.DEDO3={\
        position=0:enum=EDO:gui_name="EDO"\
      }:bit_fields.DTCS3={\
        position=1:size=2:enum=CAS:gui_name="TCS"\
      }:bit_fields.DTCP3={\
        position=3:enum=PRECHG:gui_name="TCP"\
      }:bit_fields.DTRC3={\
        position=7:enum=RAS:gui_name="TRC"\
      }:bit_fields.DTRP3={\
        position=8:size=2:enum=PRECHG:gui_name="TRP"\
      }:bit_fields.DBASE3={\
        position=10:size=10:gui_name="Base"\
      }:bit_fields.DEND3={\
        position=20:size=10:gui_name="End"\
      }:bit_fields.DCAN3={\
        position=30:size=2:enum=COL:gui_name="Col"\
      }\
    }:Register.REFEXTCON={\
      start=0x303C:length=4:base=Peripheral_start:bit_fields.EBASE={\
        size=10:gui_name="Base"\
      }:bit_fields.VSF={\
        position=15:gui_name="Validity"\
      }:bit_fields.REN={\
        position=16:enum=Dis_Enab:gui_name="Refresh"\
      }:bit_fields.TCHR={\
        position=17:size=3:enum=CASHOLD:gui_name="CAS hold"\
      }:bit_fields.TCSR={\
        position=20:enum=RAS:gui_name="CAS setup"\
      }:bit_fields.RCOUNT={\
        position=21:size=11:gui_name="RefrCount"\
      }\
    }\
  }:Peripherals.BDMA={\
    start=0x0000:base=System:Register.BDMATXCON={\
      start=0x9000:length=4:bit_fields.BTxBRST={\
        size=5:enum=Reset\
      }:bit_fields.BTxSTSKO={\
        position=5:size=1:enum=Dis_Enab\
      }:bit_fields.BTxCCPIE={\
        position=7:enum=Dis_Enab\
      }:bit_fields.BTxNLIE={\
        position=8:enum=Dis_Enab\
      }:bit_fields.BTxNOIE={\
        position=9:enum=Dis_Enab\
      }:bit_fields.BTxEmpty={\
        position=10:enum=Dis_Enab\
      }:bit_fields.BTxMSL={\
        position=11:size=3:enum=StartLvl\
      }:bit_fields.BTxEN={\
        position=14:enum=Dis_Enab\
      }:bit_fields.BTxRS={\
        position=15:enum=Reset\
      }\
    }:Register.BDMARXCON={\
      start=0x9004:length=4:bit_fields.BRxBRST={\
        size=5\
      }:bit_fields.BRxSTSKO={\
        position=5:size=1:enum=Dis_Enab\
      }:bit_fields.BRxMAINC={\
        position=6:enum=INC\
      }:bit_fields.BRxDIE={\
        position=7:enum=Dis_Enab\
      }:bit_fields.BRxNLIE={\