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📄 f_amd_sst_arm.s

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; ============================================================================
; F_AMD_SST_ARM - Flash programming algorithm for AMD||SST Flash
; derived from f_atmel_arm.s
;
; Library Name: Included into container .s file.
;
; Module Name:  F_AMD_SST_ARM.S
; Module Descr: Flash programming for RVD: Atmel Flash devices
; Creation Date:Nov. 2001
; Author:       Jonathan Jefferies
;
; THIS INFORMATION IS PROPRIETARY TO
; ARM, Inc. (Walnut Creek Design Center)
; 1981 North Broadway, Suit 245
; Walnut Creek, CA 94596
; USA
; ----------------------------------------------------------------------
; Copyright (c) 2001  ARM, Inc.
; ALL RIGHTS RESERVED;
;
; Revisions of F_AMD_SST_ARM.S: (latest revision on top)
; #.#  Name  Date      Description
; $Revision: 1.1.2.2 $
; ---  ----- --------  -----------------------------------------------------
; 1.0 Jonathan Jefferies Initial version
;
; Implementation notes:
;
; GENERAL
; -------
;
;       This file is to be included into another asm file which has the
; board/chip specific knowledge needed for initialization and the like.
; That is, this is the algorithm only.
;
;       This file is based on information on AMD & SST flash devices
; of various forms. It is generalized to handle x8 and x16 accesses.
; It does not need to know the block sizes or positions as that is all
; passed in. 
;
;       Minimally this will work with various AMD A29LV400 chips
; and SST 39VF400A chips.
;
;       This uses the standard RVD implementation for an API. That
; means that registers are used for passing arguments and returning
; status. The registers used are based on the save/restore list. The
; first registers are assumed to be the ones to use for passing args.
; In the case of ARM, this is R0, R1, R2, R3, etc.
;
; REGISTER MODEL
; --------------
;
;       The register model for this routine is as follows:
;       R0:     Input: page of Flash (not used on ARM)
;               Output:status return to host
;       R1:     Input: base address of Flash block to operate on
;       R2/R3/R4/R5/R8/R9: Input: arguments
;               Typical meanings: R2=Counter
;       R6/R7:Scratch
;
; -----------------------------------------------------------------------------
; Description:
; ----------------------------------------------------------------------------
;                               NOTICE
;
;       This code is proprietary; the use of this source is
; restricted, and all rights are reserved.
;
;       If reading for interest, enjoy.
;
;       If maintaining, read comments carefully! There are some inter-depen-
; dencies and connectivities. Areas with particular connection are marked.
; There are some variable protocols that are not self evident: check all uses
; of variables before making big changes.
; ============================================================================
;

;************************************************************************/
;* DEFINE ENTRY POINTS                                                  */
;************************************************************************/

;       EXPORT          FLASH_init      // provided by asm that includes us
;       EXPORT          FLASH_erase_all // not available
        EXPORT          FLASH_erase
        EXPORT          FLASH_write_erase
        EXPORT          FLASH_write
        EXPORT          FLASH_validate
        EXPORT          FLASH_break
;       EXPORT          FLASH_term      // we do not need one

;************************************************************************/
;* DEFINE MACROS AND EQUATES                                            */
;************************************************************************/

        MACRO
        PUSHX   $p1
        STMFD   r13!,{$p1}
        MEND
        MACRO
        POPX    $p1
        LDMFD   r13!,{$p1}
        MEND

        IF              WIDTH=1
          MACRO
           STORE        $p1,$p2,$p3
            IF "$p3" = ""
             strb       $p1,$p2
            ELSE
             strb       $p1,$p2,$p3
            ENDIF
          MEND
          MACRO
           LOAD         $p1,$p2,$p3
            IF "$p3" = ""
             ldrb       $p1,$p2
            ELSE
             ldrb       $p1,$p2,$p3
            ENDIF
          MEND
        ELSE                    ; width = 2
          MACRO
           STORE        $p1,$p2,$p3
            IF "$p3" = ""
              strh      $p1,$p2
            ELSE
              strh      $p1,$p2,$p3
            ENDIF
          MEND
          MACRO
           LOAD         $p1,$p2,$p3
            IF "$p3" = ""
             ldrh       $p1,$p2
            ELSE
             ldrh       $p1,$p2,$p3
            ENDIF
          MEND
        ENDIF

        MACRO                   ; RET is return via LR or named reg
          RET           $p1
           IF "$p1" = ""
            mov R15,R14         ; Return with code in R0
           ELSE
            mov R15,$p1         ; Return with code in R0
           ENDIF
        MEND

FC_AT1   EQU            0xAA    ; attention request 1 (OFF1)
FC_AT2   EQU            0x55    ; attention request 2 (OFF2)
FC_ID_EN EQU            0x90    ; enter ID mode
FC_ID_EX EQU            0xF0    ; exit ID mode
FC_WRITE EQU            0xA0    ; start writing block
FC_ERASE EQU            0x80    ; start erase of segment/block
FC_SECTE EQU            0x30    ; sector erase (into sector)
FC_QENTR EQU            0x98    ; CFI Query Entry

;************************************************************************/
;* THE DATA POINTERS FOR DATA TOO LARGE FOR IMMEDIATES                  */
;************************************************************************/

;       To write commands to the flashes require the base of the flash + 
;       the appropriate offset as given below.
;       note that SST and AMD differ. AMD uses 0x0555 where SST uses 0x5555
;       however AMD says that Address bits A17-A11 are don't cares for
;       unlock and command cycles, i.e. we get away using the SST offsets.
OFFSET1 DATA
        IF WIDTH = 1
         DCD            0x5555
        ELSE
         DCD            (0x5555*2)
        ENDIF
OFFSET2 DATA
        IF WIDTH = 1
         DCD            0x2AAA
        ELSE
         DCD            (0x2AAA*2)
        ENDIF

DELAY   DATA
        DCD             10
RETRIES
        DCD             0xFF000000

;************************************************************************/
;* THE GLOBAL FUNCTIONS (EXPORTED PUBLICLY)                             */
;************************************************************************/
 
;* -----------------------------------------------------------------------
;  Local_init - handle device part of init (get ID).
;
;  Notes:
;     - this verifies the product ID and returns if OK or not.
;
;  Input/Output:
;     - In: R1=Base of Flash
;           R0=Page of Flash (no meaning for ARM)
;     - Out:R0=status code (0=OK, else error)
;     - Scratch: R2,R6,R7,R8
;     - Persist: R11 - we set with Base of Flash
;  ----------------------------------------------------------------------- */

Local_init
        mov     R11,R1          ; R1 is input R11 is persistance
        mov     R0,#FC_ID_EN    ; enter ID mode 0x90
        bl      flash_control   ; send op to Flash

;       ldr     R0,DELAY        ; 100000 of delay
;init_delay                     ; delay a while
;       subs    R0,R0,#1
;       bne     init_delay

;       ldrh    R2,[R1]         ; get manu ID
        LOAD    R2,[R1]         ; get manu ID
        and     R2,R2,#0xFF     ; mask to one byte

        mov     R0,#FC_ID_EX    ; exit ID mode 0xF0
        STORE   r0,[R1,#0]
        mov     R0,#0           ; assume OK

        cmp     R2,#0x20        ; ST chip??
        cmpne   R2,#0xBF        ; SST chip??
        cmpne   R2,#0x01        ; AMD chip??
        movne   R0,#11          ; error
        b       FLASH_break     ; exit
        
;* -----------------------------------------------------------------------
;  FLASH_erase - erase a Flash block
;
;  Notes:
;     - this erases a Flash block on request from host. The host has

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