b_integratorap.s

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; ============================================================================
; B_INTEGRATORAP - Flash programming routine for ARM using Intel Flash.
;
; Library Name: <B_INTEGRATORAP.AXF>
;
; Module Name:  B_INTEGRATORAP.S
; Module Descr: Flash programming for ARM+IntelFlash.
; Creation Date:2001
; Author:       Ian Field copied from B_M56621EVB by Paul K.
;
; THIS INFORMATION IS PROPRIETARY TO
; ARM, Inc.
; 1981 North Broadway, Suite #245
; Walnut Creek, CA 94596
; USA
; ----------------------------------------------------------------------
; Copyright (c) 2001  ARM, Inc.
; ALL RIGHTS RESERVED;
;
; Revisions of B_INTEGRATORAP.S: (latest revision on top)
; #.#  Name  Date      Description
; ---  ----- --------  -----------------------------------------------------
; $Revision: 1.1.6.1 $ 1.2
;
; Implementation notes:
;
; GENERAL
; -------
;
;       This file is an example initialization and setup for
; an ARM Board using Intel Flash and an ARM tool chain
;
;       This should be modified to reflect the changes for your 
; board/chip:
;       - set access size to 1 or 2 or 4.
;       - set parallel bank width
;       - setup any registers for waitstates, chip selects,
;         write-enables, etc.
;       - disable any watchdog timers, etc.
;       Note that the .ame file should include information on 
; what has been changed so RVDEBUG can save/restore to allow
; continuation.
;
; -----------------------------------------------------------------------------
; Description:
; ----------------------------------------------------------------------------
;                               NOTICE
;
;       This code is proprietary; the use of this source is
; restricted, and all rights are reserved.
;
;       If reading for interest, enjoy.
;
;       If maintaining, read comments carefully! There are some inter-depen-
; dencies and connectivities. Areas with particular connection are marked.
; There are some variable protocols that are not self evident: check all uses
; of variables before making big changes.
; ============================================================================
;


;************************************************************************/
;* DEFINE MACROS AND EQUATES                                            */
;************************************************************************/

WIDTH   EQU     4                       ; word accesses (set to 4 for word)

P_WIDTH EQU     2                       ; number of FlashROMs in parallel

ALLRAM  EQU     1                       ; is in RAM vs. CODE in ROM

TRUE    EQU     1

;************************************************************************/
;* STACK DATA (in CODE or DATA seg)                                     */
;************************************************************************/

        ; now define a tiny stack for the two levels of call we do
        IF ALLRAM = TRUE        ; is PC-rel and in RAM
         AREA   FLASH_STACK, CODE
         DCD    0,0,0,0,0,0,0,0,0,0,0,0 ; 12 words for call depth
stack_top DATA
        ELSE                    ; CODE in ROM, so stack in RAM
         ; note that we use initialized data. This is not really
         ; needed but works around a problem in the ARM model where
         ; the section name is lost so we have to be able to see
         ; stack+data vs. buffer (BSS).
         AREA   FLASH_VARS, DATA, READWRITE
         DCD    0,0,0,0,0,0,0,0,0,0,0,0 ; 12 words for call depth
stack_top
        ENDIF

;************************************************************************/
;* PRIVATE DATA FOR INIT ROUTINE                                        */
;************************************************************************/

        AREA    FLASH_TEXT, CODE, READONLY
; These variables below (read-only) are used for init routine
CHIP_SELECT     DATA                    ; example chip select ptr
        IF ALLRAM <> TRUE               ; CODE in ROM
STACK           DATA
                DCD     stack_top       ; top of stack
        ENDIF

;************************************************************************/
;* THE GLOBAL FUNCTIONS (EXPORTED PUBLICLY)                             */
;************************************************************************/
 
;* -----------------------------------------------------------------------
;  FLASH_init - initialize the board (memory access controls, etc).
;
;  Notes:
;     - this routine can do any initialization needed for the board
;       or ASICs. Examples include disabling watchdogs, enabling
;       chip selectors/enables to allow write to this memory, etc.
;     - In this implementation, we setup the MEMIF registers to allow
;       access to the Flash. Instead of restore in terminate routine,
;       we let host restore the MEMIF memory.
;
;  Input/Output:
;     - In: R1=Base of Flash
;           R0=Page of Flash (no meaning for ARM)
;     - Out:R0=status code (0=OK, else error)
;     - Scratch R6,R7,R8
;   ----------------------------------------------------------------------- */

        EXPORT          FLASH_init
        ENTRY                           ; 1st instruction below

FLASH_init
        IF ALLRAM = TRUE                ; is PC-rel and in RAM
        ldr     SP,stack_top            ; get stack directly 
        ELSE
        ldr     SP,STACK                ; get stack indirectly
        ENDIF

        mov     R6,#0x11000000          ; Flash write protect disable
        mov     R7,#0x06                ; Flash VPP enable
        str     R7,[R6,#0x08]

        mov     R6,#0x12000000          ; unlock EBI registers
        mov     R7,#0x5F
        mov     R8,#0xA0
        add     R7, R7, R8, lsl #8
        str     R7,[R6,#0x20]

        mov     R7,#0x26                ; turn on WREN, CS1 - flash
        str     R7,[R6,#0x04]

        mov     R0,#0x50
        add     R0, R0, R0, lsl #16
        str     R0,[R1]                 ; write to Flash - clear status
 
        bl      check_status            ; check Flash status and return in R0
        b       Local_init              ; finish init, then Stop on breakpoint


;************************************************************************/
;* Include the INTEL Flash algorithm here to do actual work             */
;************************************************************************/

        INCLUDE f_intel_arm.s           ; include Intel routine

;************************************************************************/
;* DEFINE BUFFER FOR WRITE/VERIFY and STACK                             */
;************************************************************************/


        AREA BUFFER, NOINIT
buffer  %       1024                    ; buffer for copying
        ; Note on above: we do not need to do it this way, but this is 
        ; simplest if we want to have the routine and buffer all in one 
        ; memory block

        END