spec.stp

realview22.rar

{.Listings              \\ Listing controls
  # [e-mail]>settings ; Create a listing file. It will contain source interleaved with warning & 
  # error messages.
   listing=K(disabled,enabled)0 \\ Generate a listing file, (see --list)\
                        \C (, --list)
  # [e-mail]>settings ; define a listing file
  listing_file=F        \\ Define the listing file, (see --list) \
                        \C ?* [$"Listings.listing", $VALUE]

  # [e-mail]>settings ; Listing Options.
  listing_opts=K(none,verbose,xref,verbose_and_xref)0 \\ Options for listing file, (see --list) \
                        \C (, \
                            [$"Listings.listing", --noterse], \
                            [$"Listings.listing", --xref], \
                            [$"Listings.listing", --noterse -xref])

  # [e-mail]>settings ; Set the listing page width
  listing_width=S       \\ Width of the listing page, (see --list --width) \
                        \C ?* [$"Listings.listing", --width $VALUE]

  # [e-mail]>settings ; Set the listing page length
  listing_length=S      \\ Length of the listing page, (see --list, --length) \
                        \C ?* [$"Listings.listing", --length $VALUE]

  # [e-mail]>settings ; Optional file name to save source file dependency lists.
  dependency_list=F \\ Optional file name to save dependency listing, (see --depend) \
                        \C ?* --depend $VALUE

  # [e-mail]>settings ; Optional file name for error output. If none is specified, errors go to the
  # standard output stream.
  error_file=F  \\ Optional file name for error output, (see --errors) \
                        \C ?* --errors $VALUE
}

# [e-mail]>settings ; These options control whether the assembler generates or suppresses
# various messages.
{.Messages              \\ Control of messages
  # [e-mail]>settings ; Generate warning messages
  warnings=K(disabled,enabled)1 \\ Generate warning messages, (see --nowarn) \
                        \C (--nowarn,)

  # [e-mail]>settings ; Downgrade into warnings any errors produced due to the selected cpu or
  # architecture.
  downgr_cpu_errs=B0 \\ Change errors due to cpu-specific code into warnings, (see --unsafe) \
                        \C (,--unsafe)

  # [e-mail]>settings ; Checks LDM and STM register lists to ensure that all registers are
  # provided in increasing register number order. If this is not the case,
  # a warning is given. This can be used to help detect misuse of symbolic
  # register names.
  check_reg_list=B0 \\ Check register lists for ascending order, (see --cr)\
                        \C (,--cr)

  # [e-mail]>settings ; Select this option to generate an error message or warning when a long 
  # running     load or store multiple instruction is encountered.
  split_ldm=K(disabled, enabled)0 \\ Avoid large multiple register transfers, (see --split_ldm) \
                   \C (,--split_ldm)
}

# [e-mail]>settings ; Control format of executable image
{.Assembly              \\ Control format of executable image
  # [e-mail]>settings ; Tell assembler how to interpret instructions.
  assemble_mode=K(ARM,Thumb)0 \\ Instruction interpretation\
                        \K 32-bit,16-bit \
                        \C ($<SPC=0>,$<SPC=1> --16)

  # [e-mail]>settings ; Set endianness (byte sex) assumption for processor.
  endianness=K(default,big,little)0 \\ Select endianness, (see --bigend, --littleend) \
                        \C (,--bi,--li)

  # [e-mail]>settings ; Produce information for debugging.
  generate_debug=K(disabled,enabled)1 \\ Generate debug information, (see -g) \
                        \C (,-g)

  # [e-mail]>settings ; Format for debug information tables.
  debug_format=K(dwarf2)0 \\ Debug information table format, (see --dwarf2) \
                        \C (--dwarf2)

  # [e-mail]>settings ; Keep local labels in the symbol table of the object file 
  # for use by the debugger.
  keep=K(disabled,enabled)0 \\Keep local labels, (see --keep) \
         \C (,--keep)

  # [e-mail]>settings ; Assembles code for the specific processor. The assembler may take 
  # advantage of certain features of the selected cpu that may 
  # make the code incompatible with other processors; for example, 
  # the use of halfword instructions.  These options are only valid
  # for use with the ARM assembler and not with the Thumb assembler.
  # Also, not all selections are valid with all versions of the assembler.
  cpu=K(default,ARM6,\
                ARM7,ARM7TDMI,ARM720T,ARM740T,\
                    ARM810,\
                    ARM9TDMI,ARM920T,ARM922T,ARM940T,\
                    ARM10TDMI,ARM1020T,\
                    SA-110,SA-1100,SA-1110,\
                    4,4T,4xM,4TxM,5,5T,5xM,5TxM,5E,5TE,5TEJ,6,XScale,\
                    ARM60,ARM600,ARM610,\
                    ARM7D,ARM7DI,ARM7DM,ARM7DMI,ARM7EJ-S,ARM7T-S,\
                ARM7TM,ARM7TM-S,ARM7TDM,ARM7TDMI-S,ARM7TDI-S,ARM704,\
                    ARM710A,ARM710AM,ARM710T,ARM7100,ARM7500,ARM7500FE,\
                    ARM9E-S,ARM9EJ-S,ARM946E-S,ARM966E-S,ARM926EJ-S,\
                    ARM10200,ARM10E,ARM1020E,ARM1022E,ARM1020EJ,ARM10200E,\
                    ARM1026EJ-S,ARM1136J-S,ARM1136JF-S,3,3M)0 \\ Architecture or Processor, (see --cpu) (3 and 3M DEPRECATED)\
                        \C (, \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM6], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7TDMI], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM720T], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM740T], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM810],  \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM9TDMI], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM920T], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM922T], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM940T], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM10TDMI], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM1020T],  \
                                [$"Assembly.assemble_mode"&1,,--cpu SA-110],  \
                                [$"Assembly.assemble_mode"&1,,--cpu SA-1100], \
                                [$"Assembly.assemble_mode"&1,,--cpu SA-1110], \
                                [$"Assembly.assemble_mode"&1,,--cpu 4], \
                                [$"Assembly.assemble_mode"&1,,--cpu 4T],\
                                [$"Assembly.assemble_mode"&1,,--cpu 4xM], \
                                [$"Assembly.assemble_mode"&1,,--cpu 4TxM], \
                                [$"Assembly.assemble_mode"&1,,--cpu 5], \
                                [$"Assembly.assemble_mode"&1,,--cpu 5T], \
                                [$"Assembly.assemble_mode"&1,,--cpu 5xM], \
                                [$"Assembly.assemble_mode"&1,,--cpu 5TxM],\
                                [$"Assembly.assemble_mode"&1,,--cpu 5E], \
                                [$"Assembly.assemble_mode"&1,,--cpu 5TE], \
                                [$"Assembly.assemble_mode"&1,,--cpu 5TEJ], \
                                [$"Assembly.assemble_mode"&1,,--cpu 6], \
                                [$"Assembly.assemble_mode"&1,,--cpu XScale], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM60], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM600], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM610], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7D], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7DI], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7DM], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7DMI], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7EJ-S], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7T-S], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7TM], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7TM-S], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7TDM], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7TDMI-S],\
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7TDI-S], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM704], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM710A], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM710AM], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM710T], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7100], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7500],  \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM7500FE], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM9E-S], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM9EJ-S], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM946E-S], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM966E-S], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM926EJ-S], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM10200], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM10E], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM1020E], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM1022E], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM1020EJ], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM10200E], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM1026EJ-S], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM1136J-S], \
                                [$"Assembly.assemble_mode"&1,,--cpu ARM1136JF-S],\
                                ,)

  # [e-mail]>settings ; Select how to handle floating-point processing.
  fp_processing=K(default,\
                  softvfp,\
                  softvfp+vfp,\
                  softvfp+vfpv2,\
                  vfp,\
                  vfpv2,\
                  none,\
                  softfpa,\
                  fpa,\
                  vfpv1)0 \\ Floating point processing, (see --fpu)\
                        \K Use default for the specified processor, \
                     Use software FP library with pure-endian doubles, \
                     Use software FP library with pure-endian doubles + VFP hardware - architecture vfpv1, \
                     Use software FP library with pure-endian doubles + VFP hardware - architecture vfpv2, \
                     Selects hardware vfp - architecture vfpv2, \
                     Selects hardware vfpv2 - architecture vfpv2, \
                     Selects no FP option, \
                     DEPRECATED Use software FP library with mixed-endian doubles, \
                     DEPRECATED Selects hardware FPA, \
                     DEPRECATED Selects hardware vfpv1 - architecture vfpv1, \
                        \C (, \
                             --fpu softvfp, \
                             --fpu softvfp+vfp, \
                             --fpu softvfp+vfpv2, \
                             --fpu vfp, \
                             --fpu vfpv2, \
                             --fpu none, \
                             --fpu softfpa,--fpu fpa, --fpu vfpv1)

  # [e-mail]>settings ; 
  fp_conformance=K(default,ieeefull,ieeefixed,ieeenofenv,std,fast)0 \\ Specify floating-point conformance, (see --fpmode) \
                        \K default, \
                           Guaranteed IEEE standard compliance, \
                           IEEE with round-to-nearest and no inexact exception, \
                           IEEE with round-to-nearest and no exceptions, \
                           IEEE finite values with denormals flushed to zero round-to-nearest and no exceptions, \
                           Similar to std but sacrifice accuracy for faster execution \
                        \C (,--fpmode ieee_full,--fpmode ieee_fixed,--fpmode ieee_no_fenv,--fpmode std,--fpmode fast)

   # [e-mail]>settings ; Source caching
  source_cache=K(disabled,enabled)1 \\ Use source caching, (see --nocache) \
                        \C (--noc,)

  # [e-mail]>settings ; Maximum source cache size
  max_cache=K(1_MB,2_MB,4_MB,8_MB,16_MB)3 \\ Select maximum size of source cache, (see --maxcache) \
                        \C ([$"Assembly.source_cache",--mc 1], \
                            [$"Assembly.source_cache",--mc 2], \
                            [$"Assembly.source_cache",--mc 4], \
                            , \
                            [$"Assembly.source_cache",--mc 16])

  # [e-mail]>settings ; Ignore C-style special characters (\n, \t, etc.).
  ignore_special=B0  \\ Ignore C-style special characters, (see --noesc) \
                        \C (,--noesc)

  # [e-mail]>settings ; Predefine implicit register names (ro-r15, f0-f7, a1-a4, v1-v6,
  # sl, fp, ip, sp, lr, pc).
  predef_regs=B1        \\ Predefine implicit register names, (see --noregs) \
                        \C (--noregs,)

  # [e-mail]>settings ; Controls ARM Procedure Call Standard qualifiers
  {.APCS                \\ ARM Procedure Call Standard qualifiers
    # [e-mail]>settings ; Control the use of ARM Procedure Call Standard qualifiers
    apcs=K(disabled, enabled)1 \\ Control use of ATPCS, (see --apcs) \
                        \K Force disabled, \
                           Force enabled \
                        \C (--apcs $/none,)

    # [e-mail]>settings ; Control whether software stack-checking is available in the
    # assembled code.
    stack_checking=K(default,disabled,enabled)0 \\ Assemble for software stack-checking, (see --apcs) \
                        \K Use