📄 sn_sal.h
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/* * Checks console interrupt status */static inline u64ia64_sn_console_intr_status(void){ struct ia64_sal_retval ret_stuff; ret_stuff.status = 0; ret_stuff.v0 = 0; ret_stuff.v1 = 0; ret_stuff.v2 = 0; SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, 0, SAL_CONSOLE_INTR_STATUS, 0, 0, 0, 0, 0); if (ret_stuff.status == 0) { return ret_stuff.v0; } return 0;}/* * Enable an interrupt on the SAL console device. */static inline voidia64_sn_console_intr_enable(uint64_t intr){ struct ia64_sal_retval ret_stuff; ret_stuff.status = 0; ret_stuff.v0 = 0; ret_stuff.v1 = 0; ret_stuff.v2 = 0; SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, intr, SAL_CONSOLE_INTR_ON, 0, 0, 0, 0, 0);}/* * Disable an interrupt on the SAL console device. */static inline voidia64_sn_console_intr_disable(uint64_t intr){ struct ia64_sal_retval ret_stuff; ret_stuff.status = 0; ret_stuff.v0 = 0; ret_stuff.v1 = 0; ret_stuff.v2 = 0; SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, intr, SAL_CONSOLE_INTR_OFF, 0, 0, 0, 0, 0);}/* * Sends a character buffer to the console asynchronously. */static inline u64ia64_sn_console_xmit_chars(char *buf, int len){ struct ia64_sal_retval ret_stuff; ret_stuff.status = 0; ret_stuff.v0 = 0; ret_stuff.v1 = 0; ret_stuff.v2 = 0; SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS, (uint64_t)buf, (uint64_t)len, 0, 0, 0, 0, 0); if (ret_stuff.status == 0) { return ret_stuff.v0; } return 0;}/* * Returns the iobrick module Id */static inline u64ia64_sn_sysctl_iobrick_module_get(nasid_t nasid, int *result){ struct ia64_sal_retval ret_stuff; ret_stuff.status = 0; ret_stuff.v0 = 0; ret_stuff.v1 = 0; ret_stuff.v2 = 0; SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYSCTL_IOBRICK_MODULE_GET, nasid, 0, 0, 0, 0, 0, 0); /* result is in 'v0' */ *result = (int)ret_stuff.v0; return ret_stuff.status;}/** * ia64_sn_pod_mode - call the SN_SAL_POD_MODE function * * SN_SAL_POD_MODE actually takes an argument, but it's always * 0 when we call it from the kernel, so we don't have to expose * it to the caller. */static inline u64ia64_sn_pod_mode(void){ struct ia64_sal_retval isrv; SAL_CALL(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0); if (isrv.status) return 0; return isrv.v0;}/* * Retrieve the system serial number as an ASCII string. */static inline u64ia64_sn_sys_serial_get(char *buf){ struct ia64_sal_retval ret_stuff; SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYS_SERIAL_GET, buf, 0, 0, 0, 0, 0, 0); return ret_stuff.status;}extern char sn_system_serial_number_string[];extern u64 sn_partition_serial_number;static inline char *sn_system_serial_number(void) { if (sn_system_serial_number_string[0]) { return(sn_system_serial_number_string); } else { ia64_sn_sys_serial_get(sn_system_serial_number_string); return(sn_system_serial_number_string); }} /* * Returns a unique id number for this system and partition (suitable for * use with license managers), based in part on the system serial number. */static inline u64ia64_sn_partition_serial_get(void){ struct ia64_sal_retval ret_stuff; SAL_CALL(ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0, 0, 0, 0, 0, 0, 0); if (ret_stuff.status != 0) return 0; return ret_stuff.v0;}static inline u64sn_partition_serial_number_val(void) { if (sn_partition_serial_number) { return(sn_partition_serial_number); } else { return(sn_partition_serial_number = ia64_sn_partition_serial_get()); }}/* * Returns the partition id of the nasid passed in as an argument, * or INVALID_PARTID if the partition id cannot be retrieved. */static inline partid_tia64_sn_sysctl_partition_get(nasid_t nasid){ struct ia64_sal_retval ret_stuff; SAL_CALL(ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid, 0, 0, 0, 0, 0, 0); if (ret_stuff.status != 0) return INVALID_PARTID; return ((partid_t)ret_stuff.v0);}/* * Returns the partition id of the current processor. */extern partid_t sn_partid;static inline partid_tsn_local_partid(void) { if (sn_partid < 0) { return (sn_partid = ia64_sn_sysctl_partition_get(cpuid_to_nasid(smp_processor_id()))); } else { return sn_partid; }}/* * Register or unregister a physical address range being referenced across * a partition boundary for which certain SAL errors should be scanned for, * cleaned up and ignored. This is of value for kernel partitioning code only. * Values for the operation argument: * 1 = register this address range with SAL * 0 = unregister this address range with SAL * * SAL maintains a reference count on an address range in case it is registered * multiple times. * * On success, returns the reference count of the address range after the SAL * call has performed the current registration/unregistration. Returns a * negative value if an error occurred. */static inline intsn_register_xp_addr_region(u64 paddr, u64 len, int operation){ struct ia64_sal_retval ret_stuff; SAL_CALL(ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len, (u64)operation, 0, 0, 0, 0); return ret_stuff.status;}/* * Register or unregister an instruction range for which SAL errors should * be ignored. If an error occurs while in the registered range, SAL jumps * to return_addr after ignoring the error. Values for the operation argument: * 1 = register this instruction range with SAL * 0 = unregister this instruction range with SAL * * Returns 0 on success, or a negative value if an error occurred. */static inline intsn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr, int virtual, int operation){ struct ia64_sal_retval ret_stuff; u64 call; if (virtual) { call = SN_SAL_NO_FAULT_ZONE_VIRTUAL; } else { call = SN_SAL_NO_FAULT_ZONE_PHYSICAL; } SAL_CALL(ret_stuff, call, start_addr, end_addr, return_addr, (u64)1, 0, 0, 0); return ret_stuff.status;}/* * Change or query the coherence domain for this partition. Each cpu-based * nasid is represented by a bit in an array of 64-bit words: * 0 = not in this partition's coherency domain * 1 = in this partition's coherency domain * * It is not possible for the local system's nasids to be removed from * the coherency domain. Purpose of the domain arguments: * new_domain = set the coherence domain to the given nasids * old_domain = return the current coherence domain * * Returns 0 on success, or a negative value if an error occurred. */static inline intsn_change_coherence(u64 *new_domain, u64 *old_domain){ struct ia64_sal_retval ret_stuff; SAL_CALL(ret_stuff, SN_SAL_COHERENCE, new_domain, old_domain, 0, 0, 0, 0, 0); return ret_stuff.status;}/* * Change memory access protections for a physical address range. * nasid_array is not used on Altix, but may be in future architectures. * Available memory protection access classes are defined after the function. */static inline intsn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array){ struct ia64_sal_retval ret_stuff; int cnodeid; unsigned long irq_flags; cnodeid = nasid_to_cnodeid(get_node_number(paddr)); spin_lock(&NODEPDA(cnodeid)->bist_lock); local_irq_save(irq_flags); SAL_CALL_NOLOCK(ret_stuff, SN_SAL_MEMPROTECT, paddr, len, nasid_array, perms, 0, 0, 0); local_irq_restore(irq_flags); spin_unlock(&NODEPDA(cnodeid)->bist_lock); return ret_stuff.status;}#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080#define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2#define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca#define SN_MEMPROT_ACCESS_CLASS_3 0x14a290#define SN_MEMPROT_ACCESS_CLASS_6 0x084080#define SN_MEMPROT_ACCESS_CLASS_7 0x021080/* * Turns off system power. */static inline voidia64_sn_power_down(void){ struct ia64_sal_retval ret_stuff; SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0); while(1); /* never returns */}/** * ia64_sn_fru_capture - tell the system controller to capture hw state * * This routine will call the SAL which will tell the system controller(s) * to capture hw mmr information from each SHub in the system. */static inline u64ia64_sn_fru_capture(void){ struct ia64_sal_retval isrv; SAL_CALL(isrv, SN_SAL_SYSCTL_FRU_CAPTURE, 0, 0, 0, 0, 0, 0, 0); if (isrv.status) return 0; return isrv.v0;}#endif /* _ASM_IA64_SN_SN_SAL_H */
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