invent.h

linux-2.4.29操作系统的源码

/* States for graphics class NEWPORT */
#define	INV_NEWPORT_XL	0x01	/* Indigo2 XL model */
#define INV_NEWPORT_24	0x02	/* board has 24 bitplanes */
#define INV_NEWTON      0x04    /* Triton SUBGR tagging */

/* States for graphics class MGRAS */
#define INV_MGRAS_ARCHS 0xff000000      /* architectures */
#define INV_MGRAS_HQ3   0x00000000   /*impact*/
#define INV_MGRAS_HQ4	0x01000000   /*gamera*/
#define INV_MGRAS_MOT   0x02000000   /*mothra*/
#define INV_MGRAS_GES	0x00ff0000	/* number of GEs */
#define INV_MGRAS_1GE	0x00010000
#define INV_MGRAS_2GE	0x00020000
#define INV_MGRAS_RES	0x0000ff00	/* number of REs */
#define INV_MGRAS_1RE	0x00000100
#define INV_MGRAS_2RE	0x00000200
#define INV_MGRAS_TRS	0x000000ff	/* number of TRAMs */
#define INV_MGRAS_0TR	0x00000000
#define INV_MGRAS_1TR	0x00000001
#define INV_MGRAS_2TR	0x00000002

/* States for graphics class CRIME */
#define INV_CRM_BASE    0x01            /* Moosehead basic model */

/* States for graphics class ODSY */
#define INV_ODSY_ARCHS      0xff000000 /* architectures */
#define INV_ODSY_REVA_ARCH  0x01000000 /* Buzz Rev A */
#define INV_ODSY_REVB_ARCH  0x02000000 /* Buzz Rev B */
#define INV_ODSY_MEMCFG     0x00ff0000 /* memory configs */
#define INV_ODSY_MEMCFG_32  0x00010000 /* 32MB memory */
#define INV_ODSY_MEMCFG_64  0x00020000 /* 64MB memory */
#define INV_ODSY_MEMCFG_128 0x00030000 /* 128MB memory */
#define INV_ODSY_MEMCFG_256 0x00040000 /* 256MB memory */
#define INV_ODSY_MEMCFG_512 0x00050000 /* 512MB memory */


/* types for class network */
#define INV_NET_ETHER		0	/* 10Mb Ethernet */
#define INV_NET_HYPER		1	/* HyperNet */
#define	INV_NET_CRAYIOS		2	/* Cray Input/Ouput Subsystem */
#define	INV_NET_FDDI		3	/* FDDI */
#define INV_NET_TOKEN		4	/* 16/4 Token Ring */
#define INV_NET_HIPPI		5	/* HIPPI */
#define INV_NET_ATM		6	/* ATM */
#define INV_NET_ISDN_BRI	7	/* ISDN */
#define INV_NET_ISDN_PRI	8	/* PRI ISDN */
#define INV_NET_HIPPIS		9	/* HIPPI-Serial */
#define	INV_NET_GSN		10	/* GSN (aka HIPPI-6400) */
#define INV_NET_MYRINET		11	/* Myricom PCI network */

/* controllers for network types, unique within class network */
#define INV_ETHER_EC	0	/* IP6 integral controller */
#define INV_ETHER_ENP	1	/* CMC board */
#define INV_ETHER_ET	2	/* IP5 integral controller */
#define INV_HYPER_HY	3	/* HyperNet controller */
#define	INV_CRAYIOS_CFEI3 4	/* Cray Front End Interface, v3 */
#define	INV_FDDI_IMF	5	/* Interphase/Martin 3211 FDDI */
#define INV_ETHER_EGL	6	/* Interphase V/4207 Eagle */
#define INV_ETHER_FXP	7	/* CMC C/130 FXP */
#define INV_FDDI_IPG	8	/* Interphase/SGI 4211 Peregrine FDDI */
#define INV_TOKEN_FV	9	/* Formation fv1600 Token-Ring board */
#define INV_FDDI_XPI	10	/* XPI GIO bus FDDI */
#define INV_TOKEN_GTR	11	/* GTR GIO bus TokenRing */
#define INV_ETHER_GIO	12	/* IP12/20 optional GIO ethernet controller */
#define INV_ETHER_EE	13	/* Everest IO4 EPC SEEQ/EDLC */
#define INV_HIO_HIPPI	14	/* HIO HIPPI for Challenge/Onyx */
#define INV_ATM_GIO64	15	/* ATM OC-3c Mez card */
#define INV_ETHER_EP	16	/* 8-port E-Plex Ethernet */
#define INV_ISDN_SM	17	/* Siemens PEB 2085 */
#define INV_TOKEN_MTR	18	/* EISA TokenRing */
#define INV_ETHER_EF	19	/* IOC3 Fast Ethernet */
#define INV_ISDN_48XP	20	/* Xircom PRI-48XP */
#define INV_FDDI_RNS	21	/* Rockwell Network Systems FDDI */
#define INV_HIPPIS_XTK	22	/* Xtalk HIPPI-Serial */
#define INV_ATM_QUADOC3	23	/* Xtalk Quad OC-3c ATM interface */
#define INV_TOKEN_MTRPCI 24     /* PCI TokenRing */
#define INV_ETHER_ECF	25	/* PCI Fast Ethernet */
#define INV_GFE		26	/* GIO Fast Ethernet */
#define INV_VFE		27	/* VME Fast Ethernet */
#define	INV_ETHER_GE	28	/* Gigabit Ethernet */
#define	INV_ETHER_EFP	INV_ETHER_EF	/* unused (same as IOC3 Fast Ethernet) */
#define INV_GSN_XTK1	29	/* single xtalk version of GSN */
#define INV_GSN_XTK2	30	/* dual xtalk version of GSN */
#define INV_FORE_HE	31	/* FORE HE ATM Card */
#define INV_FORE_PCA	32	/* FORE PCA ATM Card */
#define INV_FORE_VMA    33      /* FORE VMA ATM Card */
#define INV_FORE_ESA    34      /* FORE ESA ATM Card */
#define INV_FORE_GIA    35      /* FORE GIA ATM Card */

/* Types for class INV_SCSI and INV_VSCSI; The type code is the same as
 * the device type code returned by the Inquiry command, iff the Inquiry
 * command defines a type code for the device in question.  If it doesn't,
 * values over 31 will be used for the device type.
 * Note: the lun is encoded in bits 8-15 of the state.  The
 * state field low 3 bits contains the information from the inquiry
 * cmd that indicates ANSI SCSI 1,2, etc. compliance, and bit 7
 * contains the inquiry info that indicates whether the media is
 * removable.
 */
#define INV_PRINTER	2	/* SCSI printer */
#define INV_CPU		3	/* SCSI CPU device */
#define INV_WORM	4	/* write-once-read-many (e.g. optical disks) */
#define INV_CDROM	5	/* CD-ROM  */
#define INV_SCANNER	6	/* scanners */
#define INV_OPTICAL	7	/* optical disks (read-write) */
#define INV_CHANGER	8	/* jukebox's for CDROMS, for example */
#define INV_COMM	9	/* Communications device */
#define INV_STARCTLR	12	/* Storage Array Controller */
#define INV_RAIDCTLR	32	/* RAID ctlr actually gives type 0 */

/* bit definitions for state field for class INV_SCSI */
#define INV_REMOVE	0x80	/* has removable media */
#define INV_SCSI_MASK	7	/* to which ANSI SCSI standard device conforms*/

/* types for class INV_AUDIO */

#define INV_AUDIO_HDSP		0	/* Indigo DSP system */
#define INV_AUDIO_VIGRA110	1	/* ViGRA 110 audio board */
#define INV_AUDIO_VIGRA210	2	/* ViGRA 210 audio board */
#define INV_AUDIO_A2		3	/* HAL2 / Audio Module for Indigo 2 */
#define INV_AUDIO_A3		4	/* Moosehead (IP32) AD1843 codec */
#define INV_AUDIO_RAD		5	/* RAD PCI chip */

/* types for class INV_VIDEO */

#define	INV_VIDEO_LIGHT		0
#define	INV_VIDEO_VS2		1	/* MultiChannel Option */
#define	INV_VIDEO_EXPRESS	2	/* kaleidecope video */
#define	INV_VIDEO_VINO		3
#define	INV_VIDEO_VO2		4	/* Sirius Video */
#define	INV_VIDEO_INDY		5	/* Indy Video - kal vid on Newport
					  gfx on Indy */
#define	INV_VIDEO_MVP		6	/* Moosehead Video Ports */
#define	INV_VIDEO_INDY_601	7	/* Indy Video 601 */
#define	INV_VIDEO_PMUX		8	/* PALMUX video w/ PGR gfx */
#define	INV_VIDEO_MGRAS		9	/* Galileo 1.5 video */
#define	INV_VIDEO_DIVO		10	/* DIVO video */
#define	INV_VIDEO_RACER		11	/* SpeedRacer Pro Video */
#define	INV_VIDEO_EVO		12	/* EVO Personal Video */
#define INV_VIDEO_XTHD		13	/* XIO XT-HDTV video */
#define INV_VIDEO_XTDIGVID      14      /* XIO XT-HDDIGVID video */

/* states for video class INV_VIDEO_EXPRESS */

#define INV_GALILEO_REV		0xF
#define INV_GALILEO_JUNIOR	0x10
#define INV_GALILEO_INDY_CAM	0x20
#define INV_GALILEO_DBOB	0x40
#define INV_GALILEO_ELANTEC	0x80

/* states for video class VINO */

#define INV_VINO_REV		0xF
#define INV_VINO_INDY_CAM	0x10
#define INV_VINO_INDY_NOSW	0x20	/* nebulous - means s/w not installed */

/* states for video class MVP */

#define INV_MVP_REV(x)		(((x)&0x0000000f))
#define INV_MVP_REV_SW(x)	(((x)&0x000000f0)>>4)
#define INV_MVP_AV_BOARD(x)	(((x)&0x00000f00)>>8)
#define	INV_MVP_AV_REV(x)	(((x)&0x0000f000)>>12)
#define	INV_MVP_CAMERA(x)	(((x)&0x000f0000)>>16)
#define	INV_MVP_CAM_REV(x)	(((x)&0x00f00000)>>20)
#define INV_MVP_SDIINF(x)       (((x)&0x0f000000)>>24)
#define INV_MVP_SDI_REV(x)      (((x)&0xf0000000)>>28)

/* types for class INV_BUS */

#define INV_BUS_VME	0
#define INV_BUS_EISA	1
#define INV_BUS_GIO	2
#define INV_BUS_BT3_PCI	3

/* types for class INV_MISC */
#define INV_MISC_EPC_EINT	0	/* EPC external interrupts */
#define INV_MISC_PCKM		1	/* pc keyboard or mouse */
#define INV_MISC_IOC3_EINT	2	/* IOC3 external interrupts */
#define INV_MISC_OTHER		3	/* non-specific type */

/*
 * The four components below do not actually have inventory information
 * associated with the vertex. These symbols are used by grio at the 
 * moment to figure out the device type from the vertex. If these get
 * inventory structures in the future, either the type values must
 * remain the same or grio code needs to change.
 */

#define INV_XBOW        	3	/* cross bow */
#define INV_HUB         	4	/* hub */
#define INV_PCI_BRIDGE  	5	/* pci bridge */
#define INV_ROUTER		6	/* router */

/*  types for class INV_PROM */
#define INV_IO6PROM	0
#define INV_IP27PROM	1
#define INV_IP35PROM	2

/* types for class INV_COMPRESSION */

#define	INV_COSMO		0
#define	INV_INDYCOMP		1
#define	INV_IMPACTCOMP		2	/* cosmo2, aka impact compression */
#define	INV_VICE		3 	/* Video imaging & compression engine */

/* types for class INV_DISPLAY */
#define INV_PRESENTER_BOARD	0       /* Indy Presenter adapter board */
#define INV_PRESENTER_PANEL	1       /* Indy Presenter board and panel */
#define INV_ICO_BOARD		2	/* IMPACT channel option board */
#define INV_DCD_BOARD		3	/* O2 dual channel option board */
#define INV_7of9_BOARD          4       /* 7of9 flatpanel adapter board */
#define INV_7of9_PANEL          5       /* 7of9 flatpanel board and panel */

/* types for class INV_IEEE1394 */
#define INV_OHCI	0	/* Ohci IEEE1394 pci card */

/* state for class INV_IEEE1394 & type INV_OHCI */
#define INV_IEEE1394_STATE_TI_REV_1 0

/* O2 DVLink 1.1 controller static info */
#define INV_IEEE1394_CTLR_O2_DVLINK_11 0x8009104c

/* types for class INV_TPU */
#define	INV_TPU_EXT		0	/* External XIO Tensor Processing Unit */
#define	INV_TPU_XIO		1	/* Internal XIO Tensor Processing Unit */

/*
 * USB Types.  The upper 8 bits contain general usb device class and are used to
 * qualify the lower 8 bits which contain device type within a usb class.
 * Use USB_INV_DEVCLASS and USB_INV_DEVTYPE to to decode an i_type, and
 * USB_INV_TYPE to set it.
 */

#define USB_INV_DEVCLASS(invtype)	((invtype) >> 8)
#define USB_INV_DEVTYPE(invtype)	((invtype) & 0xf)
#define USB_INV_TYPE(usbclass, usbtype)	(((usbclass) << 8) | (usbtype))

/*
 * USB device classes.  These classes might not match the classes as defined
 * by the usb spec, but where possible we will try.
 */

#define USB_INV_CLASS_RH	0x00	/* root hub (ie. controller) */
#define USB_INV_CLASS_HID	0x03	/* human interface device */
#define USB_INV_CLASS_HUB	0x09	/* hub device */

/*
 * USB device types within a class.  These will not match USB device types,
 * as the usb is not consistent on how specific types are defined (sometimes
 * they are found in the interface subclass, sometimes (as in HID devices) they
 * are found within data generated by the device (hid report descriptors for
 * example).
 */

/*
 * RH types
 */

#define USB_INV_RH_OHCI		0x01	/* ohci root hub */

/*
 * HID types
 */

#define USB_INV_HID_KEYBOARD	0x01	/* kbd (HID class) */
#define USB_INV_HID_MOUSE	0x02	/* mouse (HID class) */

/*
 * HUB types - none yet
 */

typedef struct invent_generic_s {
	unsigned short	ig_module;
	unsigned short	ig_slot;
	unsigned char	ig_flag;
	int	ig_invclass;
} invent_generic_t;

#define INVENT_ENABLED	0x1

typedef struct invent_membnkinfo {
	unsigned short	imb_size;	/* bank size in MB */
	unsigned short	imb_attr;	/* Mem attributes */
	unsigned int	imb_flag;	/* bank flags */
} invent_membnkinfo_t;


typedef struct invent_meminfo {
	invent_generic_t 	im_gen;
	unsigned short	im_size;	/* memory size     */
	unsigned short	im_banks;	/* number of banks */
	/*
	 * declare an array with one element. Each platform is expected to
	 * allocate the size required based on the number of banks and set
	 * the im_banks correctly for this array traversal.
	 */
	invent_membnkinfo_t im_bank_info[1]; 
} invent_meminfo_t;

#define INV_MEM_PREMIUM	 0x01

typedef struct invent_cpuinfo {
	invent_generic_t ic_gen;
	cpu_inv_t     ic_cpu_info;
	unsigned short	ic_cpuid;
	unsigned short	ic_slice;
	unsigned short  ic_cpumode;

} invent_cpuinfo_t;

typedef struct invent_rpsinfo {
	invent_generic_t ir_gen;
	int 		 ir_xbox;	/* is RPS connected to an xbox */
} invent_rpsinfo_t;

typedef struct invent_miscinfo {
	invent_generic_t im_gen;
	int       	 im_rev;
	int		 im_version;
	int	         im_type;
	uint64_t	 im_speed;
} invent_miscinfo_t;


typedef struct invent_routerinfo{
         invent_generic_t im_gen;
         router_inv_t     rip;
} invent_routerinfo_t;



#ifdef __KERNEL__

typedef struct invplace_s {
	vertex_hdl_t		invplace_vhdl;		/* current vertex */
	vertex_hdl_t		invplace_vplace;	/* place in vertex list */
	inventory_t		*invplace_inv;		/* place in inv list on vertex */
} invplace_t; /* Magic cookie placeholder in inventory list */

extern invplace_t invplace_none;
#define INVPLACE_NONE invplace_none

extern void	    add_to_inventory(int, int, int, int, int);
extern void	    replace_in_inventory(inventory_t *, int, int, int, int, int);
extern void         start_scan_inventory(invplace_t *);
extern inventory_t  *get_next_inventory(invplace_t *);
extern void         end_scan_inventory(invplace_t *);
extern inventory_t  *find_inventory(inventory_t *, int, int, int, int, int);
extern int	    scaninvent(int (*)(inventory_t *, void *), void *);
extern int	    get_sizeof_inventory(int);

extern void device_inventory_add(	vertex_hdl_t device, 
					int class, 
					int type, 
					major_t ctlr, 
					minor_t unit, 
					int state);


extern inventory_t *device_inventory_get_next(	vertex_hdl_t device,
						invplace_t *);

extern void device_controller_num_set(	vertex_hdl_t,
					int);
extern int device_controller_num_get(	vertex_hdl_t);
#endif /* __KERNEL__ */
#endif /* _ASM_IA64_SN_INVENT_H */