pciio.h

linux-2.4.29操作系统的源码

			 vertex_hdl_t owner_dev);	/* owner of this intr */

typedef void
pciio_intr_free_f       (pciio_intr_t intr_hdl);

typedef int
pciio_intr_connect_f    (pciio_intr_t intr_hdl, intr_func_t intr_func, intr_arg_t intr_arg);	/* pciio intr resource handle */

typedef void
pciio_intr_disconnect_f (pciio_intr_t intr_hdl);

typedef vertex_hdl_t
pciio_intr_cpu_get_f    (pciio_intr_t intr_hdl);	/* pciio intr resource handle */

/* CONFIGURATION MANAGEMENT */

typedef void
pciio_provider_startup_f (vertex_hdl_t pciio_provider);

typedef void
pciio_provider_shutdown_f (vertex_hdl_t pciio_provider);

typedef int	
pciio_reset_f		(vertex_hdl_t conn);	/* pci connection point */

typedef pciio_endian_t			/* actual endianness */
pciio_endian_set_f      (vertex_hdl_t dev,	/* specify endianness for this device */
			 pciio_endian_t device_end,	/* endianness of device */
			 pciio_endian_t desired_end);	/* desired endianness */

typedef uint64_t
pciio_config_get_f	(vertex_hdl_t conn,	/* pci connection point */
			 unsigned reg,		/* register byte offset */
			 unsigned size);	/* width in bytes (1..4) */

typedef void
pciio_config_set_f	(vertex_hdl_t conn,	/* pci connection point */
			 unsigned reg,		/* register byte offset */
			 unsigned size,		/* width in bytes (1..4) */
			 uint64_t value);	/* value to store */

typedef int
pciio_error_devenable_f (vertex_hdl_t pconn_vhdl, int error_code);

typedef pciio_slot_t
pciio_error_extract_f	(vertex_hdl_t vhdl,
			 pciio_space_t *spacep,
			 iopaddr_t *addrp);

typedef void
pciio_driver_reg_callback_f	(vertex_hdl_t conn,
				int key1,
				int key2,
				int error);

typedef void
pciio_driver_unreg_callback_f	(vertex_hdl_t conn, /* pci connection point */
				 int key1,
				 int key2,
				 int error);

typedef int
pciio_device_unregister_f	(vertex_hdl_t conn);

typedef int
pciio_dma_enabled_f		(vertex_hdl_t conn);

/*
 * Adapters that provide a PCI interface adhere to this software interface.
 */
typedef struct pciio_provider_s {
    /* PIO MANAGEMENT */
    pciio_piomap_alloc_f   *piomap_alloc;
    pciio_piomap_free_f    *piomap_free;
    pciio_piomap_addr_f    *piomap_addr;
    pciio_piomap_done_f    *piomap_done;
    pciio_piotrans_addr_f  *piotrans_addr;
    pciio_piospace_alloc_f *piospace_alloc;
    pciio_piospace_free_f  *piospace_free;

    /* DMA MANAGEMENT */
    pciio_dmamap_alloc_f   *dmamap_alloc;
    pciio_dmamap_free_f    *dmamap_free;
    pciio_dmamap_addr_f    *dmamap_addr;
    pciio_dmamap_done_f    *dmamap_done;
    pciio_dmatrans_addr_f  *dmatrans_addr;
    pciio_dmamap_drain_f   *dmamap_drain;
    pciio_dmaaddr_drain_f  *dmaaddr_drain;
    pciio_dmalist_drain_f  *dmalist_drain;

    /* INTERRUPT MANAGEMENT */
    pciio_intr_alloc_f     *intr_alloc;
    pciio_intr_free_f      *intr_free;
    pciio_intr_connect_f   *intr_connect;
    pciio_intr_disconnect_f *intr_disconnect;
    pciio_intr_cpu_get_f   *intr_cpu_get;

    /* CONFIGURATION MANAGEMENT */
    pciio_provider_startup_f *provider_startup;
    pciio_provider_shutdown_f *provider_shutdown;
    pciio_reset_f	   *reset;
    pciio_endian_set_f     *endian_set;
    pciio_config_get_f	   *config_get;
    pciio_config_set_f	   *config_set;

    /* Error handling interface */
    pciio_error_devenable_f *error_devenable;
    pciio_error_extract_f *error_extract;

    /* Callback support */
    pciio_driver_reg_callback_f *driver_reg_callback;
    pciio_driver_unreg_callback_f *driver_unreg_callback;
    pciio_device_unregister_f 	*device_unregister;
    pciio_dma_enabled_f		*dma_enabled;
} pciio_provider_t;

/* PCI devices use these standard PCI provider interfaces */
extern pciio_piomap_alloc_f pciio_piomap_alloc;
extern pciio_piomap_free_f pciio_piomap_free;
extern pciio_piomap_addr_f pciio_piomap_addr;
extern pciio_piomap_done_f pciio_piomap_done;
extern pciio_piotrans_addr_f pciio_piotrans_addr;
extern pciio_pio_addr_f pciio_pio_addr;
extern pciio_piospace_alloc_f pciio_piospace_alloc;
extern pciio_piospace_free_f pciio_piospace_free;
extern pciio_dmamap_alloc_f pciio_dmamap_alloc;
extern pciio_dmamap_free_f pciio_dmamap_free;
extern pciio_dmamap_addr_f pciio_dmamap_addr;
extern pciio_dmamap_done_f pciio_dmamap_done;
extern pciio_dmatrans_addr_f pciio_dmatrans_addr;
extern pciio_dmamap_drain_f pciio_dmamap_drain;
extern pciio_dmaaddr_drain_f pciio_dmaaddr_drain;
extern pciio_dmalist_drain_f pciio_dmalist_drain;
extern pciio_intr_alloc_f pciio_intr_alloc;
extern pciio_intr_free_f pciio_intr_free;
extern pciio_intr_connect_f pciio_intr_connect;
extern pciio_intr_disconnect_f pciio_intr_disconnect;
extern pciio_intr_cpu_get_f pciio_intr_cpu_get;
extern pciio_provider_startup_f pciio_provider_startup;
extern pciio_provider_shutdown_f pciio_provider_shutdown;
extern pciio_reset_f pciio_reset;
extern pciio_endian_set_f pciio_endian_set;
extern pciio_config_get_f pciio_config_get;
extern pciio_config_set_f pciio_config_set;

/* Widgetdev in the IOERROR structure is encoded as follows.
 *	+---------------------------+
 *	| slot (7:3) | function(2:0)|
 *	+---------------------------+
 * Following are the convenience interfaces to get at form
 * a widgetdev or to break it into its constituents.
 */

#define PCIIO_WIDGETDEV_SLOT_SHFT		3
#define PCIIO_WIDGETDEV_SLOT_MASK		0x1f
#define PCIIO_WIDGETDEV_FUNC_MASK		0x7

#define pciio_widgetdev_create(slot,func)       \
        (((slot) << PCIIO_WIDGETDEV_SLOT_SHFT) + (func))

#define pciio_widgetdev_slot_get(wdev)		\
	(((wdev) >> PCIIO_WIDGETDEV_SLOT_SHFT) & PCIIO_WIDGETDEV_SLOT_MASK)

#define pciio_widgetdev_func_get(wdev)		\
	((wdev) & PCIIO_WIDGETDEV_FUNC_MASK)


/* Generic PCI card initialization interface
 */

extern int
pciio_driver_register  (pciio_vendor_id_t vendor_id,	/* card's vendor number */
			pciio_device_id_t device_id,	/* card's device number */
			char *driver_prefix,	/* driver prefix */
			unsigned flags);

extern void
pciio_error_register   (vertex_hdl_t pconn,	/* which slot */
			error_handler_f *efunc,	/* function to call */
			error_handler_arg_t einfo);	/* first parameter */

extern void             pciio_driver_unregister(char *driver_prefix);

typedef void		pciio_iter_f(vertex_hdl_t pconn);	/* a connect point */

/* Interfaces used by PCI Bus Providers to talk to
 * the Generic PCI layer.
 */
extern vertex_hdl_t
pciio_device_register  (vertex_hdl_t connectpt,	/* vertex at center of bus */
			vertex_hdl_t master,	/* card's master ASIC (pci provider) */
			pciio_slot_t slot,	/* card's slot (0..?) */
			pciio_function_t func,	/* card's func (0..?) */
			pciio_vendor_id_t vendor,	/* card's vendor number */
			pciio_device_id_t device);	/* card's device number */

extern void
pciio_device_unregister(vertex_hdl_t connectpt);

extern pciio_info_t
pciio_device_info_new  (pciio_info_t pciio_info,	/* preallocated info struct */
			vertex_hdl_t master,	/* card's master ASIC (pci provider) */
			pciio_slot_t slot,	/* card's slot (0..?) */
			pciio_function_t func,	/* card's func (0..?) */
			pciio_vendor_id_t vendor,	/* card's vendor number */
			pciio_device_id_t device);	/* card's device number */

extern void
pciio_device_info_free(pciio_info_t pciio_info);

extern vertex_hdl_t
pciio_device_info_register(
			vertex_hdl_t connectpt,	/* vertex at center of bus */
			pciio_info_t pciio_info);	/* details about conn point */

extern void
pciio_device_info_unregister(
			vertex_hdl_t connectpt,	/* vertex at center of bus */
			pciio_info_t pciio_info);	/* details about conn point */


extern int              
pciio_device_attach(
			vertex_hdl_t pcicard,   /* vertex created by pciio_device_register */
			int drv_flags);
extern int
pciio_device_detach(
			vertex_hdl_t pcicard,   /* vertex created by pciio_device_register */
                        int drv_flags);


/* create and initialize empty window mapping resource */
extern pciio_win_map_t
pciio_device_win_map_new(pciio_win_map_t win_map,	/* preallocated win map structure */
			 size_t region_size,		/* size of region to be tracked */
			 size_t page_size);		/* allocation page size */

/* destroy window mapping resource freeing up ancillary resources */
extern void
pciio_device_win_map_free(pciio_win_map_t win_map);	/* preallocated win map structure */

/* populate window mapping with free range of addresses */
extern void
pciio_device_win_populate(pciio_win_map_t win_map,	/* win map */
			  iopaddr_t ioaddr,		/* base address of free range */
			  size_t size);			/* size of free range */

/* allocate window from mapping resource */
extern iopaddr_t
pciio_device_win_alloc(struct resource * res,
		       pciio_win_alloc_t win_alloc,	/* opaque allocation cookie */
		       size_t start,			/* start unit, or 0 */
		       size_t size,			/* size of allocation */
		       size_t align);			/* alignment of allocation */

/* free previously allocated window */
extern void
pciio_device_win_free(pciio_win_alloc_t win_alloc);	/* opaque allocation cookie */


/*
 * Generic PCI interface, for use with all PCI providers
 * and all PCI devices.
 */

/* Generic PCI interrupt interfaces */
extern vertex_hdl_t     pciio_intr_dev_get(pciio_intr_t pciio_intr);
extern vertex_hdl_t     pciio_intr_cpu_get(pciio_intr_t pciio_intr);

/* Generic PCI pio interfaces */
extern vertex_hdl_t     pciio_pio_dev_get(pciio_piomap_t pciio_piomap);
extern pciio_slot_t     pciio_pio_slot_get(pciio_piomap_t pciio_piomap);
extern pciio_space_t    pciio_pio_space_get(pciio_piomap_t pciio_piomap);
extern iopaddr_t        pciio_pio_pciaddr_get(pciio_piomap_t pciio_piomap);
extern ulong            pciio_pio_mapsz_get(pciio_piomap_t pciio_piomap);
extern caddr_t          pciio_pio_kvaddr_get(pciio_piomap_t pciio_piomap);

/* Generic PCI dma interfaces */
extern vertex_hdl_t     pciio_dma_dev_get(pciio_dmamap_t pciio_dmamap);

/* Register/unregister PCI providers and get implementation handle */
extern void             pciio_provider_register(vertex_hdl_t provider, pciio_provider_t *pciio_fns);
extern void             pciio_provider_unregister(vertex_hdl_t provider);
extern pciio_provider_t *pciio_provider_fns_get(vertex_hdl_t provider);

/* Generic pci slot information access interface */
extern pciio_info_t     pciio_info_chk(vertex_hdl_t vhdl);
extern pciio_info_t     pciio_info_get(vertex_hdl_t vhdl);
extern pciio_info_t     pciio_hostinfo_get(vertex_hdl_t vhdl);
extern void             pciio_info_set(vertex_hdl_t vhdl, pciio_info_t widget_info);
extern vertex_hdl_t     pciio_info_dev_get(pciio_info_t pciio_info);
extern vertex_hdl_t     pciio_info_hostdev_get(pciio_info_t pciio_info);
extern pciio_bus_t	pciio_info_bus_get(pciio_info_t pciio_info);
extern pciio_slot_t     pciio_info_slot_get(pciio_info_t pciio_info);
extern pciio_function_t	pciio_info_function_get(pciio_info_t pciio_info);
extern pciio_vendor_id_t pciio_info_vendor_id_get(pciio_info_t pciio_info);
extern pciio_device_id_t pciio_info_device_id_get(pciio_info_t pciio_info);
extern vertex_hdl_t     pciio_info_master_get(pciio_info_t pciio_info);
extern arbitrary_info_t pciio_info_mfast_get(pciio_info_t pciio_info);
extern pciio_provider_t *pciio_info_pops_get(pciio_info_t pciio_info);
extern error_handler_f *pciio_info_efunc_get(pciio_info_t);
extern error_handler_arg_t *pciio_info_einfo_get(pciio_info_t);
extern pciio_space_t	pciio_info_bar_space_get(pciio_info_t, int);
extern iopaddr_t	pciio_info_bar_base_get(pciio_info_t, int);
extern size_t		pciio_info_bar_size_get(pciio_info_t, int);
extern iopaddr_t	pciio_info_rom_base_get(pciio_info_t);
extern size_t		pciio_info_rom_size_get(pciio_info_t);
extern int		pciio_info_type1_get(pciio_info_t);
extern int              pciio_error_handler(vertex_hdl_t, int, ioerror_mode_t, ioerror_t *);
extern int		pciio_dma_enabled(vertex_hdl_t);

/**
 * sn_pci_set_vchan - Set the requested Virtual Channel bits into the mapped DMA 
 *                    address.
 * @pci_dev: pci device pointer
 * @addr: mapped dma address
 * @vchan: Virtual Channel to use 0 or 1.
 *
 * Set the Virtual Channel bit in the mapped dma address.
 */
static inline int
sn_pci_set_vchan(struct pci_dev *pci_dev,
	dma_addr_t *addr,
	int vchan)
{

	if (vchan > 1) {
		return -1;
	}

	if (!(*addr >> 32))	/* Using a mask here would be cleaner */
		return 0;	/* but this generates better code */

	if (vchan == 1) {
		/* Set Bit 57 */
		*addr |= (1UL << 57);
	} else {
		/* Clear Bit 57 */
		*addr &= ~(1UL << 57);
	}

	return 0;
}

#endif				/* C or C++ */


/*
 * Prototypes
 */

int snia_badaddr_val(volatile void *addr, int len, volatile void *ptr);
nasid_t snia_get_console_nasid(void);
nasid_t snia_get_master_baseio_nasid(void);
void snia_ioerror_dump(char *name, int error_code, int error_mode, ioerror_t *ioerror);
int snia_pcibr_rrb_alloc(struct pci_dev *pci_dev, int *count_vchan0, int *count_vchan1);
pciio_endian_t snia_pciio_endian_set(struct pci_dev *pci_dev,
	pciio_endian_t device_end, pciio_endian_t desired_end);
iopaddr_t snia_pciio_dmatrans_addr(struct pci_dev *pci_dev, device_desc_t dev_desc,
	paddr_t paddr, size_t byte_count, unsigned flags);
pciio_dmamap_t snia_pciio_dmamap_alloc(struct pci_dev *pci_dev,
	device_desc_t dev_desc, size_t byte_count_max, unsigned flags);
void snia_pciio_dmamap_free(pciio_dmamap_t pciio_dmamap);
iopaddr_t snia_pciio_dmamap_addr(pciio_dmamap_t pciio_dmamap, paddr_t paddr,
	size_t byte_count);
void snia_pciio_dmamap_done(pciio_dmamap_t pciio_dmamap);
void *snia_kmem_zalloc(size_t size);
void snia_kmem_free(void *ptr, size_t size);
void *snia_kmem_alloc_node(register size_t size, cnodeid_t node);

#endif				/* _ASM_SN_PCI_PCIIO_H */