📄 sb1250_scd.h
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#define K_SCD_WDOG_RESET_SOFT 1#define K_SCD_WDOG_RESET_CPU0 3#define K_SCD_WDOG_RESET_CPU1 5#define K_SCD_WDOG_RESET_BOTH_CPUS 7/* This feature is present in 1250 C0 and later, but *not* in 112x A revs. */#if SIBYTE_HDR_FEATURE(1250, PASS3)#define S_SCD_WDOG_HAS_RESET 8#define M_SCD_WDOG_HAS_RESET _SB_MAKEMASK1(S_SCD_WDOG_HAS_RESET)#endif/* * Timer Registers (Table 4-11) (Table 4-12) (Table 4-13) */#define V_SCD_TIMER_FREQ 1000000#define S_SCD_TIMER_INIT 0#define M_SCD_TIMER_INIT _SB_MAKEMASK(20,S_SCD_TIMER_INIT)#define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_INIT)#define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x,S_SCD_TIMER_INIT,M_SCD_TIMER_INIT)#define S_SCD_TIMER_CNT 0#define M_SCD_TIMER_CNT _SB_MAKEMASK(20,S_SCD_TIMER_CNT)#define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_CNT)#define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x,S_SCD_TIMER_CNT,M_SCD_TIMER_CNT)#define M_SCD_TIMER_ENABLE _SB_MAKEMASK1(0)#define M_SCD_TIMER_MODE _SB_MAKEMASK1(1)#define M_SCD_TIMER_MODE_CONTINUOUS M_SCD_TIMER_MODE/* * System Performance Counters */#define S_SPC_CFG_SRC0 0#define M_SPC_CFG_SRC0 _SB_MAKEMASK(8,S_SPC_CFG_SRC0)#define V_SPC_CFG_SRC0(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC0)#define G_SPC_CFG_SRC0(x) _SB_GETVALUE(x,S_SPC_CFG_SRC0,M_SPC_CFG_SRC0)#define S_SPC_CFG_SRC1 8#define M_SPC_CFG_SRC1 _SB_MAKEMASK(8,S_SPC_CFG_SRC1)#define V_SPC_CFG_SRC1(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC1)#define G_SPC_CFG_SRC1(x) _SB_GETVALUE(x,S_SPC_CFG_SRC1,M_SPC_CFG_SRC1)#define S_SPC_CFG_SRC2 16#define M_SPC_CFG_SRC2 _SB_MAKEMASK(8,S_SPC_CFG_SRC2)#define V_SPC_CFG_SRC2(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC2)#define G_SPC_CFG_SRC2(x) _SB_GETVALUE(x,S_SPC_CFG_SRC2,M_SPC_CFG_SRC2)#define S_SPC_CFG_SRC3 24#define M_SPC_CFG_SRC3 _SB_MAKEMASK(8,S_SPC_CFG_SRC3)#define V_SPC_CFG_SRC3(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC3)#define G_SPC_CFG_SRC3(x) _SB_GETVALUE(x,S_SPC_CFG_SRC3,M_SPC_CFG_SRC3)#define M_SPC_CFG_CLEAR _SB_MAKEMASK1(32)#define M_SPC_CFG_ENABLE _SB_MAKEMASK1(33)/* * Bus Watcher */#define S_SCD_BERR_TID 8#define M_SCD_BERR_TID _SB_MAKEMASK(10,S_SCD_BERR_TID)#define V_SCD_BERR_TID(x) _SB_MAKEVALUE(x,S_SCD_BERR_TID)#define G_SCD_BERR_TID(x) _SB_GETVALUE(x,S_SCD_BERR_TID,M_SCD_BERR_TID)#define S_SCD_BERR_RID 18#define M_SCD_BERR_RID _SB_MAKEMASK(4,S_SCD_BERR_RID)#define V_SCD_BERR_RID(x) _SB_MAKEVALUE(x,S_SCD_BERR_RID)#define G_SCD_BERR_RID(x) _SB_GETVALUE(x,S_SCD_BERR_RID,M_SCD_BERR_RID)#define S_SCD_BERR_DCODE 22#define M_SCD_BERR_DCODE _SB_MAKEMASK(3,S_SCD_BERR_DCODE)#define V_SCD_BERR_DCODE(x) _SB_MAKEVALUE(x,S_SCD_BERR_DCODE)#define G_SCD_BERR_DCODE(x) _SB_GETVALUE(x,S_SCD_BERR_DCODE,M_SCD_BERR_DCODE)#define M_SCD_BERR_MULTERRS _SB_MAKEMASK1(30)#define S_SCD_L2ECC_CORR_D 0#define M_SCD_L2ECC_CORR_D _SB_MAKEMASK(8,S_SCD_L2ECC_CORR_D)#define V_SCD_L2ECC_CORR_D(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_CORR_D)#define G_SCD_L2ECC_CORR_D(x) _SB_GETVALUE(x,S_SCD_L2ECC_CORR_D,M_SCD_L2ECC_CORR_D)#define S_SCD_L2ECC_BAD_D 8#define M_SCD_L2ECC_BAD_D _SB_MAKEMASK(8,S_SCD_L2ECC_BAD_D)#define V_SCD_L2ECC_BAD_D(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_BAD_D)#define G_SCD_L2ECC_BAD_D(x) _SB_GETVALUE(x,S_SCD_L2ECC_BAD_D,M_SCD_L2ECC_BAD_D)#define S_SCD_L2ECC_CORR_T 16#define M_SCD_L2ECC_CORR_T _SB_MAKEMASK(8,S_SCD_L2ECC_CORR_T)#define V_SCD_L2ECC_CORR_T(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_CORR_T)#define G_SCD_L2ECC_CORR_T(x) _SB_GETVALUE(x,S_SCD_L2ECC_CORR_T,M_SCD_L2ECC_CORR_T)#define S_SCD_L2ECC_BAD_T 24#define M_SCD_L2ECC_BAD_T _SB_MAKEMASK(8,S_SCD_L2ECC_BAD_T)#define V_SCD_L2ECC_BAD_T(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_BAD_T)#define G_SCD_L2ECC_BAD_T(x) _SB_GETVALUE(x,S_SCD_L2ECC_BAD_T,M_SCD_L2ECC_BAD_T)#define S_SCD_MEM_ECC_CORR 0#define M_SCD_MEM_ECC_CORR _SB_MAKEMASK(8,S_SCD_MEM_ECC_CORR)#define V_SCD_MEM_ECC_CORR(x) _SB_MAKEVALUE(x,S_SCD_MEM_ECC_CORR)#define G_SCD_MEM_ECC_CORR(x) _SB_GETVALUE(x,S_SCD_MEM_ECC_CORR,M_SCD_MEM_ECC_CORR)#define S_SCD_MEM_ECC_BAD 8#define M_SCD_MEM_ECC_BAD _SB_MAKEMASK(8,S_SCD_MEM_ECC_BAD)#define V_SCD_MEM_ECC_BAD(x) _SB_MAKEVALUE(x,S_SCD_MEM_ECC_BAD)#define G_SCD_MEM_ECC_BAD(x) _SB_GETVALUE(x,S_SCD_MEM_ECC_BAD,M_SCD_MEM_ECC_BAD)#define S_SCD_MEM_BUSERR 16#define M_SCD_MEM_BUSERR _SB_MAKEMASK(8,S_SCD_MEM_BUSERR)#define V_SCD_MEM_BUSERR(x) _SB_MAKEVALUE(x,S_SCD_MEM_BUSERR)#define G_SCD_MEM_BUSERR(x) _SB_GETVALUE(x,S_SCD_MEM_BUSERR,M_SCD_MEM_BUSERR)/* * Address Trap Registers */#define M_ATRAP_INDEX _SB_MAKEMASK(4,0)#define M_ATRAP_ADDRESS _SB_MAKEMASK(40,0)#define S_ATRAP_CFG_CNT 0#define M_ATRAP_CFG_CNT _SB_MAKEMASK(3,S_ATRAP_CFG_CNT)#define V_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x,S_ATRAP_CFG_CNT)#define G_ATRAP_CFG_CNT(x) _SB_GETVALUE(x,S_ATRAP_CFG_CNT,M_ATRAP_CFG_CNT)#define M_ATRAP_CFG_WRITE _SB_MAKEMASK1(3)#define M_ATRAP_CFG_ALL _SB_MAKEMASK1(4)#define M_ATRAP_CFG_INV _SB_MAKEMASK1(5)#define M_ATRAP_CFG_USESRC _SB_MAKEMASK1(6)#define M_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7)#define S_ATRAP_CFG_AGENTID 8#define M_ATRAP_CFG_AGENTID _SB_MAKEMASK(4,S_ATRAP_CFG_AGENTID)#define V_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x,S_ATRAP_CFG_AGENTID)#define G_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x,S_ATRAP_CFG_AGENTID,M_ATRAP_CFG_AGENTID)#define K_BUS_AGENT_CPU0 0#define K_BUS_AGENT_CPU1 1#define K_BUS_AGENT_IOB0 2#define K_BUS_AGENT_IOB1 3#define K_BUS_AGENT_SCD 4#define K_BUS_AGENT_RESERVED 5#define K_BUS_AGENT_L2C 6#define K_BUS_AGENT_MC 7#define S_ATRAP_CFG_CATTR 12#define M_ATRAP_CFG_CATTR _SB_MAKEMASK(3,S_ATRAP_CFG_CATTR)#define V_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x,S_ATRAP_CFG_CATTR)#define G_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x,S_ATRAP_CFG_CATTR,M_ATRAP_CFG_CATTR)#define K_ATRAP_CFG_CATTR_IGNORE 0#define K_ATRAP_CFG_CATTR_UNC 1#define K_ATRAP_CFG_CATTR_CACHEABLE 2#define K_ATRAP_CFG_CATTR_NONCOH 3#define K_ATRAP_CFG_CATTR_COHERENT 4#define K_ATRAP_CFG_CATTR_NOTUNC 5#define K_ATRAP_CFG_CATTR_NOTNONCOH 6#define K_ATRAP_CFG_CATTR_NOTCOHERENT 7/* * Trace Buffer Config register */#define M_SCD_TRACE_CFG_RESET _SB_MAKEMASK1(0)#define M_SCD_TRACE_CFG_START_READ _SB_MAKEMASK1(1)#define M_SCD_TRACE_CFG_START _SB_MAKEMASK1(2)#define M_SCD_TRACE_CFG_STOP _SB_MAKEMASK1(3)#define M_SCD_TRACE_CFG_FREEZE _SB_MAKEMASK1(4)#define M_SCD_TRACE_CFG_FREEZE_FULL _SB_MAKEMASK1(5)#define M_SCD_TRACE_CFG_DEBUG_FULL _SB_MAKEMASK1(6)#define M_SCD_TRACE_CFG_FULL _SB_MAKEMASK1(7)#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)#define M_SCD_TRACE_CFG_FORCECNT _SB_MAKEMASK1(8)#endif /* 1250 PASS2 || 112x PASS1 */#define S_SCD_TRACE_CFG_CUR_ADDR 10#define M_SCD_TRACE_CFG_CUR_ADDR _SB_MAKEMASK(8,S_SCD_TRACE_CFG_CUR_ADDR)#define V_SCD_TRACE_CFG_CUR_ADDR(x) _SB_MAKEVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR)#define G_SCD_TRACE_CFG_CUR_ADDR(x) _SB_GETVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR,M_SCD_TRACE_CFG_CUR_ADDR)/* * Trace Event registers */#define S_SCD_TREVT_ADDR_MATCH 0#define M_SCD_TREVT_ADDR_MATCH _SB_MAKEMASK(4,S_SCD_TREVT_ADDR_MATCH)#define V_SCD_TREVT_ADDR_MATCH(x) _SB_MAKEVALUE(x,S_SCD_TREVT_ADDR_MATCH)#define G_SCD_TREVT_ADDR_MATCH(x) _SB_GETVALUE(x,S_SCD_TREVT_ADDR_MATCH,M_SCD_TREVT_ADDR_MATCH)#define M_SCD_TREVT_REQID_MATCH _SB_MAKEMASK1(4)#define M_SCD_TREVT_DATAID_MATCH _SB_MAKEMASK1(5)#define M_SCD_TREVT_RESPID_MATCH _SB_MAKEMASK1(6)#define M_SCD_TREVT_INTERRUPT _SB_MAKEMASK1(7)#define M_SCD_TREVT_DEBUG_PIN _SB_MAKEMASK1(9)#define M_SCD_TREVT_WRITE _SB_MAKEMASK1(10)#define M_SCD_TREVT_READ _SB_MAKEMASK1(11)#define S_SCD_TREVT_REQID 12#define M_SCD_TREVT_REQID _SB_MAKEMASK(4,S_SCD_TREVT_REQID)#define V_SCD_TREVT_REQID(x) _SB_MAKEVALUE(x,S_SCD_TREVT_REQID)#define G_SCD_TREVT_REQID(x) _SB_GETVALUE(x,S_SCD_TREVT_REQID,M_SCD_TREVT_REQID)#define S_SCD_TREVT_RESPID 16#define M_SCD_TREVT_RESPID _SB_MAKEMASK(4,S_SCD_TREVT_RESPID)#define V_SCD_TREVT_RESPID(x) _SB_MAKEVALUE(x,S_SCD_TREVT_RESPID)#define G_SCD_TREVT_RESPID(x) _SB_GETVALUE(x,S_SCD_TREVT_RESPID,M_SCD_TREVT_RESPID)#define S_SCD_TREVT_DATAID 20#define M_SCD_TREVT_DATAID _SB_MAKEMASK(4,S_SCD_TREVT_DATAID)#define V_SCD_TREVT_DATAID(x) _SB_MAKEVALUE(x,S_SCD_TREVT_DATAID)#define G_SCD_TREVT_DATAID(x) _SB_GETVALUE(x,S_SCD_TREVT_DATAID,M_SCD_TREVT_DATID)#define S_SCD_TREVT_COUNT 24#define M_SCD_TREVT_COUNT _SB_MAKEMASK(8,S_SCD_TREVT_COUNT)#define V_SCD_TREVT_COUNT(x) _SB_MAKEVALUE(x,S_SCD_TREVT_COUNT)#define G_SCD_TREVT_COUNT(x) _SB_GETVALUE(x,S_SCD_TREVT_COUNT,M_SCD_TREVT_COUNT)/* * Trace Sequence registers */#define S_SCD_TRSEQ_EVENT4 0#define M_SCD_TRSEQ_EVENT4 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT4)#define V_SCD_TRSEQ_EVENT4(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT4)#define G_SCD_TRSEQ_EVENT4(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT4,M_SCD_TRSEQ_EVENT4)#define S_SCD_TRSEQ_EVENT3 4#define M_SCD_TRSEQ_EVENT3 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT3)#define V_SCD_TRSEQ_EVENT3(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT3)#define G_SCD_TRSEQ_EVENT3(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT3,M_SCD_TRSEQ_EVENT3)#define S_SCD_TRSEQ_EVENT2 8#define M_SCD_TRSEQ_EVENT2 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT2)#define V_SCD_TRSEQ_EVENT2(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT2)#define G_SCD_TRSEQ_EVENT2(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT2,M_SCD_TRSEQ_EVENT2)#define S_SCD_TRSEQ_EVENT1 12#define M_SCD_TRSEQ_EVENT1 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT1)#define V_SCD_TRSEQ_EVENT1(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT1)#define G_SCD_TRSEQ_EVENT1(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT1,M_SCD_TRSEQ_EVENT1)#define K_SCD_TRSEQ_E0 0#define K_SCD_TRSEQ_E1 1#define K_SCD_TRSEQ_E2 2#define K_SCD_TRSEQ_E3 3#define K_SCD_TRSEQ_E0_E1 4#define K_SCD_TRSEQ_E1_E2 5#define K_SCD_TRSEQ_E2_E3 6#define K_SCD_TRSEQ_E0_E1_E2 7#define K_SCD_TRSEQ_E0_E1_E2_E3 8#define K_SCD_TRSEQ_E0E1 9#define K_SCD_TRSEQ_E0E1E2 10#define K_SCD_TRSEQ_E0E1E2E3 11#define K_SCD_TRSEQ_E0E1_E2 12#define K_SCD_TRSEQ_E0E1_E2E3 13#define K_SCD_TRSEQ_E0E1_E2_E3 14#define K_SCD_TRSEQ_IGNORED 15#define K_SCD_TRSEQ_TRIGGER_ALL (V_SCD_TRSEQ_EVENT1(K_SCD_TRSEQ_IGNORED) | \ V_SCD_TRSEQ_EVENT2(K_SCD_TRSEQ_IGNORED) | \ V_SCD_TRSEQ_EVENT3(K_SCD_TRSEQ_IGNORED) | \ V_SCD_TRSEQ_EVENT4(K_SCD_TRSEQ_IGNORED))#define S_SCD_TRSEQ_FUNCTION 16#define M_SCD_TRSEQ_FUNCTION _SB_MAKEMASK(4,S_SCD_TRSEQ_FUNCTION)#define V_SCD_TRSEQ_FUNCTION(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_FUNCTION)#define G_SCD_TRSEQ_FUNCTION(x) _SB_GETVALUE(x,S_SCD_TRSEQ_FUNCTION,M_SCD_TRSEQ_FUNCTION)#define K_SCD_TRSEQ_FUNC_NOP 0#define K_SCD_TRSEQ_FUNC_START 1#define K_SCD_TRSEQ_FUNC_STOP 2#define K_SCD_TRSEQ_FUNC_FREEZE 3#define V_SCD_TRSEQ_FUNC_NOP V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_NOP)#define V_SCD_TRSEQ_FUNC_START V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_START)#define V_SCD_TRSEQ_FUNC_STOP V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_STOP)#define V_SCD_TRSEQ_FUNC_FREEZE V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_FREEZE)#define M_SCD_TRSEQ_ASAMPLE _SB_MAKEMASK1(18)#define M_SCD_TRSEQ_DSAMPLE _SB_MAKEMASK1(19)#define M_SCD_TRSEQ_DEBUGPIN _SB_MAKEMASK1(20)#define M_SCD_TRSEQ_DEBUGCPU _SB_MAKEMASK1(21)#define M_SCD_TRSEQ_CLEARUSE _SB_MAKEMASK1(22)#endif⌨️ 快捷键说明
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