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📄 sb1250_dma.h

📁 linux-2.4.29操作系统的源码
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#define S_DMA_ETHRX_PKTTYPE         55#define M_DMA_ETHRX_PKTTYPE         _SB_MAKEMASK(3,S_DMA_ETHRX_PKTTYPE)#define V_DMA_ETHRX_PKTTYPE(x)      _SB_MAKEVALUE(x,S_DMA_ETHRX_PKTTYPE)#define G_DMA_ETHRX_PKTTYPE(x)      _SB_GETVALUE(x,S_DMA_ETHRX_PKTTYPE,M_DMA_ETHRX_PKTTYPE)#define K_DMA_ETHRX_PKTTYPE_IPV4    0#define K_DMA_ETHRX_PKTTYPE_ARPV4   1#define K_DMA_ETHRX_PKTTYPE_802     2#define K_DMA_ETHRX_PKTTYPE_OTHER   3#define K_DMA_ETHRX_PKTTYPE_USER0   4#define K_DMA_ETHRX_PKTTYPE_USER1   5#define K_DMA_ETHRX_PKTTYPE_USER2   6#define K_DMA_ETHRX_PKTTYPE_USER3   7#define M_DMA_ETHRX_MATCH_HASH      _SB_MAKEMASK1(58)#define M_DMA_ETHRX_MATCH_EXACT     _SB_MAKEMASK1(59)#define M_DMA_ETHRX_BCAST           _SB_MAKEMASK1(60)#define M_DMA_ETHRX_MCAST           _SB_MAKEMASK1(61)#define M_DMA_ETHRX_BAD	            _SB_MAKEMASK1(62)#define M_DMA_ETHRX_SOP             _SB_MAKEMASK1(63)/* * Ethernet Transmit Status Bits (Table 7-16) */#define M_DMA_ETHTX_SOP	    	    _SB_MAKEMASK1(63)/*  * Ethernet Transmit Options (Table 7-17) */#define K_DMA_ETHTX_NOTSOP          _SB_MAKE64(0x00)#define K_DMA_ETHTX_APPENDCRC       _SB_MAKE64(0x01)#define K_DMA_ETHTX_REPLACECRC      _SB_MAKE64(0x02)#define K_DMA_ETHTX_APPENDCRC_APPENDPAD _SB_MAKE64(0x03)#define K_DMA_ETHTX_APPENDVLAN_REPLACECRC _SB_MAKE64(0x04)#define K_DMA_ETHTX_REMOVEVLAN_REPLACECRC _SB_MAKE64(0x05)#define K_DMA_ETHTX_REPLACEVLAN_REPLACECRC _SB_MAKE64(0x6)#define K_DMA_ETHTX_NOMODS          _SB_MAKE64(0x07)#define K_DMA_ETHTX_RESERVED1       _SB_MAKE64(0x08)#define K_DMA_ETHTX_REPLACESADDR_APPENDCRC _SB_MAKE64(0x09)#define K_DMA_ETHTX_REPLACESADDR_REPLACECRC _SB_MAKE64(0x0A)#define K_DMA_ETHTX_REPLACESADDR_APPENDCRC_APPENDPAD _SB_MAKE64(0x0B)#define K_DMA_ETHTX_REPLACESADDR_APPENDVLAN_REPLACECRC _SB_MAKE64(0x0C)#define K_DMA_ETHTX_REPLACESADDR_REMOVEVLAN_REPLACECRC _SB_MAKE64(0x0D)#define K_DMA_ETHTX_REPLACESADDR_REPLACEVLAN_REPLACECRC _SB_MAKE64(0x0E)#define K_DMA_ETHTX_RESERVED2       _SB_MAKE64(0x0F)/* * Serial Receive Options (Table 7-18) */#define M_DMA_SERRX_CRC_ERROR       _SB_MAKEMASK1(56)#define M_DMA_SERRX_ABORT           _SB_MAKEMASK1(57)#define M_DMA_SERRX_OCTET_ERROR     _SB_MAKEMASK1(58)#define M_DMA_SERRX_LONGFRAME_ERROR _SB_MAKEMASK1(59)#define M_DMA_SERRX_SHORTFRAME_ERROR _SB_MAKEMASK1(60)#define M_DMA_SERRX_OVERRUN_ERROR   _SB_MAKEMASK1(61)#define M_DMA_SERRX_GOOD            _SB_MAKEMASK1(62)#define M_DMA_SERRX_SOP             _SB_MAKEMASK1(63)/* * Serial Transmit Status Bits (Table 7-20) */#define M_DMA_SERTX_FLAG	    _SB_MAKEMASK1(63)/* * Serial Transmit Options (Table 7-21) */#define K_DMA_SERTX_RESERVED        _SB_MAKEMASK1(0)#define K_DMA_SERTX_APPENDCRC       _SB_MAKEMASK1(1)#define K_DMA_SERTX_APPENDPAD       _SB_MAKEMASK1(2)#define K_DMA_SERTX_ABORT           _SB_MAKEMASK1(3)/*  *********************************************************************    *  Data Mover Registers    ********************************************************************* *//*  * Data Mover Descriptor Base Address Register (Table 7-22) * Register: DM_DSCR_BASE_0 * Register: DM_DSCR_BASE_1 * Register: DM_DSCR_BASE_2 * Register: DM_DSCR_BASE_3 */#define M_DM_DSCR_BASE_MBZ          _SB_MAKEMASK(4,0)/*  Note: Just mask the base address and then OR it in. */#define S_DM_DSCR_BASE_ADDR         _SB_MAKE64(4)#define M_DM_DSCR_BASE_ADDR         _SB_MAKEMASK(36,S_DM_DSCR_BASE_ADDR)#define S_DM_DSCR_BASE_RINGSZ       _SB_MAKE64(40)#define M_DM_DSCR_BASE_RINGSZ       _SB_MAKEMASK(16,S_DM_DSCR_BASE_RINGSZ)#define V_DM_DSCR_BASE_RINGSZ(x)    _SB_MAKEVALUE(x,S_DM_DSCR_BASE_RINGSZ)#define G_DM_DSCR_BASE_RINGSZ(x)    _SB_GETVALUE(x,S_DM_DSCR_BASE_RINGSZ,M_DM_DSCR_BASE_RINGSZ)#define S_DM_DSCR_BASE_PRIORITY     _SB_MAKE64(56)#define M_DM_DSCR_BASE_PRIORITY     _SB_MAKEMASK(3,S_DM_DSCR_BASE_PRIORITY)#define V_DM_DSCR_BASE_PRIORITY(x)  _SB_MAKEVALUE(x,S_DM_DSCR_BASE_PRIORITY)#define G_DM_DSCR_BASE_PRIORITY(x)  _SB_GETVALUE(x,S_DM_DSCR_BASE_PRIORITY,M_DM_DSCR_BASE_PRIORITY)#define K_DM_DSCR_BASE_PRIORITY_1   0#define K_DM_DSCR_BASE_PRIORITY_2   1#define K_DM_DSCR_BASE_PRIORITY_4   2#define K_DM_DSCR_BASE_PRIORITY_8   3#define K_DM_DSCR_BASE_PRIORITY_16  4#define M_DM_DSCR_BASE_ACTIVE       _SB_MAKEMASK1(59)#define M_DM_DSCR_BASE_INTERRUPT    _SB_MAKEMASK1(60)#define M_DM_DSCR_BASE_RESET        _SB_MAKEMASK1(61)	/* write register */#define M_DM_DSCR_BASE_ERROR        _SB_MAKEMASK1(61)	/* read register */#define M_DM_DSCR_BASE_ABORT        _SB_MAKEMASK1(62)#define M_DM_DSCR_BASE_ENABL        _SB_MAKEMASK1(63)/*  * Data Mover Descriptor Count Register (Table 7-25) *//* no bitfields *//* * Data Mover Current Descriptor Address (Table 7-24) * Register: DM_CUR_DSCR_ADDR_0 * Register: DM_CUR_DSCR_ADDR_1 * Register: DM_CUR_DSCR_ADDR_2 * Register: DM_CUR_DSCR_ADDR_3 */#define S_DM_CUR_DSCR_DSCR_ADDR     _SB_MAKE64(0)#define M_DM_CUR_DSCR_DSCR_ADDR     _SB_MAKEMASK(40,S_DM_CUR_DSCR_DSCR_ADDR)#define S_DM_CUR_DSCR_DSCR_COUNT    _SB_MAKE64(48)#define M_DM_CUR_DSCR_DSCR_COUNT    _SB_MAKEMASK(16,S_DM_CUR_DSCR_DSCR_COUNT)#define V_DM_CUR_DSCR_DSCR_COUNT(r) _SB_MAKEVALUE(r,S_DM_CUR_DSCR_DSCR_COUNT)#define G_DM_CUR_DSCR_DSCR_COUNT(r) _SB_GETVALUE(r,S_DM_CUR_DSCR_DSCR_COUNT,\                                     M_DM_CUR_DSCR_DSCR_COUNT)#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)/* * Data Mover Channel Partial Result Registers * Register: DM_PARTIAL_0 * Register: DM_PARTIAL_1 * Register: DM_PARTIAL_2 * Register: DM_PARTIAL_3 */#define S_DM_PARTIAL_CRC_PARTIAL      _SB_MAKE64(0)#define M_DM_PARTIAL_CRC_PARTIAL      _SB_MAKEMASK(32,S_DM_PARTIAL_CRC_PARTIAL)#define V_DM_PARTIAL_CRC_PARTIAL(r)   _SB_MAKEVALUE(r,S_DM_PARTIAL_CRC_PARTIAL)#define G_DM_PARTIAL_CRC_PARTIAL(r)   _SB_GETVALUE(r,S_DM_PARTIAL_CRC_PARTIAL,\                                       M_DM_PARTIAL_CRC_PARTIAL)#define S_DM_PARTIAL_TCPCS_PARTIAL    _SB_MAKE64(32)#define M_DM_PARTIAL_TCPCS_PARTIAL    _SB_MAKEMASK(16,S_DM_PARTIAL_TCPCS_PARTIAL)#define V_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_MAKEVALUE(r,S_DM_PARTIAL_TCPCS_PARTIAL)#define G_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_GETVALUE(r,S_DM_PARTIAL_TCPCS_PARTIAL,\                                       M_DM_PARTIAL_TCPCS_PARTIAL)#define M_DM_PARTIAL_ODD_BYTE         _SB_MAKEMASK1(48)#endif /* 1250 PASS3 || 112x PASS1 */#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)/* * Data Mover CRC Definition Registers * Register: CRC_DEF_0 * Register: CRC_DEF_1 */#define S_CRC_DEF_CRC_INIT            _SB_MAKE64(0)#define M_CRC_DEF_CRC_INIT            _SB_MAKEMASK(32,S_CRC_DEF_CRC_INIT)#define V_CRC_DEF_CRC_INIT(r)         _SB_MAKEVALUE(r,S_CRC_DEF_CRC_INIT)#define G_CRC_DEF_CRC_INIT(r)         _SB_GETVALUE(r,S_CRC_DEF_CRC_INIT,\                                       M_CRC_DEF_CRC_INIT)#define S_CRC_DEF_CRC_POLY            _SB_MAKE64(32)#define M_CRC_DEF_CRC_POLY            _SB_MAKEMASK(32,S_CRC_DEF_CRC_POLY)#define V_CRC_DEF_CRC_POLY(r)         _SB_MAKEVALUE(r,S_CRC_DEF_CRC_POLY)#define G_CRC_DEF_CRC_POLY(r)         _SB_GETVALUE(r,S_CRC_DEF_CRC_POLY,\                                       M_CRC_DEF_CRC_POLY)#endif /* 1250 PASS3 || 112x PASS1 */#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)/* * Data Mover CRC/Checksum Definition Registers * Register: CTCP_DEF_0 * Register: CTCP_DEF_1 */#define S_CTCP_DEF_CRC_TXOR           _SB_MAKE64(0)#define M_CTCP_DEF_CRC_TXOR           _SB_MAKEMASK(32,S_CTCP_DEF_CRC_TXOR)#define V_CTCP_DEF_CRC_TXOR(r)        _SB_MAKEVALUE(r,S_CTCP_DEF_CRC_TXOR)#define G_CTCP_DEF_CRC_TXOR(r)        _SB_GETVALUE(r,S_CTCP_DEF_CRC_TXOR,\                                       M_CTCP_DEF_CRC_TXOR)#define S_CTCP_DEF_TCPCS_INIT         _SB_MAKE64(32)#define M_CTCP_DEF_TCPCS_INIT         _SB_MAKEMASK(16,S_CTCP_DEF_TCPCS_INIT)#define V_CTCP_DEF_TCPCS_INIT(r)      _SB_MAKEVALUE(r,S_CTCP_DEF_TCPCS_INIT)#define G_CTCP_DEF_TCPCS_INIT(r)      _SB_GETVALUE(r,S_CTCP_DEF_TCPCS_INIT,\                                       M_CTCP_DEF_TCPCS_INIT)#define S_CTCP_DEF_CRC_WIDTH          _SB_MAKE64(48)#define M_CTCP_DEF_CRC_WIDTH          _SB_MAKEMASK(2,S_CTCP_DEF_CRC_WIDTH)#define V_CTCP_DEF_CRC_WIDTH(r)       _SB_MAKEVALUE(r,S_CTCP_DEF_CRC_WIDTH)#define G_CTCP_DEF_CRC_WIDTH(r)       _SB_GETVALUE(r,S_CTCP_DEF_CRC_WIDTH,\                                       M_CTCP_DEF_CRC_WIDTH)#define K_CTCP_DEF_CRC_WIDTH_4        0#define K_CTCP_DEF_CRC_WIDTH_2        1#define K_CTCP_DEF_CRC_WIDTH_1        2#define M_CTCP_DEF_CRC_BIT_ORDER      _SB_MAKEMASK1(50)#endif /* 1250 PASS3 || 112x PASS1 *//* * Data Mover Descriptor Doubleword "A"  (Table 7-26) */#define S_DM_DSCRA_DST_ADDR         _SB_MAKE64(0)#define M_DM_DSCRA_DST_ADDR         _SB_MAKEMASK(40,S_DM_DSCRA_DST_ADDR)#define M_DM_DSCRA_UN_DEST          _SB_MAKEMASK1(40)#define M_DM_DSCRA_UN_SRC           _SB_MAKEMASK1(41)#define M_DM_DSCRA_INTERRUPT        _SB_MAKEMASK1(42)#if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)#define M_DM_DSCRA_THROTTLE         _SB_MAKEMASK1(43)#endif /* up to 1250 PASS1 */#define S_DM_DSCRA_DIR_DEST         _SB_MAKE64(44)#define M_DM_DSCRA_DIR_DEST         _SB_MAKEMASK(2,S_DM_DSCRA_DIR_DEST)#define V_DM_DSCRA_DIR_DEST(x)      _SB_MAKEVALUE(x,S_DM_DSCRA_DIR_DEST)#define G_DM_DSCRA_DIR_DEST(x)      _SB_GETVALUE(x,S_DM_DSCRA_DIR_DEST,M_DM_DSCRA_DIR_DEST)#define K_DM_DSCRA_DIR_DEST_INCR    0#define K_DM_DSCRA_DIR_DEST_DECR    1#define K_DM_DSCRA_DIR_DEST_CONST   2#define V_DM_DSCRA_DIR_DEST_INCR    _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_INCR,S_DM_DSCRA_DIR_DEST)#define V_DM_DSCRA_DIR_DEST_DECR    _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_DECR,S_DM_DSCRA_DIR_DEST)#define V_DM_DSCRA_DIR_DEST_CONST   _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_CONST,S_DM_DSCRA_DIR_DEST)#define S_DM_DSCRA_DIR_SRC          _SB_MAKE64(46)#define M_DM_DSCRA_DIR_SRC          _SB_MAKEMASK(2,S_DM_DSCRA_DIR_SRC)#define V_DM_DSCRA_DIR_SRC(x)       _SB_MAKEVALUE(x,S_DM_DSCRA_DIR_SRC)#define G_DM_DSCRA_DIR_SRC(x)       _SB_GETVALUE(x,S_DM_DSCRA_DIR_SRC,M_DM_DSCRA_DIR_SRC)#define K_DM_DSCRA_DIR_SRC_INCR     0#define K_DM_DSCRA_DIR_SRC_DECR     1#define K_DM_DSCRA_DIR_SRC_CONST    2#define V_DM_DSCRA_DIR_SRC_INCR     _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_INCR,S_DM_DSCRA_DIR_SRC)#define V_DM_DSCRA_DIR_SRC_DECR     _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_DECR,S_DM_DSCRA_DIR_SRC)#define V_DM_DSCRA_DIR_SRC_CONST    _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_CONST,S_DM_DSCRA_DIR_SRC)#define M_DM_DSCRA_ZERO_MEM         _SB_MAKEMASK1(48)#define M_DM_DSCRA_PREFETCH         _SB_MAKEMASK1(49)#define M_DM_DSCRA_L2C_DEST         _SB_MAKEMASK1(50)#define M_DM_DSCRA_L2C_SRC          _SB_MAKEMASK1(51)#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)#define M_DM_DSCRA_RD_BKOFF	    _SB_MAKEMASK1(52)#define M_DM_DSCRA_WR_BKOFF	    _SB_MAKEMASK1(53)#endif /* 1250 PASS2 || 112x PASS1 */#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)#define M_DM_DSCRA_TCPCS_EN         _SB_MAKEMASK1(54)#define M_DM_DSCRA_TCPCS_RES        _SB_MAKEMASK1(55)#define M_DM_DSCRA_TCPCS_AP         _SB_MAKEMASK1(56)#define M_DM_DSCRA_CRC_EN           _SB_MAKEMASK1(57)#define M_DM_DSCRA_CRC_RES          _SB_MAKEMASK1(58)#define M_DM_DSCRA_CRC_AP           _SB_MAKEMASK1(59)#define M_DM_DSCRA_CRC_DFN          _SB_MAKEMASK1(60)#define M_DM_DSCRA_CRC_XBIT         _SB_MAKEMASK1(61)#endif /* 1250 PASS3 || 112x PASS1 */#define M_DM_DSCRA_RESERVED2        _SB_MAKEMASK(3,61)/* * Data Mover Descriptor Doubleword "B"  (Table 7-25) */#define S_DM_DSCRB_SRC_ADDR         _SB_MAKE64(0)#define M_DM_DSCRB_SRC_ADDR         _SB_MAKEMASK(40,S_DM_DSCRB_SRC_ADDR)#define S_DM_DSCRB_SRC_LENGTH       _SB_MAKE64(40)#define M_DM_DSCRB_SRC_LENGTH       _SB_MAKEMASK(20,S_DM_DSCRB_SRC_LENGTH)#define V_DM_DSCRB_SRC_LENGTH(x)    _SB_MAKEVALUE(x,S_DM_DSCRB_SRC_LENGTH)#define G_DM_DSCRB_SRC_LENGTH(x)    _SB_GETVALUE(x,S_DM_DSCRB_SRC_LENGTH,M_DM_DSCRB_SRC_LENGTH)#endif

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