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📄 nv4ref.h

📁 linux-2.4.29操作系统的源码
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 /***************************************************************************\|*                                                                           *||*       Copyright 1993-1998 NVIDIA, Corporation.  All rights reserved.      *||*                                                                           *||*     NOTICE TO USER:   The source code  is copyrighted under  U.S. and     *||*     international laws.  Users and possessors of this source code are     *||*     hereby granted a nonexclusive,  royalty-free copyright license to     *||*     use this code in individual and commercial software.                  *||*                                                                           *||*     Any use of this source code must include,  in the user documenta-     *||*     tion and  internal comments to the code,  notices to the end user     *||*     as follows:                                                           *||*                                                                           *||*       Copyright 1993-1998 NVIDIA, Corporation.  All rights reserved.      *||*                                                                           *||*     NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY     *||*     OF  THIS SOURCE  CODE  FOR ANY PURPOSE.  IT IS  PROVIDED  "AS IS"     *||*     WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND.  NVIDIA, CORPOR-     *||*     ATION DISCLAIMS ALL WARRANTIES  WITH REGARD  TO THIS SOURCE CODE,     *||*     INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE-     *||*     MENT,  AND FITNESS  FOR A PARTICULAR PURPOSE.   IN NO EVENT SHALL     *||*     NVIDIA, CORPORATION  BE LIABLE FOR ANY SPECIAL,  INDIRECT,  INCI-     *||*     DENTAL, OR CONSEQUENTIAL DAMAGES,  OR ANY DAMAGES  WHATSOEVER RE-     *||*     SULTING FROM LOSS OF USE,  DATA OR PROFITS,  WHETHER IN AN ACTION     *||*     OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,  ARISING OUT OF     *||*     OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE.     *||*                                                                           *||*     U.S. Government  End  Users.   This source code  is a "commercial     *||*     item,"  as that  term is  defined at  48 C.F.R. 2.101 (OCT 1995),     *||*     consisting  of "commercial  computer  software"  and  "commercial     *||*     computer  software  documentation,"  as such  terms  are  used in     *||*     48 C.F.R. 12.212 (SEPT 1995)  and is provided to the U.S. Govern-     *||*     ment only as  a commercial end item.   Consistent with  48 C.F.R.     *||*     12.212 and  48 C.F.R. 227.7202-1 through  227.7202-4 (JUNE 1995),     *||*     all U.S. Government End Users  acquire the source code  with only     *||*     those rights set forth herein.                                        *||*                                                                           *| \***************************************************************************//* * GPL licensing note -- nVidia is allowing a liberal interpretation of * the documentation restriction above, to merely say that this nVidia's * copyright and disclaimer should be included with all code derived * from this source.  -- Jeff Garzik <jgarzik@pobox.com>, 01/Nov/99  */ /***************************************************************************\|*            Modified 1999 by Fredrik Reite (fredrik@reite.com)             *| \***************************************************************************/#ifndef __NV4REF_H__#define __NV4REF_H__/* Magic values to lock/unlock extended regs */#define NV_CIO_SR_LOCK_INDEX				     0x0000001F /*       */#define NV_CIO_SR_UNLOCK_RW_VALUE                            0x00000057 /*       */#define NV_CIO_SR_UNLOCK_RO_VALUE                            0x00000075 /*       */#define NV_CIO_SR_LOCK_VALUE                                 0x00000099 /*       */#define UNLOCK_EXT_MAGIC 0x57#define LOCK_EXT_MAGIC 0x99 /* Any value other than 0x57 will do */#define LOCK_EXT_INDEX 0x6#define NV_PCRTC_HORIZ_TOTAL                                 0x00#define NV_PCRTC_HORIZ_DISPLAY_END                           0x01#define NV_PCRTC_HORIZ_BLANK_START                           0x02#define NV_PCRTC_HORIZ_BLANK_END                             0x03#define NV_PCRTC_HORIZ_BLANK_END_EVRA                        7:7#define NV_PCRTC_HORIZ_BLANK_END_DISPLAY_END_SKEW            6:5#define NV_PCRTC_HORIZ_BLANK_END_HORIZ_BLANK_END             4:0#define NV_PCRTC_HORIZ_RETRACE_START                         0x04#define NV_PCRTC_HORIZ_RETRACE_END                           0x05#define NV_PCRTC_HORIZ_RETRACE_END_HORIZ_BLANK_END_5         7:7#define NV_PCRTC_HORIZ_RETRACE_END_HORIZ_RETRACE_SKEW        6:5#define NV_PCRTC_HORIZ_RETRACE_END_HORIZ_RETRACE_END         4:0#define NV_PCRTC_VERT_TOTAL                                  0x06#define NV_PCRTC_OVERFLOW                                    0x07#define NV_PCRTC_OVERFLOW_VERT_RETRACE_START_9               7:7#define NV_PCRTC_OVERFLOW_VERT_DISPLAY_END_9                 6:6#define NV_PCRTC_OVERFLOW_VERT_TOTAL_9                       5:5#define NV_PCRTC_OVERFLOW_LINE_COMPARE_8                     4:4#define NV_PCRTC_OVERFLOW_VERT_BLANK_START_8                 3:3#define NV_PCRTC_OVERFLOW_VERT_RETRACE_START_8               2:2#define NV_PCRTC_OVERFLOW_VERT_DISPLAY_END_8                 1:1#define NV_PCRTC_OVERFLOW_VERT_TOTAL_8                       0:0#define NV_PCRTC_PRESET_ROW_SCAN                             0x08#define NV_PCRTC_MAX_SCAN_LINE                               0x09#define NV_PCRTC_MAX_SCAN_LINE_DOUBLE_SCAN                   7:7#define NV_PCRTC_MAX_SCAN_LINE_LINE_COMPARE_9                6:6#define NV_PCRTC_MAX_SCAN_LINE_VERT_BLANK_START_9            5:5#define NV_PCRTC_MAX_SCAN_LINE_MAX_SCAN_LINE                 4:0#define NV_PCRTC_CURSOR_START                                0x0A#define NV_PCRTC_CURSOR_END                                  0x0B#define NV_PCRTC_START_ADDR_HIGH                             0x0C#define NV_PCRTC_START_ADDR_LOW                              0x0D#define NV_PCRTC_CURSOR_LOCATION_HIGH                        0x0E#define NV_PCRTC_CURSOR_LOCATION_LOW                         0x0F#define NV_PCRTC_VERT_RETRACE_START                          0x10#define NV_PCRTC_VERT_RETRACE_END                            0x11#define NV_PCRTC_VERT_DISPLAY_END                            0x12#define NV_PCRTC_OFFSET                                      0x13#define NV_PCRTC_UNDERLINE_LOCATION                          0x14#define NV_PCRTC_VERT_BLANK_START                            0x15#define NV_PCRTC_VERT_BLANK_END                              0x16#define NV_PCRTC_MODE_CONTROL                                0x17#define NV_PCRTC_LINE_COMPARE                                0x18/* Extended offset and start address */#define NV_PCRTC_REPAINT0                                    0x19#define NV_PCRTC_REPAINT0_OFFSET_10_8                        7:5 #define NV_PCRTC_REPAINT0_START_ADDR_20_16                   4:0/* Horizonal extended bits */#define NV_PCRTC_HORIZ_EXTRA                                 0x2d#define NV_PCRTC_HORIZ_EXTRA_INTER_HALF_START_8              4:4#define NV_PCRTC_HORIZ_EXTRA_HORIZ_RETRACE_START_8           3:3#define NV_PCRTC_HORIZ_EXTRA_HORIZ_BLANK_START_8             2:2#define NV_PCRTC_HORIZ_EXTRA_DISPLAY_END_8                   1:1#define NV_PCRTC_HORIZ_EXTRA_DISPLAY_TOTAL_8                 0:0/* Assorted extra bits */#define NV_PCRTC_EXTRA                                       0x25#define NV_PCRTC_EXTRA_OFFSET_11                             5:5#define NV_PCRTC_EXTRA_HORIZ_BLANK_END_6                     4:4#define NV_PCRTC_EXTRA_VERT_BLANK_START_10                   3:3#define NV_PCRTC_EXTRA_VERT_RETRACE_START_10                 2:2#define NV_PCRTC_EXTRA_VERT_DISPLAY_END_10                   1:1#define NV_PCRTC_EXTRA_VERT_TOTAL_10                         0:0/* Controls how much data the refresh fifo requests */#define NV_PCRTC_FIFO_CONTROL                                0x1b#define NV_PCRTC_FIFO_CONTROL_UNDERFLOW_WARN                 7:7#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH                   2:0#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_8                 0x0#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_32                0x1#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_64                0x2#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_128               0x3#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_256               0x4/* When the fifo occupancy falls below *twice* the watermark, * the refresh fifo will start to be refilled. If this value is  * too low, you will get junk on the screen. Too high, and performance * will suffer. Watermark in units of 8 bytes */#define NV_PCRTC_FIFO                                        0x20#define NV_PCRTC_FIFO_RESET                                  7:7#define NV_PCRTC_FIFO_WATERMARK                              5:0/* Various flags */#define NV_PCRTC_REPAINT1                                    0x1a#define NV_PCRTC_REPAINT1_HSYNC                              7:7#define NV_PCRTC_REPAINT1_HYSNC_DISABLE                      0x01#define NV_PCRTC_REPAINT1_HYSNC_ENABLE                       0x00#define NV_PCRTC_REPAINT1_VSYNC                              6:6#define NV_PCRTC_REPAINT1_VYSNC_DISABLE                      0x01#define NV_PCRTC_REPAINT1_VYSNC_ENABLE                       0x00#define NV_PCRTC_REPAINT1_COMPATIBLE_TEXT                    4:4#define NV_PCRTC_REPAINT1_COMPATIBLE_TEXT_ENABLE             0x01#define NV_PCRTC_REPAINT1_COMPATIBLE_TEXT_DISABLE            0x00#define NV_PCRTC_REPAINT1_LARGE_SCREEN                       2:2 #define NV_PCRTC_REPAINT1_LARGE_SCREEN_DISABLE               0x01#define NV_PCRTC_REPAINT1_LARGE_SCREEN_ENABLE                0x00 /* >=1280 */#define NV_PCRTC_REPAINT1_PALETTE_WIDTH                      1:1#define NV_PCRTC_REPAINT1_PALETTE_WIDTH_8BITS                0x00#define NV_PCRTC_REPAINT1_PALETTE_WIDTH_6BITS                0x01

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