atyfb_base.c

linux-2.4.29操作系统的源码

    /* Mach64 GTC (3D RAGE PRO) */
    { 0x4742, 0x4742, 0x00, 0x00, m64n_gtc_ba,  230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
    { 0x4744, 0x4744, 0x00, 0x00, m64n_gtc_ba1, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
    { 0x4749, 0x4749, 0x00, 0x00, m64n_gtc_bp,  230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_MAGIC_VRAM_SIZE },
    { 0x4750, 0x4750, 0x00, 0x00, m64n_gtc_pp,  230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
    { 0x4751, 0x4751, 0x00, 0x00, m64n_gtc_ppl, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },

    /* 3D RAGE XL */
    { 0x4752, 0x4752, 0x00, 0x00, m64n_xl,      235,  83,  63, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_XL_DLL },

    /* Mach64 LT PRO */
    { 0x4c42, 0x4c42, 0x00, 0x00, m64n_ltp_a,   236,  75, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_EXTRA_BRIGHT},
    { 0x4c44, 0x4c44, 0x00, 0x00, m64n_ltp_p,   230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_EXTRA_BRIGHT},
    { 0x4c49, 0x4c49, 0x00, 0x00, m64n_ltp_p,   230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_EXTRA_BRIGHT | M64F_G3_PB_1_1 | M64F_G3_PB_1024x768 },
    { 0x4c50, 0x4c50, 0x00, 0x00, m64n_ltp_p,   230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_EXTRA_BRIGHT},

    /* 3D RAGE Mobility */
    { 0x4c4d, 0x4c4d, 0x00, 0x00, m64n_mob_p,   230,  83, 125, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_MOBIL_BUS | M64F_EXTRA_BRIGHT},
    { 0x4c4e, 0x4c4e, 0x00, 0x00, m64n_mob_a,   230,  83, 125, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_MOBIL_BUS | M64F_EXTRA_BRIGHT},
#endif /* CONFIG_FB_ATY_CT */
};

#if defined(CONFIG_FB_ATY_GX) || defined(CONFIG_FB_ATY_CT)
static char ram_dram[] __initdata = "DRAM";
static char ram_resv[] __initdata = "RESV";
#endif /* CONFIG_FB_ATY_GX || CONFIG_FB_ATY_CT */

#ifdef CONFIG_FB_ATY_GX
static char ram_vram[] __initdata = "VRAM";
#endif /* CONFIG_FB_ATY_GX */

#ifdef CONFIG_FB_ATY_CT
static char ram_edo[] __initdata = "EDO";
static char ram_sdram[] __initdata = "SDRAM";
static char ram_sgram[] __initdata = "SGRAM";
static char ram_wram[] __initdata = "WRAM";
static char ram_off[] __initdata = "OFF";
#endif /* CONFIG_FB_ATY_CT */

#ifdef CONFIG_FB_ATY_GX
static char *aty_gx_ram[8] __initdata = {
    ram_dram, ram_vram, ram_vram, ram_dram,
    ram_dram, ram_vram, ram_vram, ram_resv
};
#endif /* CONFIG_FB_ATY_GX */

#ifdef CONFIG_FB_ATY_CT
static char *aty_ct_ram[8] __initdata = {
    ram_off, ram_dram, ram_edo, ram_edo,
    ram_sdram, ram_sgram, ram_wram, ram_resv
};
#endif /* CONFIG_FB_ATY_CT */


#if defined(CONFIG_PPC)

    /*
     *  Apple monitor sense
     */

static int __init read_aty_sense(const struct fb_info_aty *info)
{
    int sense, i;

    aty_st_le32(GP_IO, 0x31003100, info);       /* drive outputs high */
    __delay(200);
    aty_st_le32(GP_IO, 0, info);                /* turn off outputs */
    __delay(2000);
    i = aty_ld_le32(GP_IO, info);               /* get primary sense value */
    sense = ((i & 0x3000) >> 3) | (i & 0x100);

    /* drive each sense line low in turn and collect the other 2 */
    aty_st_le32(GP_IO, 0x20000000, info);       /* drive A low */
    __delay(2000);
    i = aty_ld_le32(GP_IO, info);
    sense |= ((i & 0x1000) >> 7) | ((i & 0x100) >> 4);
    aty_st_le32(GP_IO, 0x20002000, info);       /* drive A high again */
    __delay(200);

    aty_st_le32(GP_IO, 0x10000000, info);       /* drive B low */
    __delay(2000);
    i = aty_ld_le32(GP_IO, info);
    sense |= ((i & 0x2000) >> 10) | ((i & 0x100) >> 6);
    aty_st_le32(GP_IO, 0x10001000, info);       /* drive B high again */
    __delay(200);

    aty_st_le32(GP_IO, 0x01000000, info);       /* drive C low */
    __delay(2000);
    sense |= (aty_ld_le32(GP_IO, info) & 0x3000) >> 12;
    aty_st_le32(GP_IO, 0, info);                /* turn off outputs */

    return sense;
}

#endif /* defined(CONFIG_PPC) */

#if defined(CONFIG_PMAC_PBOOK) || defined(CONFIG_PMAC_BACKLIGHT) || defined (CONFIG_FB_ATY_GENERIC_LCD)
static void aty_st_lcd(int index, u32 val, const struct fb_info_aty *info)
{
    unsigned long temp;

    /* write addr byte */
    temp = aty_ld_le32(LCD_INDEX, info);
    aty_st_le32(LCD_INDEX, (temp & ~LCD_INDEX_MASK) | index, info);
    /* write the register value */
    aty_st_le32(LCD_DATA, val, info);
}

static u32 aty_ld_lcd(int index, const struct fb_info_aty *info)
{
    unsigned long temp;

    /* write addr byte */
    temp = aty_ld_le32(LCD_INDEX, info);
    aty_st_le32(LCD_INDEX, (temp & ~LCD_INDEX_MASK) | index, info);
    /* read the register value */
    return aty_ld_le32(LCD_DATA, info);
}
#endif /* CONFIG_PMAC_PBOOK || CONFIG_PMAC_BACKLIGHT || CONFIG_FB_ATY_GENERIC_LCD*/

/* ------------------------------------------------------------------------- */

    /*
     *  CRTC programming
     */

static void aty_set_crtc(const struct fb_info_aty *info,
                         const struct crtc *crtc)
{
    aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_tot_disp, info);
    aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid, info);
#ifdef CONFIG_FB_ATY_GENERIC_LCD
    /* HACK:
     * I don't want to do this, but Geert Uytterhoeven's laptop seems to
     * have some shadowing enabled that I don't know yet how to switch
     * off. It is a Rage Mobility M1, but doesn't happen on these chips
     * in general. (Daniel Mantione, 26 june 2003)
     */
      aty_st_lcd(LCD_GEN_CTRL, aty_ld_lcd(LCD_GEN_CTRL, info) | SHADOW_RW_EN,
		 info);
      aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_tot_disp, info);
      aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid, info);
      aty_st_lcd(LCD_GEN_CTRL, aty_ld_lcd(LCD_GEN_CTRL, info) & ~SHADOW_RW_EN,
		 info);
    /* End hack */
#endif

    aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_tot_disp, info);
    aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid, info);
    aty_st_le32(CRTC_VLINE_CRNT_VLINE, 0, info);
    aty_st_le32(CRTC_OFF_PITCH, crtc->off_pitch, info);
    aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl, info);
/*    printk(KERN_INFO "CRTC_GEN_CNTL: %x\n",crtc->gen_cntl);
    printk(KERN_INFO "CRTC_H_TOTAL_DISP: %x\n",crtc->h_tot_disp);
    printk(KERN_INFO "CRTC_H_SYNC_STRT_WID: %x\n",crtc->h_sync_strt_wid);
    printk(KERN_INFO "CRTC_V_TOTAL_DISP: %x\n",crtc->v_tot_disp);
    printk(KERN_INFO "CRTC_V_SYNC_STRT_WID: %x\n",crtc->v_sync_strt_wid);*/
#ifdef CONFIG_FB_ATY_GENERIC_LCD
    /* After setting the CRTC registers we should set the LCD
       registers.
     */
    if (info->lcd_table != 0) {
	u32 v;
        /* Enable/disable horizontal stretching */
        v = aty_ld_lcd(HORZ_STRETCHING, info);
        v = v & ~(HORZ_STRETCH_RATIO | HORZ_STRETCH_EN | AUTO_HORZ_RATIO |
	          HORZ_STRETCH_LOOP);
        v = v | HORZ_STRETCH_MODE; /* Use interpolation instead of duplication. */
        if (crtc->h_stretching != 0)
            v = v | HORZ_STRETCH_EN | crtc->h_stretching;
        aty_st_lcd(HORZ_STRETCHING, v, info);
        /*printk(KERN_INFO "HORZ_STRETCHING: %x\n", v);*/
        
        /* Enable/disable vertital stretching */
        v = aty_ld_lcd(VERT_STRETCHING, info);
        v = v & ~(VERT_STRETCH_RATIO0 | VERT_STRETCH_EN);
        v = v | VERT_STRETCH_USE0; /* Use VERT_STRETCH_RATIO0. */
        if (crtc->v_stretching != 0)
            v = v | VERT_STRETCH_EN | crtc->v_stretching;
        aty_st_lcd(VERT_STRETCHING, v, info);
        /*printk(KERN_INFO "VERT_STRETCHING: %x\n", v);*/
        v = aty_ld_lcd(EXT_VERT_STRETCH, info);
        v = v & ~AUTO_VERT_RATIO;  /* Forbit the chip to guess the vertical
                                      expansion (used for vga compatibility) */
        v = v | VERT_STRETCH_MODE; /* Use interpolation instead of duplication. */
        aty_st_lcd(EXT_VERT_STRETCH, v, info);
        /*printk(KERN_INFO "EXT_VERT_STRETCH: %x\n", v);*/
        
        /* Don't use shadowing. Don't divide the horizontal paramters.
           (VGA compatibility junk that might be enabled.)
           Enable only the monitors that were enabled before we switched the
           video mode.
         */
        v = aty_ld_lcd(LCD_GEN_CTRL, info);
        v = v & ~(HORZ_DIVBY2_EN | DISABLE_PCLK_RESET | SCLK_SEL |
		  DIS_HOR_CRT_DIVBY2 | VCLK_DAC_PM_EN | XTALIN_PM_EN |
		  CRTC_RW_SELECT | USE_SHADOWED_ROWCUR |
		  USE_SHADOWED_VEND | SHADOW_EN | SHADOW_RW_EN |
		  LCD_ON | CRT_ON);
        v = v | DONT_SHADOW_VPAR | crtc->monitors_enabled;
        aty_st_lcd(LCD_GEN_CTRL, v, info);
        /*printk(KERN_INFO "LCD_GEN_CTRL: %x\n", v);*/
        aty_st_lcd(CONFIG_PANEL, aty_ld_lcd(CONFIG_PANEL, info) |
                                 DONT_SHADOW_HEND, info);
    };
#endif
}

static int aty_var_to_crtc(const struct fb_info_aty *info,
                           const struct fb_var_screeninfo *var,
                           struct crtc *crtc, u32 *monitors_enabled)
{
    u32 xres, yres, ryres, vxres, vyres, xoffset, yoffset, bpp;
    u32 left, right, upper, lower, hslen, vslen, sync, vmode;
    u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
    u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
    u32 pix_width, dp_pix_width, dp_chain_mask;
#ifdef CONFIG_FB_ATY_GENERIC_LCD
    u32 lcd_hsync_start,lcd_htotal,lcd_vsync_start,lcd_vtotal;
#endif

    /* input */
    xres = var->xres;
    yres = var->yres;
    ryres = yres;
    vxres = var->xres_virtual;
    vyres = var->yres_virtual;
    xoffset = var->xoffset;
    yoffset = var->yoffset;
    bpp = var->bits_per_pixel;
    left = var->left_margin;
    right = var->right_margin;
    upper = var->upper_margin;
    
    lower = var->lower_margin;
    hslen = var->hsync_len;
    vslen = var->vsync_len;
    sync = var->sync;
    vmode = var->vmode;

    /* convert (and round up) and validate */
    xres = (xres+7) & ~7;
    xoffset = (xoffset+7) & ~7;
    vxres = (vxres+7) & ~7;
    if (vxres < xres+xoffset)
        vxres = xres+xoffset;
    h_disp = xres/8-1;
    if (h_disp > 0xff)
        FAIL("h_disp too large");
    h_sync_strt = h_disp+(right/8);
    if (h_sync_strt > 0x1ff)
        FAIL("h_sync_start too large");
    h_sync_dly = right & 7;
    h_sync_wid = (hslen+7)/8;
    if (h_sync_wid > 0x1f)
        FAIL("h_sync_wid too large");
    h_total = h_sync_strt+h_sync_wid+(h_sync_dly+left+7)/8;
    if (h_total > 0x1ff)
        FAIL("h_total too large");
    h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;

    if (vyres < yres+yoffset)
        vyres = yres+yoffset;
    v_disp = yres-1;
    if (v_disp > 0x7ff)
        FAIL("v_disp too large");
    v_sync_strt = v_disp+lower;
    if (v_sync_strt > 0x7ff)
        FAIL("v_sync_strt too large");
    v_sync_wid = vslen;
    if (v_sync_wid > 0x1f)
        FAIL("v_sync_wid too large");
    v_total = v_sync_strt+v_sync_wid+upper;
    if (v_total > 0x7ff)
        FAIL("v_total too large");
    v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
    /* In double scan mode, the vertical parameters need to be doubled.
       But in interlaced mode, there is no need to half the vertical parameters.
       Code has been tested in 1024x768, 43 Hz interlaced and 640x480, 60 Hz
       double scan.
     */
   if ((vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
       ryres <<= 1;
       v_total <<= 1;
       v_disp <<= 1;
       v_sync_strt <<= 1;
       v_sync_wid <<= 1;
   };
                                                           
    c_sync = sync & FB_SYNC_COMP_HIGH_ACT ? CRTC_CSYNC_EN : 0;

    if (bpp <= 8) {
        bpp = 8;
        pix_width = CRTC_PIX_WIDTH_8BPP;
        dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
        dp_chain_mask = 0x8080;
    } else if (bpp <= 16) {
        bpp = 16;
        pix_width = CRTC_PIX_WIDTH_15BPP;
        dp_pix_width = HOST_15BPP | SRC_15BPP | DST_15BPP |
                       BYTE_ORDER_LSB_TO_MSB;
        dp_chain_mask = 0x4210;
    } else if (bpp <= 24 && M64_HAS(INTEGRATED)) {
        bpp = 24;
        pix_width = CRTC_PIX_WIDTH_24BPP;
        dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
        dp_chain_mask = 0x8080;
    } else if (bpp <= 32) {
        bpp = 32;
        pix_width = CRTC_PIX_WIDTH_32BPP;
        dp_pix_width = HOST_32BPP | SRC_32BPP | DST_32BPP |
                       BYTE_ORDER_LSB_TO_MSB;
        dp_chain_mask = 0x8080;
    } else
        FAIL("invalid bpp");

    if (vxres*vyres*bpp/8 > info->total_vram)
        FAIL("not enough video RAM");

//    if ((vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
//      FAIL("invalid vmode");

    /* output */
    crtc->vxres = vxres;
    crtc->vyres = vyres;
    crtc->xoffset = xoffset;
    crtc->yoffset = yoffset;
    crtc->bpp = bpp;
    crtc->off_pitch = ((yoffset*vxres+xoffset)*bpp/64) | (vxres<<19);
    crtc->gen_cntl = pix_width | c_sync | CRTC_EXT_DISP_EN | CRTC_ENABLE;
    /* Enable doublescan mode if requested */
    if ((vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
        crtc->gen_cntl|=CRTC_DBL_SCAN_EN;
    /* Enable interlaced mode if requested */
    if ((vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
        crtc->gen_cntl|=CRTC_INTERLACE_EN;
#ifdef CONFIG_FB_ATY_GENERIC_LCD
    /* We can only program the real mode parameters to the CRTC
       if the LCD monitor is switched off. Otherwise we will have to
       use the parameters the LCD monitor prefers, effectively setting
       a completely different mode which simulates the requested 
       video mode.
     */
    if ((info->lcd_table != 0) && ((*monitors_enabled & LCD_ON) != 0) && 
        ((xres > info->lcd_width) || (ryres > info->lcd_height))
       ) {
        /* We cannot display the mode on the LCD. If the CRT is enabled
           we can turn off the LCD.
           If the CRT is off, it isn't a good idea to switch it on; we don't
           know if one is connected. So it's better to fail then.
         */
        if (*monitors_enabled & CRT_ON) {
            printk(KERN_INFO "Disabling lcd monitor because video mode does not fit.\n");
            *monitors_enabled = *monitors_enabled & (~LCD_ON);
        } else
            FAIL("Video mode exceeds size of lcd monitor.\nConnect this computer to a conventional monitor if you really need this mode.");
    };
    if ((info->lcd_table == 0) || ((*monitors_enabled & LCD_ON) == 0)) {
#endif
        crtc->h_tot_disp = h_total | (h_disp<<16);
        crtc->h_sync_strt_wid = (h_sync_strt & 0xff) | (h_sync_dly<<8) |