matroxfb_ti3026.c

linux-2.4.29操作系统的源码

	unsigned long flags;
	u_int32_t xline;
	unsigned int i;
	unsigned int to;

	if (ACCESS_FBINFO(currcon_display) != p)
		return;

	DBG("matroxfb_ti3026_createcursor");

	matroxfb_createcursorshape(PMINFO p, p->var.vmode);

	xline = (~0) << (32 - ACCESS_FBINFO(cursor.w));
	matroxfb_DAC_lock_irqsave(flags);
	mga_outb(M_RAMDAC_BASE+TVP3026_INDEX, 0);
	to = ACCESS_FBINFO(cursor.u);
	for (i = 0; i < to; i++) {
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
	}
	to = ACCESS_FBINFO(cursor.d);
	for (; i < to; i++) {
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, xline >> 24);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, xline >> 16);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, xline >> 8);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, xline);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
	}
	for (; i < 64; i++) {
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0);
	}
	for (i = 0; i < 512; i++)
		mga_outb(M_RAMDAC_BASE+TVP3026_CURRAMDATA, 0xFF);
	matroxfb_DAC_unlock_irqrestore(flags);
}

static void matroxfb_ti3026_cursor(struct display* p, int mode, int x, int y) {
	unsigned long flags;
	MINFO_FROM_DISP(p);

	DBG("matroxfb_ti3026_cursor")

	if (ACCESS_FBINFO(currcon_display) != p)
		return;

	if (mode == CM_ERASE) {
		if (ACCESS_FBINFO(cursor.state) != CM_ERASE) {
			del_timer_sync(&ACCESS_FBINFO(cursor.timer));
			matroxfb_DAC_lock_irqsave(flags);
			ACCESS_FBINFO(cursor.state) = CM_ERASE;
			outTi3026(PMINFO TVP3026_XCURCTRL, ACCESS_FBINFO(hw.DACreg[POS3026_XCURCTRL]));
			matroxfb_DAC_unlock_irqrestore(flags);
		}
		return;
	}
	if ((p->conp->vc_cursor_type & CUR_HWMASK) != ACCESS_FBINFO(cursor.type))
		matroxfb_ti3026_createcursor(PMINFO p);
	x *= fontwidth(p);
	y *= fontheight(p);
	y -= p->var.yoffset;
	if (p->var.vmode & FB_VMODE_DOUBLE)
		y *= 2;
	del_timer_sync(&ACCESS_FBINFO(cursor.timer));
	matroxfb_DAC_lock_irqsave(flags);
	if ((x != ACCESS_FBINFO(cursor.x)) || (y != ACCESS_FBINFO(cursor.y)) || ACCESS_FBINFO(cursor.redraw)) {
		ACCESS_FBINFO(cursor.redraw) = 0;
		ACCESS_FBINFO(cursor.x) = x;
		ACCESS_FBINFO(cursor.y) = y;
		x += 64;
		y += 64;
		outTi3026(PMINFO TVP3026_XCURCTRL, ACCESS_FBINFO(hw.DACreg[POS3026_XCURCTRL]));
		mga_outb(M_RAMDAC_BASE+TVP3026_CURPOSXL, x);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURPOSXH, x >> 8);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURPOSYL, y);
		mga_outb(M_RAMDAC_BASE+TVP3026_CURPOSYH, y >> 8);
	}
	ACCESS_FBINFO(cursor.state) = CM_DRAW;
	if (ACCESS_FBINFO(devflags.blink))
		mod_timer(&ACCESS_FBINFO(cursor.timer), jiffies + HZ/2);
	outTi3026(PMINFO TVP3026_XCURCTRL, ACCESS_FBINFO(hw.DACreg[POS3026_XCURCTRL]) | TVP3026_XCURCTRL_XGA);
	matroxfb_DAC_unlock_irqrestore(flags);
}

static int matroxfb_ti3026_setfont(struct display* p, int width, int height) {

	DBG("matrox_ti3026_setfont");

	if (p && p->conp)
		matroxfb_ti3026_createcursor(PMXINFO(p) p);
	return 0;
}

static int matroxfb_ti3026_selhwcursor(WPMINFO struct display* p) {
	ACCESS_FBINFO(dispsw.cursor) = matroxfb_ti3026_cursor;
	ACCESS_FBINFO(dispsw.set_font) = matroxfb_ti3026_setfont;
	return 0;
}

static int Ti3026_calcclock(CPMINFO unsigned int freq, unsigned int fmax, int* in, int* feed, int* post) {
	unsigned int fvco;
	unsigned int lin, lfeed, lpost;

	DBG("Ti3026_calcclock")

	fvco = PLL_calcclock(PMINFO freq, fmax, &lin, &lfeed, &lpost);
	fvco >>= (*post = lpost);
	*in = 64 - lin;
	*feed = 64 - lfeed;
	return fvco;
}

static int Ti3026_setpclk(WPMINFO int clk, struct display* p) {
	unsigned int f_pll;
	unsigned int pixfeed, pixin, pixpost;
	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);

	DBG("Ti3026_setpclk")

	f_pll = Ti3026_calcclock(PMINFO clk, ACCESS_FBINFO(max_pixel_clock), &pixin, &pixfeed, &pixpost);

	hw->DACclk[0] = pixin | 0xC0;
	hw->DACclk[1] = pixfeed;
	hw->DACclk[2] = pixpost | 0xB0;

	if (p->type == FB_TYPE_TEXT) {
		hw->DACreg[POS3026_XMEMPLLCTRL] = TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_RCLK_PIXPLL;
		hw->DACclk[3] = 0xFD;
		hw->DACclk[4] = 0x3D;
		hw->DACclk[5] = 0x70;
	} else {
		unsigned int loopfeed, loopin, looppost, loopdiv, z;
		unsigned int Bpp;

		Bpp = ACCESS_FBINFO(curr.final_bppShift);

		if (p->var.bits_per_pixel == 24) {
			loopfeed = 3;		/* set lm to any possible value */
			loopin = 3 * 32 / Bpp;
		} else {
			loopfeed = 4;
			loopin = 4 * 32 / Bpp;
		}
		z = (110000 * loopin) / (f_pll * loopfeed);
		loopdiv = 0; /* div 2 */
		if (z < 2)
			looppost = 0;
		else if (z < 4)
			looppost = 1;
		else if (z < 8)
			looppost = 2;
		else {
			looppost = 3;
			loopdiv = z/16;
		}
		if (p->var.bits_per_pixel == 24) {
			hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0;
			hw->DACclk[4] = (65 - loopfeed) | 0x80;
			if (ACCESS_FBINFO(accel.ramdac_rev) > 0x20) {
				if (isInterleave(MINFO))
					hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_8_3;
				else {
					hw->DACclk[4] &= ~0xC0;
					hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_4_3;
				}
			} else {
				if (isInterleave(MINFO))
					;	/* default... */
				else {
					hw->DACclk[4] ^= 0xC0;	/* change from 0x80 to 0x40 */
					hw->DACreg[POS3026_XLATCHCTRL] = TVP3026A_XLATCHCTRL_4_3;
				}
			}
			hw->DACclk[5] = looppost | 0xF8;
			if (ACCESS_FBINFO(devflags.mga_24bpp_fix))
				hw->DACclk[5] ^= 0x40;
		} else {
			hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0;
			hw->DACclk[4] = 65 - loopfeed;
			hw->DACclk[5] = looppost | 0xF0;
		}
		hw->DACreg[POS3026_XMEMPLLCTRL] = loopdiv | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_RCLK_LOOPPLL;
	}
	return 0;
}

static int Ti3026_init(WPMINFO struct my_timming* m, struct display* p) {
	u_int8_t muxctrl = isInterleave(MINFO) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT;
	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);

	DBG("Ti3026_init")

	memcpy(hw->DACreg, MGADACbpp32, sizeof(hw->DACreg));
	if (p->type == FB_TYPE_TEXT) {
		hw->DACreg[POS3026_XLATCHCTRL] = TVP3026_XLATCHCTRL_8_1;
		hw->DACreg[POS3026_XTRUECOLORCTRL] = TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR;
		hw->DACreg[POS3026_XMUXCTRL] = TVP3026_XMUXCTRL_VGA;
		hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL |
					       TVP3026_XCLKCTRL_DIV4;
		hw->DACreg[POS3026_XMISCCTRL] = TVP3026_XMISCCTRL_DAC_PUP | TVP3026_XMISCCTRL_DAC_6BIT | TVP3026_XMISCCTRL_PSEL_DIS | TVP3026_XMISCCTRL_PSEL_LOW;
	} else {
		switch (p->var.bits_per_pixel) {
		case 4:	hw->DACreg[POS3026_XLATCHCTRL] = TVP3026_XLATCHCTRL_16_1;	/* or _8_1, they are same */
			hw->DACreg[POS3026_XTRUECOLORCTRL] = TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR;
			hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_4BIT;
			hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV8;
			hw->DACreg[POS3026_XMISCCTRL] = TVP3026_XMISCCTRL_DAC_PUP | TVP3026_XMISCCTRL_DAC_8BIT | TVP3026_XMISCCTRL_PSEL_DIS | TVP3026_XMISCCTRL_PSEL_LOW;
			break;
		case 8: hw->DACreg[POS3026_XLATCHCTRL] = TVP3026_XLATCHCTRL_8_1;	/* or _4_1, they are same */
			hw->DACreg[POS3026_XTRUECOLORCTRL] = TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR;
			hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_8BIT;
			hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV4;
			hw->DACreg[POS3026_XMISCCTRL] = TVP3026_XMISCCTRL_DAC_PUP | TVP3026_XMISCCTRL_DAC_8BIT | TVP3026_XMISCCTRL_PSEL_DIS | TVP3026_XMISCCTRL_PSEL_LOW;
			break;
		case 16:
			/* XLATCHCTRL should be _4_1 / _2_1... Why is not? (_2_1 is used everytime) */
			hw->DACreg[POS3026_XTRUECOLORCTRL] = (p->var.green.length == 5)? (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_1555 ) : (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_565);
			hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_16BIT;
			hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV2;
			break;
		case 24:
			/* XLATCHCTRL is: for (A) use _4_3 (?_8_3 is same? TBD), for (B) it is set in setpclk */
			hw->DACreg[POS3026_XTRUECOLORCTRL] = TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_888;
			hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_32BIT;
			hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV4;
			break;
		case 32:
			/* XLATCHCTRL should be _2_1 / _1_1... Why is not? (_2_1 is used everytime) */
			hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_32BIT;
			break;
		default:
			return 1;	/* TODO: failed */
		}
	}
	if (matroxfb_vgaHWinit(PMINFO m, p)) return 1;

	/* set SYNC */
	hw->MiscOutReg = 0xCB;
	if (m->sync & FB_SYNC_HOR_HIGH_ACT)
		hw->DACreg[POS3026_XGENCTRL] |= TVP3026_XGENCTRL_HSYNC_NEG;
	if (m->sync & FB_SYNC_VERT_HIGH_ACT)
		hw->DACreg[POS3026_XGENCTRL] |= TVP3026_XGENCTRL_VSYNC_NEG;
	if (m->sync & FB_SYNC_ON_GREEN)
		hw->DACreg[POS3026_XGENCTRL] |= TVP3026_XGENCTRL_SYNC_ON_GREEN;

	/* set DELAY */
	if (ACCESS_FBINFO(video.len) < 0x400000)
		hw->CRTCEXT[3] |= 0x08;
	else if (ACCESS_FBINFO(video.len) > 0x400000)
		hw->CRTCEXT[3] |= 0x10;

	/* set HWCURSOR */
	if (m->interlaced) {
		hw->DACreg[POS3026_XCURCTRL] |= TVP3026_XCURCTRL_INTERLACED;
	}
	if (m->HTotal >= 1536)
		hw->DACreg[POS3026_XCURCTRL] |= TVP3026_XCURCTRL_BLANK4096;

	/* set interleaving */
	hw->MXoptionReg &= ~0x00001000;
	if ((p->type != FB_TYPE_TEXT) && isInterleave(MINFO)) hw->MXoptionReg |= 0x00001000;

	/* set DAC */
	Ti3026_setpclk(PMINFO m->pixclock, p);
	return 0;
}

static void ti3026_setMCLK(WPMINFO int fout){
	unsigned int f_pll;
	unsigned int pclk_m, pclk_n, pclk_p;
	unsigned int mclk_m, mclk_n, mclk_p;
	unsigned int rfhcnt, mclk_ctl;
	int tmout;

	DBG("ti3026_setMCLK")

	f_pll = Ti3026_calcclock(PMINFO fout, ACCESS_FBINFO(max_pixel_clock), &mclk_n, &mclk_m, &mclk_p);

	/* save pclk */
	outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC);
	pclk_n = inTi3026(PMINFO TVP3026_XPIXPLLDATA);