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📄 8253x.h

📁 linux-2.4.29操作系统的源码
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#define SAB82532_CCR1_CM_MASK		0x07/* Channel Configuration Register 2 (CCR2) */#define SAB82532_CCR2_SOC1		0x80#define SAB82532_CCR2_SOC0		0x40#define SAB82532_CCR2_BR9		0x80#define SAB82532_CCR2_BR8		0x40#define SAB82532_CCR2_BDF		0x20#define SAB82532_CCR2_SSEL		0x10#define SAB82532_CCR2_XCS0		0x20#define SAB82532_CCR2_RCS0		0x10#define SAB82532_CCR2_TOE		0x08#define SAB82532_CCR2_RWX		0x04#define SAB82532_CCR2_C32		0x02#define SAB82532_CCR2_DIV		0x01/* Channel Configuration Register 3 (CCR3) */#define SAB82532_CCR3_PSD		0x01#define SAB82532_CCR3_RCRC		0x04#endif/* Time Slot Assignment Register Transmit (TSAX) */#define SAB82532_TSAX_TSNX_MASK		0xfc#define SAB82532_TSAX_XCS2		0x02	/* see also CCR2 */#define SAB82532_TSAX_XCS1		0x01/* Time Slot Assignment Register Receive (TSAR) */#define SAB82532_TSAR_TSNR_MASK		0xfc#define SAB82532_TSAR_RCS2		0x02	/* see also CCR2 */#define SAB82532_TSAR_RCS1		0x01/* Version Status Register (VSTR) */#define SAB85232_REG_VSTR               0x34#define SAB82532_VSTR_CD		0x80#define SAB82532_VSTR_DPLA		0x40#define SAB82532_VSTR_VN_MASK		0x0f#define SAB82532_VSTR_VN_1		0x00#define SAB82532_VSTR_VN_2		0x01#define SAB82532_VSTR_VN_3_2		0x02/* Global Interrupt Status Register (GIS) */#define SAB82532_GIS_PI			0x80#define SAB82532_GIS_ISA1		0x08#define SAB82532_GIS_ISA0		0x04#define SAB82532_GIS_ISB1		0x02#define SAB82532_GIS_ISB0		0x01#define SAB82532_GIS_MASK		0x8f #define SAB82538_GIS_PIA		0x80#define SAB82538_GIS_PIB		0x40#define SAB82538_GIS_PIC		0x20#define SAB82538_GIS_PID		0x10#define SAB82538_GIS_CII		0x08#define SAB82538_GIS_CHNL_MASK          0x07#define SAB82538_GIS_MASK		0x28  /* Port C and CII ! */ /* Interrupt Vector Address (IVA) */#define SAB82532_REG_IVA                0x38#define SAB82532_IVA_MASK		0xf1#define SAB82538_IVA_ROT                0x02/* Interrupt Port Configuration (IPC) */#define SAB82532_REG_IPC                0x39#define SAB82532_IPC_VIS		0x80#define SAB82532_IPC_SLA1		0x10#define SAB82532_IPC_SLA0		0x08#define SAB82532_IPC_CASM		0x04#define SAB82532_IPC_IC_OPEN_DRAIN	0x00#define SAB82532_IPC_IC_ACT_LOW		0x01#define SAB82532_IPC_IC_ACT_HIGH	0x03/* Interrupt Status Register 0 (ISR0) */#define SAB82532_ISR0_TCD		0x80#define SAB82532_ISR0_RME		0x80#define SAB82532_ISR0_TIME		0x40#define SAB82532_ISR0_RFS		0x40#define SAB82532_ISR0_PERR		0x20#define SAB82532_ISR0_FERR		0x10#define SAB82532_ISR0_PLLA		0x08#define SAB82532_ISR0_CDSC		0x04#define SAB82532_ISR0_RFO		0x02#define SAB82532_ISR0_RPF		0x01/* Interrupt Status Register 1 (ISR1) */#define SAB82532_ISR1_BRK		0x80#define SAB82532_ISR1_BRKT		0x40#define SAB82532_ISR1_RDO		0x40#define SAB82532_ISR1_ALLS		0x20#define SAB82532_ISR1_XOFF		0x10#define SAB82532_ISR1_XDU		0x10#define SAB82532_ISR1_TIN		0x08#define SAB82532_ISR1_CSC		0x04#define SAB82532_ISR1_XON		0x02#define SAB82532_ISR1_XPR		0x01/* Interrupt Mask Register 0 (IMR0) */#define SAB82532_IMR0_TCD		0x80#define SAB82532_IMR0_RME		0x80#define SAB82532_IMR0_TIME		0x40#define SAB82532_IMR0_RFS		0x40#define SAB82532_IMR0_PERR		0x20#define SAB82532_IMR0_RSC		0x20#define SAB82532_IMR0_FERR		0x10#define SAB82532_IMR0_PCE		0x10#define SAB82532_IMR0_PLLA		0x08#define SAB82532_IMR0_CDSC		0x04#define SAB82532_IMR0_RFO		0x02#define SAB82532_IMR0_RPF		0x01/* Interrupt Mask Register 1 (IMR1) */#define SAB82532_IMR1_BRK		0x80#define SAB82532_IMR1_EOP		0x80#define SAB82532_IMR1_BRKT		0x40#define SAB82532_IMR1_RDO		0x40#define SAB82532_IMR1_ALLS		0x20#define SAB82532_IMR1_XOFF		0x10#define SAB82532_IMR1_EXE		0x10#define SAB82532_IMR1_TIN		0x08#define SAB82532_IMR1_CSC		0x04#define SAB82532_IMR1_XON		0x02#define SAB82532_IMR1_XMR		0x02#define SAB82532_IMR1_XPR		0x01/* Port Value Register (PVR) */#define SAB82532_REG_PVR                 0x3c#define SAB82538_REG_PVR_A               0x3c#define SAB82538_REG_PVR_B               0xbc#define SAB82538_REG_PVR_C               0x13c#define SAB82538_REG_PVR_D               0x1bc/* Port Value Register (PIM) */#define SAB82532_REG_PIM                 0x3d#define SAB82538_REG_PIM_A               0x3d#define SAB82538_REG_PIM_B               0xbd#define SAB82538_REG_PIM_C               0x13d#define SAB82538_REG_PIM_D               0x1bd/* Port Value Register (PIS) */#define SAB82532_REG_PIS                 0x3d#define SAB82538_REG_PIS_A               0x3d#define SAB82538_REG_PIS_B               0xbd#define SAB82538_REG_PIS_C               0x13d#define SAB82538_REG_PIS_D               0x1bd/* Port Value Register (PCR) */#define SAB82532_REG_PCR                 0x3e#define SAB82538_REG_PCR_A               0x3e#define SAB82538_REG_PCR_B               0xbe#define SAB82538_REG_PCR_C               0x13e#define SAB82538_REG_PCR_D               0x1be				/* leaving them for reference */				/* they are now defined in 8253xioc.h*/#if 0/* Channel Configuration Register 4 (CCR4) */#define SAB82532_CCR4_MCK4		0x80/* needs to be set when board clock */					    /* over 10 Mhz (?)*/#define SAB82532_CCR4_EBRG		0x40#define SAB82532_CCR4_TST1		0x20#define SAB82532_CCR4_ICD		0x10#endif/* Port Interrupt Status Register (PIS) */#define SAB82532_PIS_SYNC_B		0x08#define SAB82532_PIS_DTR_B		0x04#define SAB82532_PIS_DTR_A		0x02#define SAB82532_PIS_SYNC_A		0x01/* More things useful */#define SAB_MAGIC 5977/* When computing the baudrate, we "encode" it by multiplying * the actual baudrate by 2. This way we can use 134.5 */#define ENCODEBR(x)  ((x)<<1)/* * Raise a modem signal y on port x, tmpval must exist! */#define RAISE(xx,y) \{ \	  unsigned char __tmpval__; \	  __tmpval__= (xx)->readbyte((xx),(xx)->y.reg);\	  if((xx)->y.inverted)\	    __tmpval__ &= ~((xx)->y.mask);\	  else\	    __tmpval__ |= (xx)->y.mask;\	  __tmpval__ |= (xx)->y.cnst;\	  (xx)->y.val=1;\	  (xx)->writebyte((xx),(xx)->y.reg,__tmpval__);\}/* * Lower a modem signal y on port x, __tmpval__ must exist! */#define LOWER(xx,y) \{\	  unsigned char __tmpval__; \	  __tmpval__= (xx)->readbyte((xx),(xx)->y.reg);\	  if((xx)->y.inverted)\	    __tmpval__ |= (xx)->y.mask;\	  else\	    __tmpval__ &= ~((xx)->y.mask);\	  __tmpval__ |= (xx)->y.cnst;\	  (xx)->y.val=0;\	  (xx)->writebyte((xx),(xx)->y.reg,__tmpval__);\}#define ISON(xx,y) \          ((xx)->y.inverted != (((xx)->readbyte((xx),(xx)->y.reg)&(xx)->y.mask) ==(xx)->y.mask) )/* * Now let's define all those functions we need else where. * * This should probably be reorganized */extern void sab8253x_setup_ttydriver(void);extern int finish_sab8253x_setup_ttydriver(void);extern void sab8253x_setup_ttyport(struct sab_port *port);extern void sab8253x_cleanup_ttydriver(void);extern void sab8253x_start_txS(struct sab_port *port);static int inline sab8253x_serial_paranoia_check(struct sab_port *port,						 kdev_t device, const char *routine){#ifdef SERIAL_PARANOIA_CHECK	static const char *badmagic =		"Warning: bad magic number for serial struct (%s) in %s\n";	static const char *badinfo =		"Warning: null sab8253x for (%s) in %s\n";		if (!port) 	{		printk(badinfo, kdevname(device), routine);		return 1;	}	if (port->magic != SAB_MAGIC) 	{		printk(badmagic, kdevname(device), routine);		return 1;	}#endif	return 0;}static void inline sab8253x_cec_wait(struct sab_port *port){	int timeout = port->cec_timeout;#if 1				/* seems to work for 82532s */	while ((READB(port, star) & SAB82532_STAR_CEC) && --timeout)	{		udelay(1);	}#else	if (READB(port,star) & SAB82532_STAR_CEC)	{		udelay(1);	}#endif}extern void sab8253x_transmit_charsS(struct sab_port *port, union sab8253x_irq_status *stat);extern void sab8253x_flush_charsS(struct tty_struct *tty);extern void sab8253x_set_termiosS(struct tty_struct *tty, struct termios *old_termios);extern void sab8253x_stopS(struct tty_struct *tty);extern void sab8253x_startS(struct tty_struct *tty);extern void sab8253x_send_xcharS(struct tty_struct *tty, char ch);extern void sab8253x_transmit_charsN(struct sab_port *port,				     union sab8253x_irq_status *stat);extern SAB_PORT  *AuraPortRoot;#define MAX_SAB8253X_RCV_QUEUE_LEN 50struct ebrg_struct {	int	baud;	int	n;	int	m;};extern task_queue tq_8253x_serial;extern int sab8253x_openS(struct tty_struct *tty, struct file * filp);extern void sab8253x_closeS(struct tty_struct *tty, struct file * filp);extern int sab8253x_writeS(struct tty_struct * tty, int from_user,			   const unsigned char *buf, int count);extern void sab8253x_throttleS(struct tty_struct * tty);extern void sab8253x_unthrottleS(struct tty_struct * tty);extern void sab8253x_hangupS(struct tty_struct *tty);extern void sab8253x_breakS(struct tty_struct *tty, int break_state);extern void Sab8253xCleanUpTransceiveN(SAB_PORT* priv);				/* used for running routines in the */				/* soft int part of the driver */				/* at one time the flip buffer routines */				/* seem to have been too time consuming */				/* to invoke in the hardware interrupt */				/* routing -- I am not so sure there is */				/* a problem with modern processor and */				/* memory speeds, but maybe there is a */				/* requirement that certain tty routines */				/* not be executed with ints turned off.*/static void inline sab8253x_sched_event(struct sab_port *port, int event){	port->event |= 1 << event;	queue_task(&port->tqueue, &tq_8253x_serial);	mark_bh(AURORA_BH);}extern unsigned int sab8253x_baud(sab_port_t *port, unsigned long encbaud,	      unsigned char *bgr, unsigned char *ccr2,	      unsigned char *ccr4, unsigned long *truebaudp);extern void Sab8253xFreeAllReceiveListSKBUFFS(SAB_PORT* priv);extern int Sab8253xSetUpLists(SAB_PORT *priv);extern int Sab8253xCountTransmitDescriptors(SAB_PORT *port);extern int Sab8253xCountTransmit(SAB_PORT *port);extern void sab8253x_init_lineS(struct sab_port *port);extern void sab8253x_init_lineS(struct sab_port *port);extern int getccr2configS(struct sab_port *port);extern void sab8253x_change_speedN(struct sab_port *port);extern void sab8253x_shutdownN(struct sab_port *port);extern int sab8253x_startupN(struct sab_port *port);extern int sab8253x_block_til_ready(struct tty_struct *tty, struct file * filp,				    struct sab_port *port);extern void sab8253x_wait_until_sent(struct tty_struct *tty, int timeout);extern void sab8253x_flush_buffer(struct tty_struct *tty);extern void aura_sp502_program(SAB_PORT *port, unsigned int index);#endif 

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