readme.aic7xxx

linux-2.4.29操作系统的源码

====================================================================
=    Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v6.2.28   =
=                            README for                            =
=                     The Linux Operating System                   =
====================================================================

The following information is available in this file:

  1. Supported Hardware
  2. Version History
  3. Command Line Options
  4. Contacting Adaptec

1. Supported Hardware

   The following Adaptec SCSI Chips and Host Adapters are supported by
   the aic7xxx driver. 

   Chip    MIPS  Host Bus  MaxSync  MaxWidth  SCBs  Notes
   ---------------------------------------------------------------
   aic7770  10    EISA/VL   10MHz    16Bit      4   1
   aic7850  10    PCI/32    10MHz    8Bit       3
   aic7855  10    PCI/32    10MHz    8Bit       3
   aic7856  10    PCI/32    10MHz    8Bit       3
   aic7859  10    PCI/32    20MHz    8Bit       3
   aic7860  10    PCI/32    20MHz    8Bit       3
   aic7870  10    PCI/32    10MHz    16Bit      16
   aic7880  10    PCI/32    20MHz    16Bit      16
   aic7890  20    PCI/32    40MHz    16Bit      16      3 4 5 6 7 8
   aic7891  20    PCI/64    40MHz    16Bit      16      3 4 5 6 7 8
   aic7892  20   PCI/64-66  80MHz    16Bit      16      3 4 5 6 7 8
   aic7895  15    PCI/32    20MHz    16Bit      16    2 3 4 5
   aic7895C 15    PCI/32    20MHz    16Bit      16    2 3 4 5     8
   aic7896  20    PCI/32    40MHz    16Bit      16    2 3 4 5 6 7 8
   aic7897  20    PCI/64    40MHz    16Bit      16    2 3 4 5 6 7 8
   aic7899  20   PCI/64-66  80MHz    16Bit      16    2 3 4 5 6 7 8

   1.   Multiplexed Twin Channel Device - One controller servicing two
        busses.
   2.   Multi-function Twin Channel Device - Two controllers on one chip.
   3.   Command Channel Secondary DMA Engine - Allows scatter gather list
        and SCB prefetch.
   4.   64 Byte SCB Support - Allows disconnected, unttagged request table
        for all possible target/lun combinations.
   5.   Block Move Instruction Support - Doubles the speed of certain
        sequencer operations.
   6.   `Bayonet' style Scatter Gather Engine - Improves S/G prefetch
        performance.
   7.   Queuing Registers - Allows queuing of new transactions without
        pausing the sequencer.
   8.   Multiple Target IDs - Allows the controller to respond to selection
        as a target on multiple SCSI IDs.

   Controller      Chip   Host-Bus    Int-Connectors  Ext-Connectors  Notes
   --------------------------------------------------------------------------
   AHA-274X[A]    aic7770   EISA         SE-50M         SE-HD50F
   AHA-274X[A]W   aic7770   EISA         SE-HD68F       SE-HD68F
                                         SE-50M
   AHA-274X[A]T   aic7770   EISA       2 X SE-50M       SE-HD50F
   AHA-2842       aic7770    VL          SE-50M         SE-HD50F
   AHA-2940AU     aic7860   PCI/32       SE-50M         SE-HD50F
   AVA-2902I      aic7860   PCI/32       SE-50M
   AVA-2902E      aic7860   PCI/32       SE-50M
   AVA-2906       aic7856   PCI/32       SE-50M         SE-DB25F
   APC-7850       aic7850   PCI/32       SE-50M                       1
   AVA-2940       aic7860   PCI/32       SE-50M
   AHA-2920B      aic7860   PCI/32       SE-50M
   AHA-2930B      aic7860   PCI/32       SE-50M
   AHA-2920C      aic7856   PCI/32       SE-50M         SE-HD50F
   AHA-2930C      aic7860   PCI/32       SE-50M
   AHA-2930C      aic7860   PCI/32       SE-50M
   AHA-2910C      aic7860   PCI/32       SE-50M
   AHA-2915C      aic7860   PCI/32       SE-50M
   AHA-2940AU/CN  aic7860   PCI/32       SE-50M         SE-HD50F
   AHA-2944W      aic7870   PCI/32     HVD-HD68F        HVD-HD68F
                                        HVD-50M
   AHA-3940W      aic7870   PCI/32     2 X SE-HD68F     SE-HD68F        2
   AHA-2940UW     aic7880   PCI/32       SE-HD68F
                                         SE-50M         SE-HD68F
   AHA-2940U      aic7880   PCI/32       SE-50M         SE-HD50F
   AHA-2940D      aic7880   PCI/32
   aHA-2940 A/T   aic7880   PCI/32
   AHA-2940D A/T  aic7880   PCI/32
   AHA-3940UW     aic7880   PCI/32     2 X SE-HD68F     SE-HD68F          3
   AHA-3940UWD    aic7880   PCI/32     2 X SE-HD68F   2 X SE-VHD68F       3
   AHA-3940U      aic7880   PCI/32     2 X SE-50M       SE-HD50F          3
   AHA-2944UW     aic7880   PCI/32      HVD-HD68F       HVD-HD68F
                                         HVD-50M
   AHA-3944UWD    aic7880   PCI/32     2 X HVD-HD68F  2 X HVD-VHD68F      3
   AHA-4944UW     aic7880   PCI/32
   AHA-2930UW     aic7880   PCI/32
   AHA-2940UW Pro aic7880   PCI/32      SE-HD68F        SE-HD68F            4
                                         SE-50M
   AHA-2940UW/CN  aic7880   PCI/32
   AHA-2940UDual  aic7895   PCI/32
   AHA-2940UWDual aic7895   PCI/32
   AHA-3940UWD    aic7895   PCI/32
   AHA-3940AUW    aic7895   PCI/32
   AHA-3940AUWD   aic7895   PCI/32
   AHA-3940AU     aic7895   PCI/32
   AHA-3944AUWD   aic7895   PCI/32     2 X HVD-HD68F  2 X HVD-VHD68F
   AHA-2940U2B    aic7890   PCI/32      LVD-HD68F       LVD-HD68F
   AHA-2940U2 OEM aic7891   PCI/64
   AHA-2940U2W    aic7890   PCI/32      LVD-HD68F       LVD-HD68F
                                        SE-HD68F 
                                         SE-50M
   AHA-2950U2B    aic7891   PCI/64      LVD-HD68F       LVD-HD68F
   AHA-2930U2     aic7890   PCI/32      LVD-HD68F       SE-HD50F
                                         SE-50M 
   AHA-3950U2B    aic7897   PCI/64
   AHA-3950U2D    aic7897   PCI/64
   AHA-29160      aic7892   PCI/64-66
   AHA-29160 CPQ  aic7892   PCI/64-66
   AHA-29160N     aic7892   PCI/32      LVD-HD68F       SE-HD50F
                                         SE-50M
   AHA-29160LP    aic7892   PCI/64-66
   AHA-19160      aic7892   PCI/64-66
   AHA-29150LP    aic7892   PCI/64-66
   AHA-29130LP    aic7892   PCI/64-66
   AHA-3960D      aic7899   PCI/64-66  2 X LVD-HD68F  2 X LVD-VHD68F
                                         LVD-50M
   AHA-3960D CPQ  aic7899   PCI/64-66  2 X LVD-HD68F  2 X LVD-VHD68F
                                         LVD-50M
   AHA-39160      aic7899   PCI/64-66  2 X LVD-HD68F  2 X LVD-VHD68F
                                         LVD-50M

   1. No BIOS support
   2. DEC21050 PCI-PCI bridge with multiple controller chips on secondary bus
   3. DEC2115X PCI-PCI bridge with multiple controller chips on secondary bus
   4. All three SCSI connectors may be used simultaneously without
      SCSI "stub" effects.

2. Version History
   6.2.36 (June 3rd, 2003)
        - Correct code that disables PCI parity error checking.
        - Correct and simplify handling of the ignore wide residue
          message.  The previous code would fail to report a residual
          if the transaction data length was even and we received
          an IWR message.
        - Add support for the 2.5.X EISA framework.
        - Update for change in 2.5.X SCSI proc FS interface.
        - Correct Domain Validation command-line option parsing.
        - When negotiation async via an 8bit WDTR message, send
          an SDTR with an offset of 0 to be sure the target
          knows we are async.  This works around a firmware defect
          in the Quantum Atlas 10K.
        - Clear PCI error state during driver attach so that we
          don't disable memory mapped I/O due to a stray write
          by some other driver probe that occurred before we
          claimed the controller.

   6.2.35 (May 14th, 2003)
        - Fix a few GCC 3.3 compiler warnings.
        - Correct operation on EISA Twin Channel controller.
        - Add support for 2.5.X's scsi_report_device_reset().

   6.2.34 (May 5th, 2003)
        - Fix locking regression instroduced in 6.2.29 that
          could cuase a lock order reversal between the io_request_lock
          and our per-softc lock.  This was only possible on RH9,
          SuSE, and kernel.org 2.4.X kernels.

   6.2.33 (April 30th, 2003)
        - Dynamically disable PCI parity error reporting after
          10 errors are reported to the user.  These errors are
          the result of some other device issuing PCI transactions
          with bad parity.  Once the user has been informed of the
          problem, continuing to report the errors just degrades
          our performance.

   6.2.32 (March 28th, 2003)
        - Dynamically sized S/G lists to avoid SCSI malloc
          pool fragmentation and SCSI mid-layer deadlock.

   6.2.28 (January 20th, 2003)
        - Domain Validation Fixes
        - Add ability to disable PCI parity error checking.
        - Enhanced Memory Mapped I/O probe

   6.2.20 (November 7th, 2002)
        - Added Domain Validation.

3. Command Line Options

        WARNING: ALTERING OR ADDING THESE DRIVER PARAMETERS
                 INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE.
                 USE THEM WITH CAUTION. 

   Edit the file "modules.conf" in the directory /etc and add/edit a
   line containing 'options aic7xxx aic7xxx=[command[,command...]]' where
   'command' is one or more of the following:
   -----------------------------------------------------------------
              Option: verbose
          Definition: enable additional informative messages during
                      driver operation.
     Possible Values: This option is a flag
       Default Value: disabled
   -----------------------------------------------------------------
              Option: debug:[value]
          Definition: Enables various levels of debugging information
     Possible Values: 0x0000 = no debugging, 0xffff = full debugging
       Default Value: 0x0000
   -----------------------------------------------------------------
              Option: no_probe
              Option: probe_eisa_vl
          Definition: Do not probe for EISA/VLB controllers.
                      This is a toggle.  If the driver is compiled
                      to not probe EISA/VLB controllers by default,