📄 mpparse.c
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}static struct intel_mp_floating *mpf_found;/* * Scan the memory blocks for an SMP configuration block. */void __init get_smp_config (void){ struct intel_mp_floating *mpf = mpf_found; /* * ACPI may be used to obtain the entire SMP configuration or just to * enumerate/configure processors (CONFIG_ACPI_HT_ONLY). Note that * ACPI supports both logical (e.g. Hyper-Threading) and physical * processors, where MPS only supports physical. */ if (acpi_lapic && acpi_ioapic) { printk(KERN_INFO "Using ACPI (MADT) for SMP configuration information\n"); return; } else if (acpi_lapic) printk(KERN_INFO "Using ACPI for processor (LAPIC) configuration information\n"); printk("Intel MultiProcessor Specification v1.%d\n", mpf->mpf_specification); if (mpf->mpf_feature2 & (1<<7)) { printk(" IMCR and PIC compatibility mode.\n"); pic_mode = 1; } else { printk(" Virtual Wire compatibility mode.\n"); pic_mode = 0; } /* * Now see if we need to read further. */ if (mpf->mpf_feature1 != 0) { printk("Default MP configuration #%d\n", mpf->mpf_feature1); construct_default_ISA_mptable(mpf->mpf_feature1); } else if (mpf->mpf_physptr) { /* * Read the physical hardware table. Anything here will * override the defaults. */ if (!smp_read_mpc(__va(mpf->mpf_physptr))) { smp_found_config = 0; printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"); printk(KERN_ERR "... disabling SMP support. (tell your hw vendor)\n"); return; } /* * If there are no explicit MP IRQ entries, then we are * broken. We set up most of the low 16 IO-APIC pins to * ISA defaults and hope it will work. */ if (!mp_irq_entries) { struct mpc_config_bus bus; printk("BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n"); bus.mpc_type = MP_BUS; bus.mpc_busid = 0; memcpy(bus.mpc_bustype, "ISA ", 6); MP_bus_info(&bus); construct_default_ioirq_mptable(0); } } else BUG(); printk("Processors: %d\n", num_processors); /* * Only use the first configuration found. */}static int __init smp_scan_config (unsigned long base, unsigned long length){ unsigned int *bp = phys_to_virt(base); struct intel_mp_floating *mpf; printk("Scan SMP from %p for %ld bytes.\n", bp,length); if (sizeof(*mpf) != 16) printk("Error: MPF size\n"); while (length > 0) { mpf = (struct intel_mp_floating *)bp; if ((*bp == SMP_MAGIC_IDENT) && (mpf->mpf_length == 1) && !mpf_checksum((unsigned char *)bp, 16) && ((mpf->mpf_specification == 1) || (mpf->mpf_specification == 4)) ) { smp_found_config = 1; printk(KERN_INFO "found SMP MP-table at %016lx\n", virt_to_phys(mpf)); reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE); if (mpf->mpf_physptr) reserve_bootmem_generic(mpf->mpf_physptr, PAGE_SIZE); mpf_found = mpf; return 1; } bp += 4; length -= 16; } return 0;}void __init find_intel_smp (void){ unsigned long address; /* * FIXME: Linux assumes you have 640K of base ram.. * this continues the error... * * 1) Scan the bottom 1K for a signature * 2) Scan the top 1K of base RAM * 3) Scan the 64K of bios */ if (smp_scan_config(0x0,0x400) || smp_scan_config(639*0x400,0x400) || smp_scan_config(0xF0000,0x10000)) return; printk("ok\n"); /* * If it is an SMP machine we should know now, unless the * configuration is in an EISA/MCA bus machine with an * extended bios data area. * * there is a real-mode segmented pointer pointing to the * 4K EBDA area at 0x40E, calculate and scan it here. * * NOTE! There are Linux loaders that will corrupt the EBDA * area, and as such this kind of SMP config may be less * trustworthy, simply because the SMP table may have been * stomped on during early boot. These loaders are buggy and * should be fixed. * * MP1.4 SPEC states to only scan first 1K of 4K EBDA. */ address = *(unsigned short *)phys_to_virt(0x40E); address <<= 4; smp_scan_config(address, 0x400); if (smp_found_config) printk(KERN_WARNING "WARNING: MP table in the EBDA can be UNSAFE, contact linux-smp@vger.kernel.org if you experience SMP problems!\n");}/* * - Intel MP Configuration Table */void __init find_smp_config (void){#ifdef CONFIG_X86_LOCAL_APIC find_intel_smp();#endif}/* -------------------------------------------------------------------------- ACPI-based MP Configuration -------------------------------------------------------------------------- */#ifdef CONFIG_ACPI_BOOTvoid __init mp_register_lapic_address ( u64 address){ mp_lapic_addr = (unsigned long) address; set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr); if (boot_cpu_id == -1U) boot_cpu_id = GET_APIC_ID(apic_read(APIC_ID)); Dprintk("Boot CPU = %d\n", boot_cpu_physical_apicid);}void __init mp_register_lapic ( u8 id, u8 enabled){ struct mpc_config_processor processor; int boot_cpu = 0; if (id >= MAX_APICS) { printk(KERN_WARNING "Processor #%d invalid (max %d)\n", id, MAX_APICS); return; } if (id == boot_cpu_physical_apicid) boot_cpu = 1; processor.mpc_type = MP_PROCESSOR; processor.mpc_apicid = id; processor.mpc_apicver = 0x10; /* TBD: lapic version */ processor.mpc_cpuflag = (enabled ? CPU_ENABLED : 0); processor.mpc_cpuflag |= (boot_cpu ? CPU_BOOTPROCESSOR : 0); processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) | (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; processor.mpc_featureflag = boot_cpu_data.x86_capability[0]; processor.mpc_reserved[0] = 0; processor.mpc_reserved[1] = 0; MP_processor_info(&processor);}#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_ACPI_INTERPRETER)#define MP_ISA_BUS 0#define MP_MAX_IOAPIC_PIN 127struct mp_ioapic_routing { int apic_id; int irq_start; int irq_end; u32 pin_programmed[4];} mp_ioapic_routing[MAX_IO_APICS];static int __init mp_find_ioapic ( int irq){ int i = 0; /* Find the IOAPIC that manages this IRQ. */ for (i = 0; i < nr_ioapics; i++) { if ((irq >= mp_ioapic_routing[i].irq_start) && (irq <= mp_ioapic_routing[i].irq_end)) return i; } printk(KERN_ERR "ERROR: Unable to locate IOAPIC for IRQ %d\n", irq); return -1;} void __init mp_register_ioapic ( u8 id, u32 address, u32 irq_base){ int idx = 0; if (nr_ioapics >= MAX_IO_APICS) { printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " "(found %d)\n", MAX_IO_APICS, nr_ioapics); panic("Recompile kernel with bigger MAX_IO_APICS!\n"); } if (!address) { printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" " found in MADT table, skipping!\n"); return; } idx = nr_ioapics++; mp_ioapics[idx].mpc_type = MP_IOAPIC; mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE; mp_ioapics[idx].mpc_apicaddr = address; set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); mp_ioapics[idx].mpc_apicid = io_apic_get_unique_id(idx, id); mp_ioapics[idx].mpc_apicver = io_apic_get_version(idx); /* * Build basic IRQ lookup table to facilitate irq->io_apic lookups * and to prevent reprogramming of IOAPIC pins (PCI IRQs). */ mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid; mp_ioapic_routing[idx].irq_start = irq_base; mp_ioapic_routing[idx].irq_end = irq_base + io_apic_get_redir_entries(idx); printk("IOAPIC[%d]: apic_id %d, version %d, address 0x%x, " "IRQ %d-%d\n", idx, mp_ioapics[idx].mpc_apicid, mp_ioapics[idx].mpc_apicver, mp_ioapics[idx].mpc_apicaddr, mp_ioapic_routing[idx].irq_start, mp_ioapic_routing[idx].irq_end); return;}void __init mp_override_legacy_irq ( u8 bus_irq, u8 polarity, u8 trigger, u32 global_irq){ struct mpc_config_intsrc intsrc; int ioapic = -1; int pin = -1; /* * Convert 'global_irq' to 'ioapic.pin'. */ ioapic = mp_find_ioapic(global_irq); if (ioapic < 0) return; pin = global_irq - mp_ioapic_routing[ioapic].irq_start; /* * TBD: This check is for faulty timer entries, where the override * erroneously sets the trigger to level, resulting in a HUGE * increase of timer interrupts! */ if ((bus_irq == 0) && (trigger == 3)) trigger = 1; intsrc.mpc_type = MP_INTSRC; intsrc.mpc_irqtype = mp_INT; intsrc.mpc_irqflag = (trigger << 2) | polarity; intsrc.mpc_srcbus = MP_ISA_BUS; intsrc.mpc_srcbusirq = bus_irq; /* IRQ */ intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */ intsrc.mpc_dstirq = pin; /* INTIN# */ Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3, (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus, intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq); mp_irqs[mp_irq_entries] = intsrc; if (++mp_irq_entries == MAX_IRQ_SOURCES) panic("Max # of irq sources exceeded!\n"); return;}void __init mp_config_acpi_legacy_irqs (void){ struct mpc_config_intsrc intsrc; int i = 0; int ioapic = -1; /* * Fabricate the legacy ISA bus (bus #31). */ mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; Dprintk("Bus #%d is ISA\n", MP_ISA_BUS); /* * Locate the IOAPIC that manages the ISA IRQs (0-15). */ ioapic = mp_find_ioapic(0); if (ioapic < 0) return; intsrc.mpc_type = MP_INTSRC; intsrc.mpc_irqflag = 0; /* Conforming */ intsrc.mpc_srcbus = MP_ISA_BUS; intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* * Use the default configuration for the IRQs 0-15. Unless * overriden by (MADT) interrupt source override entries. */ for (i = 0; i < 16; i++) { int idx; for (idx = 0; idx < mp_irq_entries; idx++) if (mp_irqs[idx].mpc_srcbus == MP_ISA_BUS && (mp_irqs[idx].mpc_dstapic == intsrc.mpc_dstapic) && (mp_irqs[idx].mpc_srcbusirq == i || mp_irqs[idx].mpc_dstirq == i)) break; if (idx != mp_irq_entries) { printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i); continue; /* IRQ already used */ } intsrc.mpc_irqtype = mp_INT; intsrc.mpc_srcbusirq = i; /* Identity mapped */ intsrc.mpc_dstirq = i; Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, " "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3, (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus, intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq); mp_irqs[mp_irq_entries] = intsrc; if (++mp_irq_entries == MAX_IRQ_SOURCES) panic("Max # of irq sources exceeded!\n"); } return;}#ifndef CONFIG_ACPI_HT_ONLYextern FADT_DESCRIPTOR acpi_fadt;#endif /*CONFIG_ACPI_HT_ONLY*/int acpi_tolerant;#ifdef CONFIG_ACPI_PCIvoid __init mp_parse_prt (void){ struct list_head *node = NULL; struct acpi_prt_entry *entry = NULL; int vector = 0; int ioapic = -1; int ioapic_pin = 0; int irq = 0; int idx, bit = 0; int edge_level = 0; int active_high_low = 0; /* * Parsing through the PCI Interrupt Routing Table (PRT) and program * routing for all static (IOAPIC-direct) entries. */ list_for_each(node, &acpi_prt.entries) { entry = list_entry(node, struct acpi_prt_entry, node); /* Need to get irq for dynamic entry */ if (entry->link.handle) { irq = acpi_pci_link_get_irq(entry->link.handle, entry->link.index, &edge_level, &active_high_low); if (!irq) continue; } else { edge_level = 1; active_high_low = 1; irq = entry->link.index; } /* Don't set up the ACPI SCI because it's already set up */ if (acpi_fadt.sci_int == irq) { entry->irq = irq; /*we still need to set entry's irq*/ continue; } ioapic = mp_find_ioapic(irq); if (ioapic < 0) continue; ioapic_pin = irq - mp_ioapic_routing[ioapic].irq_start; /* * Avoid pin reprogramming. PRTs typically include entries * with redundant pin->irq mappings (but unique PCI devices); * we only only program the IOAPIC on the first. */ bit = ioapic_pin % 32; idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32); if (idx > 3) { printk(KERN_ERR "Invalid reference to IOAPIC pin " "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, ioapic_pin); continue; } if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) { Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n", mp_ioapic_routing[ioapic].apic_id, ioapic_pin); entry->irq = irq; continue; } mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit); vector = io_apic_set_pci_routing(ioapic, ioapic_pin, irq, edge_level, active_high_low); if (vector) entry->irq = irq; printk(KERN_DEBUG "%02x:%02x:%02x[%c] -> %d-%d -> vector 0x%02x" " -> IRQ %d %s %s\n", entry->id.segment, entry->id.bus, entry->id.device, ('A' + entry->pin), mp_ioapic_routing[ioapic].apic_id, ioapic_pin, vector, entry->irq, edge_level ? "level" : "edge", active_high_low ? "low" : "high"); } print_IO_APIC(); return;}#endif /*CONFIG_ACPI_PCI*/#endif /*CONFIG_X86_IO_APIC && CONFIG_ACPI_INTERPRETER*/#endif /*CONFIG_ACPI_BOOT*/
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