pci-irq.c

来自「linux-2.4.29操作系统的源码」· C语言 代码 · 共 1,180 行 · 第 1/3 页

	case 0x61:
	case 0x6a:
	case 0x7e:
		printk(KERN_INFO "SiS pirq: IDE/ACPI/DAQ mapping not implemented: (%u)\n",
		       (unsigned) pirq);
		/* fall thru */
	default:
		printk(KERN_INFO "SiS router unknown request: (%u)\n",
		       (unsigned) pirq);
		break;
	}
	return ret;
}		

/* return value:
 * -1 on error
 * 0 for PCI INTA-INTD
 * 0 or enable bit mask to check or set for onchip functions
 */
static inline int pirq_sis96x_onchip(int pirq, int *reg)
{
	int ret = -1;

	*reg = pirq;
	switch(pirq) {
	case 0x01:
	case 0x02:
	case 0x03:
	case 0x04:
		*reg += 0x40;
	case 0x41:
	case 0x42:
	case 0x43:
	case 0x44:
	case 0x60:
	case 0x61:
	case 0x62:
	case 0x63:
		ret = 0;
		break;

	default:
		printk(KERN_INFO "SiS router unknown request: (%u)\n",
		       (unsigned) pirq);
		break;
	}
	return ret;
}		


static int pirq_sis5595_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
{
	u8 x;
	int reg, check;

	check = pirq_sis5595_onchip(pirq, &reg);
	if (check < 0)
		return 0;

	pci_read_config_byte(router, reg, &x);
	if (check != 0  &&  !(x & check))
		return 0;

	return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
}

static int pirq_sis96x_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
{
	u8 x;
	int reg, check;

	check = pirq_sis96x_onchip(pirq, &reg);
	if (check < 0)
		return 0;

	pci_read_config_byte(router, reg, &x);
	if (check != 0  &&  !(x & check))
		return 0;

	return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
}

static int pirq_sis5595_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
{
	u8 x;
	int reg, set;

	set = pirq_sis5595_onchip(pirq, &reg);
	if (set < 0)
		return 0;

	x = (irq & PIRQ_SIS_IRQ_MASK);
	if (x == 0)
		x = PIRQ_SIS_IRQ_DISABLE;
	else
		x |= set;

	pci_write_config_byte(router, reg, x);

	return 1;
}

static int pirq_sis96x_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
{
	u8 x;
	int reg, set;

	set = pirq_sis96x_onchip(pirq, &reg);
	if (set < 0)
		return 0;

	x = (irq & PIRQ_SIS_IRQ_MASK);
	if (x == 0)
		x = PIRQ_SIS_IRQ_DISABLE;
	else
		x |= set;

	pci_write_config_byte(router, reg, x);

	return 1;
}


/*
 * VLSI: nibble offset 0x74 - educated guess due to routing table and
 *       config space of VLSI 82C534 PCI-bridge/router (1004:0102)
 *       Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
 *       devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
 *       for the busbridge to the docking station.
 */

static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
{
	if (pirq > 8) {
		printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
		return 0;
	}
	return read_config_nybble(router, 0x74, pirq-1);
}

static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
{
	if (pirq > 8) {
		printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
		return 0;
	}
	write_config_nybble(router, 0x74, pirq-1, irq);
	return 1;
}

/*
 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
 * and Redirect I/O registers (0x0c00 and 0x0c01).  The Index register
 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a.  The Redirect
 * register is a straight binary coding of desired PIC IRQ (low nibble).
 *
 * The 'link' value in the PIRQ table is already in the correct format
 * for the Index register.  There are some special index values:
 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
 * and 0x03 for SMBus.
 */
static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
{
	outb_p(pirq, 0xc00);
	return inb(0xc01) & 0xf;
}

static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
{
	outb_p(pirq, 0xc00);
	outb_p(irq, 0xc01);
	return 1;
}

/* Support for AMD756 PCI IRQ Routing
 * Jhon H. Caicedo <[e-mail]>
 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
 * The AMD756 pirq rules are nibble-based
 * offset 0x56 0-3 PIRQA  4-7  PIRQB
 * offset 0x57 0-3 PIRQC  4-7  PIRQD
 */
static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
{
	u8 irq;
	irq = 0;
	if (pirq <= 4)
	{
		irq = read_config_nybble(router, 0x56, pirq - 1);
	}
	printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
		dev->vendor, dev->device, pirq, irq);
	return irq;
}

static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
{
	printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n", 
		dev->vendor, dev->device, pirq, irq);
	if (pirq <= 4)
	{
		write_config_nybble(router, 0x56, pirq - 1, irq);
	}
	return 1;
}

#ifdef CONFIG_PCI_BIOS

static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
{
	struct pci_dev *bridge;
	int pin = pci_get_interrupt_pin(dev, &bridge);
	return pcibios_set_irq_routing(bridge, pin, irq);
}

#endif


static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
{
	/* We must not touch 440GX even if we have tables. 440GX has
	   different IRQ routing weirdness */
	if(pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0, NULL) ||
	   pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2, NULL))
		return 0;
	switch(device)
	{
		case PCI_DEVICE_ID_INTEL_82371FB_0:
		case PCI_DEVICE_ID_INTEL_82371SB_0:
		case PCI_DEVICE_ID_INTEL_82371AB_0:
		case PCI_DEVICE_ID_INTEL_82371MX:
		case PCI_DEVICE_ID_INTEL_82443MX_0:
		case PCI_DEVICE_ID_INTEL_82801AA_0:
		case PCI_DEVICE_ID_INTEL_82801AB_0:
		case PCI_DEVICE_ID_INTEL_82801BA_0:
		case PCI_DEVICE_ID_INTEL_82801BA_10:
		case PCI_DEVICE_ID_INTEL_82801CA_0:
		case PCI_DEVICE_ID_INTEL_82801CA_12:
		case PCI_DEVICE_ID_INTEL_82801DB_0:
		case PCI_DEVICE_ID_INTEL_82801E_0:
		case PCI_DEVICE_ID_INTEL_82801EB_0:
		case PCI_DEVICE_ID_INTEL_ESB_0:
		case PCI_DEVICE_ID_INTEL_ICH6_0:
			r->name = "PIIX/ICH";
			r->get = pirq_piix_get;
			r->set = pirq_piix_set;
			return 1;
	}
	return 0;
}

static __init int via_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
{
	/* FIXME: We should move some of the quirk fixup stuff here */
	switch(device)
	{
		case PCI_DEVICE_ID_VIA_82C586_0:
		case PCI_DEVICE_ID_VIA_82C596:
		case PCI_DEVICE_ID_VIA_82C686:
		case PCI_DEVICE_ID_VIA_8231:
		/* FIXME: add new ones for 8233/5 */
			r->name = "VIA";
			r->get = pirq_via_get;
			r->set = pirq_via_set;
			return 1;
	}
	return 0;
}

static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
{
	switch(device)
	{
		case PCI_DEVICE_ID_VLSI_82C534:
			r->name = "VLSI 82C534";
			r->get = pirq_vlsi_get;
			r->set = pirq_vlsi_set;
			return 1;
	}
	return 0;
}


static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
{
	switch(device)
	{
		case PCI_DEVICE_ID_SERVERWORKS_OSB4:
		case PCI_DEVICE_ID_SERVERWORKS_CSB5:
			r->name = "ServerWorks";
			r->get = pirq_serverworks_get;
			r->set = pirq_serverworks_set;
			return 1;
	}
	return 0;
}

static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
{
	u8 reg;
	u16 devid;

	if (device != PCI_DEVICE_ID_SI_503)
		return 0;
		
	/*
	 * In case of SiS south bridge, we need to detect the two
	 * kinds of routing tables we have seen so far (5595 and 96x). 
	 * Since the maintain the same device ID, we need to do poke 
	 * the PCI configuration space to find the router type we are
	 * dealing with.
	 */

	/*
	 * Factoid: writing bit6 of register 0x40 of the router config space
	 * will make the SB to show up 0x096x inside the device id. Note,
	 * we need to restore register 0x40 after the device id poke.
	 */

	pci_read_config_byte(router, PIRQ_SIS_DETECT_REGISTER, &reg);
	pci_write_config_byte(router, PIRQ_SIS_DETECT_REGISTER, reg | (1 << 6));
	pci_read_config_word(router, PCI_DEVICE_ID, &devid);
	pci_write_config_byte(router, PIRQ_SIS_DETECT_REGISTER, reg);

	if ((devid & 0xfff0) == 0x0960) {
		r->name = "SIS96x";
		r->get = pirq_sis96x_get;
		r->set = pirq_sis96x_set;
		DBG("PCI: Detecting SiS router at %02x:%02x : SiS096x detected\n",
		    rt->rtr_bus, rt->rtr_devfn);
	} else {
		r->name = "SIS5595";
		r->get = pirq_sis5595_get;
		r->set = pirq_sis5595_set;
		DBG("PCI: Detecting SiS router at %02x:%02x : SiS5595 detected\n",
		    rt->rtr_bus, rt->rtr_devfn);
	}
	return 1;
}

static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
{
	switch(device)
	{
		case PCI_DEVICE_ID_CYRIX_5520:
			r->name = "NatSemi";
			r->get = pirq_cyrix_get;
			r->set = pirq_cyrix_set;
			return 1;
	}
	return 0;
}

static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
{
	switch(device)
	{
		case PCI_DEVICE_ID_OPTI_82C700:
			r->name = "OPTI";
			r->get = pirq_opti_get;
			r->set = pirq_opti_set;
			break;
		case PCI_DEVICE_ID_OPTI_82C558:
			r->name = "OPTI VIPER";
			r->get = pirq_viper_get;
			r->set = pirq_viper_set;
			break;
		default:
			return 0;
	}
	return 1;
}

static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
{
	switch(device)
	{
		case PCI_DEVICE_ID_ITE_IT8330G_0:
			r->name = "ITE";
			r->get = pirq_ite_get;
			r->set = pirq_ite_set;
			return 1;
	}
	return 0;
}

static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
{
	switch(device)
	{
		case PCI_DEVICE_ID_AL_M1533:
			r->name = "ALI";
			r->get = pirq_ali_get;
			r->set = pirq_ali_set;