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📄 smp.c

📁 linux-2.4.29操作系统的源码
💻 C
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void smp_receive_signal(int cpu){	if (smp_processors_ready) {		unsigned long mask = 1UL << cpu;		if ((cpu_present_map & mask) != 0) {			u64 data0 = (((u64)&xcall_receive_signal) & 0xffffffff);			if (tlb_type == spitfire)				spitfire_xcall_deliver(data0, 0, 0, mask);			else				cheetah_xcall_deliver(data0, 0, 0, mask);		}	}}void smp_receive_signal_client(int irq, struct pt_regs *regs){	/* Just return, rtrap takes care of the rest. */	clear_softint(1 << irq);}void smp_report_regs(void){	smp_cross_call(&xcall_report_regs, 0, 0, 0);}void smp_flush_cache_all(void){	/* Cheetah need do nothing. */	if (tlb_type == spitfire) {		smp_cross_call(&xcall_flush_cache_all_spitfire, 0, 0, 0);		__flush_cache_all();	}}void smp_flush_tlb_all(void){	if (tlb_type == spitfire)		smp_cross_call(&xcall_flush_tlb_all_spitfire, 0, 0, 0);	else		smp_cross_call(&xcall_flush_tlb_all_cheetah, 0, 0, 0);	__flush_tlb_all();}/* We know that the window frames of the user have been flushed * to the stack before we get here because all callers of us * are flush_tlb_*() routines, and these run after flush_cache_*() * which performs the flushw. * * The SMP TLB coherency scheme we use works as follows: * * 1) mm->cpu_vm_mask is a bit mask of which cpus an address *    space has (potentially) executed on, this is the heuristic *    we use to avoid doing cross calls. * *    Also, for flushing from kswapd and also for clones, we *    use cpu_vm_mask as the list of cpus to make run the TLB. * * 2) TLB context numbers are shared globally across all processors *    in the system, this allows us to play several games to avoid *    cross calls. * *    One invariant is that when a cpu switches to a process, and *    that processes tsk->active_mm->cpu_vm_mask does not have the *    current cpu's bit set, that tlb context is flushed locally. * *    If the address space is non-shared (ie. mm->count == 1) we avoid *    cross calls when we want to flush the currently running process's *    tlb state.  This is done by clearing all cpu bits except the current *    processor's in current->active_mm->cpu_vm_mask and performing the *    flush locally only.  This will force any subsequent cpus which run *    this task to flush the context from the local tlb if the process *    migrates to another cpu (again). * * 3) For shared address spaces (threads) and swapping we bite the *    bullet for most cases and perform the cross call (but only to *    the cpus listed in cpu_vm_mask). * *    The performance gain from "optimizing" away the cross call for threads is *    questionable (in theory the big win for threads is the massive sharing of *    address space state across processors). */void smp_flush_tlb_mm(struct mm_struct *mm){        /*         * This code is called from two places, dup_mmap and exit_mmap. In the         * former case, we really need a flush. In the later case, the callers         * are single threaded exec_mmap (really need a flush), multithreaded         * exec_mmap case (do not need to flush, since the caller gets a new         * context via activate_mm), and all other callers of mmput() whence         * the flush can be optimized since the associated threads are dead and         * the mm is being torn down (__exit_mm and other mmput callers) or the         * owning thread is dissociating itself from the mm. The         * (atomic_read(&mm->mm_users) == 0) check ensures real work is done         * for single thread exec and dup_mmap cases. An alternate check might         * have been (current->mm != mm).         *                                              Kanoj Sarcar         */        if (atomic_read(&mm->mm_users) == 0)                return;	{		u32 ctx = CTX_HWBITS(mm->context);		int cpu = smp_processor_id();		if (atomic_read(&mm->mm_users) == 1) {			/* See smp_flush_tlb_page for info about this. */			mm->cpu_vm_mask = (1UL << cpu);			goto local_flush_and_out;		}		smp_cross_call_masked(&xcall_flush_tlb_mm,				      ctx, 0, 0,				      mm->cpu_vm_mask);	local_flush_and_out:		__flush_tlb_mm(ctx, SECONDARY_CONTEXT);	}}void smp_flush_tlb_range(struct mm_struct *mm, unsigned long start,			 unsigned long end){	{		u32 ctx = CTX_HWBITS(mm->context);		int cpu = smp_processor_id();		start &= PAGE_MASK;		end    = PAGE_ALIGN(end);		if (mm == current->active_mm && atomic_read(&mm->mm_users) == 1) {			mm->cpu_vm_mask = (1UL << cpu);			goto local_flush_and_out;		}		smp_cross_call_masked(&xcall_flush_tlb_range,				      ctx, start, end,				      mm->cpu_vm_mask);	local_flush_and_out:		__flush_tlb_range(ctx, start, SECONDARY_CONTEXT, end, PAGE_SIZE, (end-start));	}}void smp_flush_tlb_page(struct mm_struct *mm, unsigned long page){	{		u32 ctx = CTX_HWBITS(mm->context);		int cpu = smp_processor_id();		page &= PAGE_MASK;		if (mm == current->active_mm && atomic_read(&mm->mm_users) == 1) {			/* By virtue of being the current address space, and			 * having the only reference to it, the following operation			 * is safe.			 *			 * It would not be a win to perform the xcall tlb flush in			 * this case, because even if we switch back to one of the			 * other processors in cpu_vm_mask it is almost certain that			 * all TLB entries for this context will be replaced by the			 * time that happens.			 */			mm->cpu_vm_mask = (1UL << cpu);			goto local_flush_and_out;		} else {			/* By virtue of running under the mm->page_table_lock,			 * and mmu_context.h:switch_mm doing the same, the following			 * operation is safe.			 */			if (mm->cpu_vm_mask == (1UL << cpu))				goto local_flush_and_out;		}		/* OK, we have to actually perform the cross call.  Most likely		 * this is a cloned mm or kswapd is kicking out pages for a task		 * which has run recently on another cpu.		 */		smp_cross_call_masked(&xcall_flush_tlb_page,				      ctx, page, 0,				      mm->cpu_vm_mask);		if (!(mm->cpu_vm_mask & (1UL << cpu)))			return;	local_flush_and_out:		__flush_tlb_page(ctx, page, SECONDARY_CONTEXT);	}}/* CPU capture. *//* #define CAPTURE_DEBUG */extern unsigned long xcall_capture;static atomic_t smp_capture_depth = ATOMIC_INIT(0);static atomic_t smp_capture_registry = ATOMIC_INIT(0);static unsigned long penguins_are_doing_time;void smp_capture(void){	if (smp_processors_ready) {		int result = __atomic_add(1, &smp_capture_depth);		membar("#StoreStore | #LoadStore");		if (result == 1) {			int ncpus = smp_num_cpus;#ifdef CAPTURE_DEBUG			printk("CPU[%d]: Sending penguins to jail...",			       smp_processor_id());#endif			penguins_are_doing_time = 1;			membar("#StoreStore | #LoadStore");			atomic_inc(&smp_capture_registry);			smp_cross_call(&xcall_capture, 0, 0, 0);			while (atomic_read(&smp_capture_registry) != ncpus)				membar("#LoadLoad");#ifdef CAPTURE_DEBUG			printk("done\n");#endif		}	}}void smp_release(void){	if (smp_processors_ready) {		if (atomic_dec_and_test(&smp_capture_depth)) {#ifdef CAPTURE_DEBUG			printk("CPU[%d]: Giving pardon to imprisoned penguins\n",			       smp_processor_id());#endif			penguins_are_doing_time = 0;			membar("#StoreStore | #StoreLoad");			atomic_dec(&smp_capture_registry);		}	}}/* Imprisoned penguins run with %pil == 15, but PSTATE_IE set, so they * can service tlb flush xcalls... */extern void prom_world(int);extern void save_alternate_globals(unsigned long *);extern void restore_alternate_globals(unsigned long *);void smp_penguin_jailcell(int irq, struct pt_regs *regs){	unsigned long global_save[24];	clear_softint(1 << irq);	__asm__ __volatile__("flushw");	save_alternate_globals(global_save);	prom_world(1);	atomic_inc(&smp_capture_registry);	membar("#StoreLoad | #StoreStore");	while (penguins_are_doing_time)		membar("#LoadLoad");	restore_alternate_globals(global_save);	atomic_dec(&smp_capture_registry);	prom_world(0);}extern unsigned long xcall_promstop;void smp_promstop_others(void){	if (smp_processors_ready)		smp_cross_call(&xcall_promstop, 0, 0, 0);}extern void sparc64_do_profile(unsigned long pc, unsigned long o7);#define prof_multiplier(__cpu)		cpu_data[(__cpu)].multiplier#define prof_counter(__cpu)		cpu_data[(__cpu)].countervoid smp_percpu_timer_interrupt(struct pt_regs *regs){	unsigned long compare, tick, pstate;	int cpu = smp_processor_id();	int user = user_mode(regs);	/*	 * Check for level 14 softint.	 */	{		unsigned long tick_mask = tick_ops->softint_mask;		if (!(get_softint() & tick_mask)) {			extern void handler_irq(int, struct pt_regs *);			handler_irq(14, regs);			return;		}		clear_softint(tick_mask);	}	do {		if (!user)			sparc64_do_profile(regs->tpc, regs->u_regs[UREG_RETPC]);		if (!--prof_counter(cpu)) {			irq_enter(cpu, 0);			if (cpu == boot_cpu_id) {				kstat.irqs[cpu][0]++;				timer_tick_interrupt(regs);			}			update_process_times(user);			irq_exit(cpu, 0);			prof_counter(cpu) = prof_multiplier(cpu);		}		/* Guarentee that the following sequences execute		 * uninterrupted.		 */		__asm__ __volatile__("rdpr	%%pstate, %0\n\t"				     "wrpr	%0, %1, %%pstate"				     : "=r" (pstate)				     : "i" (PSTATE_IE));		compare = tick_ops->add_compare(current_tick_offset);		tick = tick_ops->get_tick();		/* Restore PSTATE_IE. */		__asm__ __volatile__("wrpr	%0, 0x0, %%pstate"				     : /* no outputs */				     : "r" (pstate));	} while (time_after_eq(tick, compare));}static void __init smp_setup_percpu_timer(void){	int cpu = smp_processor_id();	unsigned long pstate;	prof_counter(cpu) = prof_multiplier(cpu) = 1;	/* Guarentee that the following sequences execute	 * uninterrupted.	 */	__asm__ __volatile__("rdpr	%%pstate, %0\n\t"			     "wrpr	%0, %1, %%pstate"			     : "=r" (pstate)			     : "i" (PSTATE_IE));	tick_ops->init_tick(current_tick_offset);	/* Restore PSTATE_IE. */	__asm__ __volatile__("wrpr	%0, 0x0, %%pstate"			     : /* no outputs */			     : "r" (pstate));}void __init smp_tick_init(void){	int i;		boot_cpu_id = hard_smp_processor_id();	current_tick_offset = timer_tick_offset;	cpu_present_map = 0;	for (i = 0; i < linux_num_cpus; i++)		cpu_present_map |= (1UL << linux_cpus[i].mid);	for (i = 0; i < NR_CPUS; i++) {		__cpu_number_map[i] = -1;		__cpu_logical_map[i] = -1;	}	__cpu_number_map[boot_cpu_id] = 0;	prom_cpu_nodes[boot_cpu_id] = linux_cpus[0].prom_node;	__cpu_logical_map[0] = boot_cpu_id;	current->processor = boot_cpu_id;	prof_counter(boot_cpu_id) = prof_multiplier(boot_cpu_id) = 1;}static inline unsigned long find_flush_base(unsigned long size){	struct page *p = mem_map;	unsigned long found, base;	size = PAGE_ALIGN(size);	found = size;	base = (unsigned long) page_address(p);	while (found != 0) {		/* Failure. */		if (p >= (mem_map + max_mapnr))			return 0UL;		if (PageReserved(p)) {			found = size;			base = (unsigned long) page_address(p);		} else {			found -= PAGE_SIZE;		}		p++;	}	return base;}/* /proc/profile writes can call this, don't __init it please. */int setup_profiling_timer(unsigned int multiplier){	unsigned long flags;	int i;	if ((!multiplier) || (timer_tick_offset / multiplier) < 1000)		return -EINVAL;	save_and_cli(flags);	for (i = 0; i < NR_CPUS; i++) {		if (cpu_present_map & (1UL << i))			prof_multiplier(i) = multiplier;	}	current_tick_offset = (timer_tick_offset / multiplier);	restore_flags(flags);	return 0;}

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