📄 traps.c
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/* $Id: traps.c,v 1.1.1.1.2.5 2003/10/23 22:08:56 yoshii Exp $ * * linux/arch/sh/traps.c * * SuperH version: Copyright (C) 1999 Niibe Yutaka * Copyright (C) 2000 Philipp Rumpf * Copyright (C) 2000 David Howells * Copyright (C) 2002 Paul Mundt *//* * 'Traps.c' handles hardware traps and faults after we have saved some * state in 'entry.S'. */#include <linux/config.h>#include <linux/sched.h>#include <linux/kernel.h>#include <linux/string.h>#include <linux/errno.h>#include <linux/ptrace.h>#include <linux/timer.h>#include <linux/mm.h>#include <linux/smp.h>#include <linux/smp_lock.h>#include <linux/init.h>#include <linux/delay.h>#include <linux/spinlock.h>#include <asm/system.h>#include <asm/uaccess.h>#include <asm/io.h>#include <asm/atomic.h>#include <asm/processor.h>#ifdef CONFIG_SH_KGDB#include <asm/kgdb.h>#define CHK_REMOTE_DEBUG(regs) \{ \ if ((kgdb_debug_hook != (kgdb_debug_hook_t *) NULL) && (!user_mode(regs))) \ { \ (*kgdb_debug_hook)(regs); \ } \}#else#define CHK_REMOTE_DEBUG(regs)#endif#define DO_ERROR(trapnr, signr, str, name, tsk) \asmlinkage void do_##name(unsigned long r4, unsigned long r5, \ unsigned long r6, unsigned long r7, \ struct pt_regs regs) \{ \ unsigned long error_code; \ \ /* Check if it's a DSP instruction */ \ if (is_dsp_inst(®s)) { \ /* Enable DSP mode, and restart instruction. */ \ regs.sr |= SR_DSP; \ return; \ } \ \ asm volatile("stc r2_bank, %0": "=r" (error_code)); \ sti(); \ tsk->thread.error_code = error_code; \ tsk->thread.trap_no = trapnr; \ CHK_REMOTE_DEBUG(®s); \ force_sig(signr, tsk); \ die_if_no_fixup(str,®s,error_code); \}/* * These constants are for searching for possible module text * segments. VMALLOC_OFFSET comes from mm/vmalloc.c; MODULE_RANGE is * a guess of how much space is likely to be vmalloced. */#define VMALLOC_OFFSET (8*1024*1024)#define MODULE_RANGE (8*1024*1024)spinlock_t die_lock;void die(const char * str, struct pt_regs * regs, long err){ console_verbose(); spin_lock_irq(&die_lock); printk("%s: %04lx\n", str, err & 0xffff); CHK_REMOTE_DEBUG(regs); show_regs(regs); spin_unlock_irq(&die_lock); do_exit(SIGSEGV);}static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err){ if (!user_mode(regs)) die(str, regs, err);}static int handle_unaligned_notify_count = 10;/* * try and fix up kernelspace address errors * - userspace errors just cause EFAULT to be returned, resulting in SEGV * - kernel/userspace interfaces cause a jump to an appropriate handler * - other kernel errors are bad * - return 0 if fixed-up, -EFAULT if non-fatal (to the kernel) fault */static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err){ if (!user_mode(regs)) { unsigned long fixup; fixup = search_exception_table(regs->pc); if (fixup) { regs->pc = fixup; return 0; } die(str, regs, err); } return -EFAULT;}/* * handle an instruction that does an unaligned memory access by emulating the * desired behaviour * - note that PC _may not_ point to the faulting instruction * (if that instruction is in a branch delay slot) * - return 0 if emulation okay, -EFAULT on existential error */static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs){ int ret, index, count; unsigned long *rm, *rn; unsigned char *src, *dst; index = (instruction>>8)&15; /* 0x0F00 */ rn = ®s->regs[index]; index = (instruction>>4)&15; /* 0x00F0 */ rm = ®s->regs[index]; count = 1<<(instruction&3); ret = -EFAULT; switch (instruction>>12) { case 0: /* mov.[bwl] to/from memory via r0+rn */ if (instruction & 8) { /* from memory */ src = (unsigned char*) *rm; src += regs->regs[0]; dst = (unsigned char*) rn; *(unsigned long*)dst = 0;#ifdef __LITTLE_ENDIAN__ if (copy_from_user(dst, src, count)) goto fetch_fault; if ((count == 2) && dst[1] & 0x80) { dst[2] = 0xff; dst[3] = 0xff; }#else dst += 4-count; if (__copy_user(dst, src, count)) goto fetch_fault; if ((count == 2) && dst[2] & 0x80) { dst[0] = 0xff; dst[1] = 0xff; }#endif } else { /* to memory */ src = (unsigned char*) rm;#if !defined(__LITTLE_ENDIAN__) src += 4-count;#endif dst = (unsigned char*) *rn; dst += regs->regs[0]; if (copy_to_user(dst, src, count)) goto fetch_fault; } ret = 0; break; case 1: /* mov.l Rm,@(disp,Rn) */ src = (unsigned char*) rm; dst = (unsigned char*) *rn; dst += (instruction&0x000F)<<2; if (copy_to_user(dst,src,4)) goto fetch_fault; ret = 0; break; case 2: /* mov.[bwl] to memory, possibly with pre-decrement */ if (instruction & 4) *rn -= count; src = (unsigned char*) rm; dst = (unsigned char*) *rn;#if !defined(__LITTLE_ENDIAN__) src += 4-count;#endif if (copy_to_user(dst, src, count)) goto fetch_fault; ret = 0; break; case 5: /* mov.l @(disp,Rm),Rn */ src = (unsigned char*) *rm; src += (instruction&0x000F)<<2; dst = (unsigned char*) rn; *(unsigned long*)dst = 0; if (copy_from_user(dst,src,4)) goto fetch_fault; ret = 0; break; case 6: /* mov.[bwl] from memory, possibly with post-increment */ src = (unsigned char*) *rm; if (instruction & 4) *rm += count; dst = (unsigned char*) rn; *(unsigned long*)dst = 0; #ifdef __LITTLE_ENDIAN__ if (copy_from_user(dst, src, count)) goto fetch_fault; if ((count == 2) && dst[1] & 0x80) { dst[2] = 0xff; dst[3] = 0xff; }#else dst += 4-count; if (copy_from_user(dst, src, count)) goto fetch_fault; if ((count == 2) && dst[2] & 0x80) { dst[0] = 0xff; dst[1] = 0xff; }#endif ret = 0; break; case 8: switch ((instruction&0xFF00)>>8) { case 0x81: /* mov.w R0,@(disp,Rn) */ src = (unsigned char*) ®s->regs[0];#if !defined(__LITTLE_ENDIAN__) src += 2;#endif dst = (unsigned char*) *rm; /* called Rn in the spec */ dst += (instruction&0x000F)<<1; if (copy_to_user(dst, src, 2)) goto fetch_fault; ret = 0; break; case 0x85: /* mov.w @(disp,Rm),R0 */ src = (unsigned char*) *rm; src += (instruction&0x000F)<<1; dst = (unsigned char*) ®s->regs[0]; *(unsigned long*)dst = 0;#if !defined(__LITTLE_ENDIAN__) dst += 2;#endif if (copy_from_user(dst, src, 2)) goto fetch_fault;#ifdef __LITTLE_ENDIAN__ if (dst[1] & 0x80) { dst[2] = 0xff; dst[3] = 0xff; }#else if (dst[2] & 0x80) { dst[0] = 0xff; dst[1] = 0xff; }#endif ret = 0; break; } break; } return ret; fetch_fault: /* Argh. Address not only misaligned but also non-existent. * Raise an EFAULT and see if it's trapped */ return die_if_no_fixup("Fault in unaligned fixup", regs, 0);}/* * emulate the instruction in the delay slot * - fetches the instruction from PC+2 */static inline int handle_unaligned_delayslot(struct pt_regs *regs){ u16 instruction; if (copy_from_user(&instruction, (u16 *)(regs->pc+2), 2)) { /* the instruction-fetch faulted */ if (user_mode(regs)) return -EFAULT; /* kernel */ die("delay-slot-insn faulting in handle_unaligned_delayslot", regs, 0); } return handle_unaligned_ins(instruction,regs);}/* * handle an instruction that does an unaligned memory access * - have to be careful of branch delay-slot instructions that fault * SH3: * - if the branch would be taken PC points to the branch * - if the branch would not be taken, PC points to delay-slot
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