dma_ini.c

一款SmartPhone的驱动代码

/************************************************************************
 *									*
 *	Copyright (C) SEIKO EPSON CORP. 2001				*
 *									*
 *	File name: init.c						*
 *	  This is initialize functions for DMA used by refresh		*
 *									*
 *	Revision history						*
 *		2002-4-17 4:40PM		Leon Zhong Start.	*
 *									*
 ************************************************************************/
#include "sysLCDC.h"
#include "sysMCU.h"

void init_timer3_8bit()
{

	//select osc3
	//*(volatile unsigned char *) 0x40181=0x00;
	//40146 set prescaler clock directly supply to timer2 by writing 1 to 8-time clock select //register(CLK/1)0x40146
	//*(volatile unsigned char *) PRESC_P8T_ADDR=0x00;		

	
	
	// [0x4014e] set 8-bit time2/3 clock control register
	// 1 Set 8bit timer2 presclae on
	// 2 set 8bit timer2 clock division ratio selection, prescaler (CLK/1) 
	*(volatile unsigned char *)PRESC_P8TS2_P8TS3_ADDR &= 0x0F;
	*(volatile unsigned char *)PRESC_P8TS2_P8TS3_ADDR |= PRESC_PTONH_ON | PRESC_CLKDIVH_SEL0;	// Set timer2 prescaler (CLK/2)
					
	//irda the highest baudrate is 57600
	// [0x40169] set 8bit timer2 reload data register
		// RLD = 8bit timer reload data (0x23)
		// OSC3 = OSC3 clock  = 12MHz
		// BPS = Serial transfer speed (9600bps)
		// PDR = Prescaler clock division (1/1)
		// SDR = Serial interface internal clock division (1/16, asynchronous only)
		// RLD = (OSC3 x PDR x SDR) / (2 x BPS) - 1
		//        = (12 x 1000000 x 1/1 x 1/16) / (2 x 9600) - 1 = 39-1 =38= 0x26 
	 
	*(volatile unsigned char *)T8P_RLD3_ADDR =50;//200;//50 ;//0x26;
	*(volatile unsigned char *)INT_F8TU_ADDR |= INT_E8TU3;	
	
	// [0x40168] set 8bit timer2 control register
	// 1 8bit timer2 preset on
	// 2 8bit timer2 run on
	// 3 set timer2 clock output control on
	*(volatile unsigned char *)T8P_PTRUN3_ADDR = T8P_PTRUN_RUN|T8P_PSET_ON|T8P_PTOUT_ON;


}

void init_hsdma3(unsigned short *add)
{
	/* Disable HSDMA transfer 40271*/
	*(volatile unsigned char *)HSDMA_HS3EN_ADDR &= 0xfe;		// Disable HSDMA transfer.
	
	/* HSDMA trigger mode 40299,16bit timer3 compare A */
	*(volatile unsigned char *)HSDMA_HSD2S_HSD3S_ADDR = 0x50;	// trigger by timer 3.

	/* HSDMA mode and transfer count 48250*/
	/*mode:dual address,memory write*/
	/*transfer count:00000f*/
	*(volatile unsigned long *)(HSDMA_BLKLEN3_TC3L_ADDR ) = 0xa0004b00;// 0xa0004b00;

	/* HSDMA source address 48254*/
	/*source address:0x805ffff*/
	*(volatile unsigned long *)(HSDMA_S3ADRL_ADDR ) = 0x0f0000000+(unsigned long)add;//+fourkcat;

	/* HSDMA destination address 48258*/
	*(volatile unsigned long *)(HSDMA_D3ADRL_ADDR ) = 0x04000002;//0x0100002;

	/* Set HSDMA interrupt priority level 3 on interrupt controller 40264*/
	//*(volatile unsigned char *)INT_PHSD2_PHSD3_ADDR = 0x30;

	/* Reset HSDMA interrupt flag on interrupt controller 40281 */
	*(volatile unsigned char *)INT_FHDM_FIDM_ADDR |= INT_FHSDMA3;

	/* Set HSDMA interrupt enable on interrupt controller 40271*/
	//*(volatile unsigned char *)INT_EHDM_EIDM_ADDR = INT_EHSDMA3;
	
	/* Disable HSDMA transfer 4825c*/
	*(volatile unsigned char *)HSDMA_HS3EN_ADDR |= 0x01;		// enable HSDMA transfer.


}


void StartDMA(unsigned short x1,unsigned short y1,unsigned short x2,unsigned short y2,unsigned short *Srcbuf,unsigned short *Desbuf)
{
	unsigned char f;
	/* Reset HSDMA interrupt flag on interrupt controller 40281 */
	f=*(volatile unsigned char *)INT_FHDM_FIDM_ADDR;
	while(!(f & INT_FHSDMA3))
	f=*(volatile unsigned char *)INT_FHDM_FIDM_ADDR; 
	
	/* Reset HSDMA interrupt flag on interrupt controller 40281 */
	*(volatile unsigned char *)INT_FHDM_FIDM_ADDR |= INT_FHSDMA3; 
	  
	*(volatile unsigned char *)HSDMA_HS3EN_ADDR &= 0xfe; //Disable HSDMA transfer.
	
	/* HSDMA source address 48254*/
	/*source address:0x805ffff*/
	*(volatile unsigned long *)(HSDMA_S3ADRL_ADDR ) =0x0f0000000+(unsigned long)Srcbuf;//+fourkcat;

	/* HSDMA destination address 48258*/
	*(volatile unsigned long *)(HSDMA_D3ADRL_ADDR ) =0x004000000+(unsigned long)Desbuf;//0x0100002;


	/* HSDMA mode and transfer count 48250*/
	/*mode:dual address,memory write*/
	/*transfer count:00000f*/
	*(volatile unsigned long *)(HSDMA_BLKLEN3_TC3L_ADDR )=(y2-y1+1)*(x2-x1+1)+0xa0000000;// 0xa0004b00;
	*(volatile unsigned char *)HSDMA_HS3EN_ADDR |= 0x01; //enable HSDMA transfer.
	
	/* Reset HSDMA interrupt flag on interrupt controller 40281 */
	f=*(volatile unsigned char *)INT_FHDM_FIDM_ADDR;
	while(!(f & INT_FHSDMA3))
	f=*(volatile unsigned char *)INT_FHDM_FIDM_ADDR; 
	
	//init_hsdma3(VRAM);
}