📄 hal_lcd.ms
字号:
.def begin, scl 100, type 0x0, endef
.def val32, val 0, scl 4, type 0xf, endef
.loc 191
cmp %r12,0x2 ; xcmp %r12,2
jrne __LX32 ; xjrne __L32
.loc 192
ext 0x1 ; xld.w %r12,0x0000005a ; 90
ld.w %r12,0x1a
ext halReadReg16@rh ; xcall halReadReg16
ext halReadReg16@rm
call halReadReg16@rl
ld.uh %r10,%r10
add %r10,0x1 ; xadd %r10,%r10,1
jp __LX41 ; xjp __L41
__LX32: ; __L32:
.loc 195
ext 0x1 ; xld.w %r12,0x0000004c ; 76
ld.w %r12,0xc
ext halReadReg16@rh ; xcall halReadReg16
ext halReadReg16@rm
call halReadReg16@rl
ld.uh %r0,%r10
add %r0,0x1 ; xadd %r0,%r0,1
.loc 196
ext 0x0 ; xld.w %r12,0x00000032 ; 50
ld.w %r12,0x32
ext halReadReg16@rh ; xcall halReadReg16
ext halReadReg16@rm
call halReadReg16@rl
ld.uh %r10,%r10
srl %r10,0x8 ; xsrl %r10,10
srl %r10,0x2
cmp %r10,0x14 ; xcmp %r10,20
jreq __LX38 ; xjreq __L38
jrgt __LX40 ; xjrgt __L40
cmp %r10,0x10 ; xcmp %r10,16
jreq __LX38 ; xjreq __L38
jp __LX34 ; xjp __L34
__LX40: ; __L40:
cmp %r10,0x18 ; xcmp %r10,24
jrne __LX34 ; xjrne __L34
__LX38: ; __L38:
.loc 203
ld.w %r10,0x3 ; xld.w %r10,0x00000003 ; 3
mlt.w %r0,%r10
ld.w %r0,%alr
sub %r0,0x1 ; xsub %r0,%r0,1
__LX34: ; __L34:
.loc 206
ld.w %r10,%r0
__LX41: ; __L41:
.loc 208
.def bend, scl 110, type 0x0, endef
popn %r0
ret
.def end, scl 111, type 0x0, endef
.align 1
.def SetOutputPort, val SetOutputPort, scl 2, type 0x2c, endef
.global SetOutputPort
.loc 222
.def ent, scl 101, type 0x0, endef
SetOutputPort:
; .frame %sp,8,$31 # vars= 0, regs= 2/0, args= 0, extra= 0
; .mask 0x80010000,-4
; .fmask 0x00000000,0
pushn %r0
ld.w %r0,%r12
.def port, val 0, scl 17, tag __T14, size 4, type 0xa, endef
.loc 223
.def begin, scl 100, type 0x0, endef
.def reg, val 13, scl 4, type 0xd, endef
ext 0x8 ; xld.w %r12,0x00000202 ; 514
ld.w %r12,0x2
ext halReadReg16@rh ; xcall halReadReg16
ext halReadReg16@rm
call halReadReg16@rl
ld.w %r13,%r10
ext 0x38f ; xand %r13,%r13,0x0000e3ff
and %r13,0x3f
.loc 225
cmp %r0,0x4 ; xcmp %r0,4
jrugt __LX49 ; xjrugt __L49
ld.w %r10,%r0
sll %r10,0x2 ; xsll %r10,2
ext __L50+0x0@h ; xld.w %r10,[%r10+__L50]
ext __L50+0x0@m
ld.w %r9,__L50+0x0@l
add %r9,%r10
ld.w %r10,[%r9]
jp %r10
.code
.align 2
__L50:
.word __L44
.word __L45
.word __L46
.word __L47
.word __L48
.code
.loc 227
__L44:
ext 0x38f ; xand %r13,%r13,0x0000e3ff
and %r13,0x3f
jp __LX43 ; xjp __L43
__L45:
.loc 228
ext 0x10 ; xoor %r13,%r13,0x00000400
or %r13,0x0
jp __LX43 ; xjp __L43
__L46:
.loc 229
ext 0x20 ; xoor %r13,%r13,0x00000800
or %r13,0x0
jp __LX43 ; xjp __L43
__L47:
.loc 230
ext 0x40 ; xoor %r13,%r13,0x00001000
or %r13,0x0
jp __LX43 ; xjp __L43
__L48:
.loc 231
ext 0x50 ; xoor %r13,%r13,0x00001400
or %r13,0x0
jp __LX43 ; xjp __L43
__LX49: ; __L49:
.loc 232
ld.w %r10,0x0
jp __LX51 ; xjp __L51
__LX43: ; __L43:
.loc 235
ld.uh %r13,%r13
ext 0x8 ; xld.w %r12,0x00000202 ; 514
ld.w %r12,0x2
ext halWriteReg16@rh ; xcall halWriteReg16
ext halWriteReg16@rm
call halWriteReg16@rl
.loc 236
ld.w %r10,0x1 ; xld.w %r10,0x00000001 ; 1
__LX51: ; __L51:
.loc 237
.def bend, scl 110, type 0x0, endef
popn %r0
ret
.def end, scl 111, type 0x0, endef
.align 1
.def GetOutputPort, val GetOutputPort, scl 2, tag __T14, size 4, type 0x2a, endef
.global GetOutputPort
.loc 247
.def ent, scl 101, type 0x0, endef
GetOutputPort:
; .frame %sp,4,$31 # vars= 0, regs= 1/0, args= 0, extra= 0
; .mask 0x80000000,-4
; .fmask 0x00000000,0
.loc 248
.def begin, scl 100, type 0x0, endef
.def PortStatus, val 10, scl 4, type 0xf, endef
ext 0x8 ; xld.w %r12,0x00000202 ; 514
ld.w %r12,0x2
ext halReadReg16@rh ; xcall halReadReg16
ext halReadReg16@rm
call halReadReg16@rl
ld.uh %r10,%r10
srl %r10,0x8 ; xsrl %r10,10
srl %r10,0x2
and %r10,0x7 ; xand %r10,%r10,0x00000007
.loc 250
cmp %r10,0x5 ; xcmp %r10,5
jrugt __L59 ; xjrugt __L59
sll %r10,0x2 ; xsll %r10,2
ext __L60+0x0@h ; xld.w %r10,[%r10+__L60]
ext __L60+0x0@m
ld.w %r9,__L60+0x0@l
add %r9,%r10
ld.w %r10,[%r9]
jp %r10
.code
.align 2
__L60:
.word __L54
.word __L55
.word __L56
.word __L59
.word __L57
.word __L58
.code
.loc 252
__L54:
ld.w %r10,0x0
jp __LX61 ; xjp __L61
__L55:
.loc 253
ld.w %r10,0x1 ; xld.w %r10,0x00000001 ; 1
jp __LX61 ; xjp __L61
__L56:
.loc 254
ld.w %r10,0x2 ; xld.w %r10,0x00000002 ; 2
jp __LX61 ; xjp __L61
__L57:
.loc 255
ld.w %r10,0x3 ; xld.w %r10,0x00000003 ; 3
jp __LX61 ; xjp __L61
__L58:
.loc 256
ld.w %r10,0x4 ; xld.w %r10,0x00000004 ; 4
jp __LX61 ; xjp __L61
__L59:
.loc 257
ld.w %r10,0x6 ; xld.w %r10,0x00000006 ; 6
__LX61: ; __L61:
.loc 259
.def bend, scl 110, type 0x0, endef
ret
.def end, scl 111, type 0x0, endef
.align 1
.def SetRGBPanelDataWidth, val SetRGBPanelDataWidth, scl 2, type 0x21, endef
.global SetRGBPanelDataWidth
.loc 269
.def ent, scl 101, type 0x0, endef
SetRGBPanelDataWidth:
; .frame %sp,8,$31 # vars= 0, regs= 2/0, args= 0, extra= 0
; .mask 0x80010000,-4
; .fmask 0x00000000,0
pushn %r0
ld.w %r0,%r12
.def width, val 0, scl 17, type 0xc, endef
.loc 270
.def begin, scl 100, type 0x0, endef
.def reg, val 13, scl 4, type 0xd, endef
ext 0x0 ; xld.w %r12,0x00000032 ; 50
ld.w %r12,0x32
ext halReadReg16@rh ; xcall halReadReg16
ext halReadReg16@rm
call halReadReg16@rl
ld.w %r13,%r10
ext 0x3fe ; xand %r13,%r13,0x0000ff8f
and %r13,0xf
.loc 271
ld.ub %r0,%r0
ext 0x9 ; xsub %r10,%r0,9
sub %r10,%r0
cmp %r10,0xf ; xcmp %r10,15
jrugt __L63 ; xjrugt __L63
sll %r10,0x2 ; xsll %r10,2
ext __L70+0x0@h ; xld.w %r10,[%r10+__L70]
ext __L70+0x0@m
ld.w %r9,__L70+0x0@l
add %r9,%r10
ld.w %r10,[%r9]
jp %r10
.code
.align 2
__L70:
.word __L64
.word __L63
.word __L63
.word __L65
.word __L63
.word __L63
.word __L63
.word __L66
.word __L63
.word __L67
.word __L63
.word __L63
.word __L63
.word __L63
.word __L63
.word __L68
.code
__L64:
.loc 274
ld.uh %r13,%r13
ext 0x0 ; xld.w %r12,0x00000032 ; 50
ld.w %r12,0x32
.loc 275
jp __LX71 ; xjp __L71
__L65:
.loc 277
ext 0x0 ; xld.w %r12,0x00000032 ; 50
ld.w %r12,0x32
or %r13,0x10 ; xoor %r13,%r13,0x00000010
.loc 278
jp __LX71 ; xjp __L71
__L66:
.loc 280
ext 0x0 ; xld.w %r12,0x00000032 ; 50
ld.w %r12,0x32
ext 0x0 ; xoor %r13,%r13,0x00000020
or %r13,0x20
.loc 281
jp __LX71 ; xjp __L71
__L67:
.loc 283
ext 0x0 ; xld.w %r12,0x00000032 ; 50
ld.w %r12,0x32
ext 0x0 ; xoor %r13,%r13,0x00000030
or %r13,0x30
.loc 284
jp __LX71 ; xjp __L71
__L68:
.loc 286
ext 0x0 ; xld.w %r12,0x00000032 ; 50
ld.w %r12,0x32
ext 0x1 ; xoor %r13,%r13,0x00000040
or %r13,0x0
__LX71: ; __L71:
ext halWriteReg16@rh ; xcall halWriteReg16
ext halWriteReg16@rm
call halWriteReg16@rl
__L63:
.loc 291
.def bend, scl 110, type 0x0, endef
popn %r0
ret
.def end, scl 111, type 0x0, endef
.align 1
.def GetRGBPanelDataWidth, val GetRGBPanelDataWidth, scl 2, type 0x2d, endef
.global GetRGBPanelDataWidth
.loc 300
.def ent, scl 101, type 0x0, endef
GetRGBPanelDataWidth:
; .frame %sp,4,$31 # vars= 0, regs= 1/0, args= 0, extra= 0
; .mask 0x80000000,-4
; .fmask 0x00000000,0
.loc 301
ext 0x0 ; xld.w %r12,0x00000032 ; 50
ld.w %r12,0x32
ext halReadReg16@rh ; xcall halReadReg16
ext halReadReg16@rm
call halReadReg16@rl
ld.uh %r10,%r10
srl %r10,0x4 ; xsrl %r10,4
and %r10,0x7 ; xand %r10,%r10,0x00000007
cmp %r10,0x4 ; xcmp %r10,4
jrugt __LX79 ; xjrugt __L79
sll %r10,0x2 ; xsll %r10,2
ext __L80+0x0@h ; xld.w %r10,[%r10+__L80]
ext __L80+0x0@m
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