se3208.h

isp1161驱动代码是我下载并该动后而成,还有点缺点,但对你可能有点帮助

#ifndef __SE3208_H__
#define __SE3208_H__

//#########################################################################################

long   peekl( void * addr ) ;                                    /* get memory 32 bit data */
short  peeks( void * addr ) ;                                    /* get memory 16 bit data */
char   peekc( void * addr ) ;                                    /* get memory  8 bit data */

void pokel( void * addr , long  data );	                         /* set memory data */
void pokes( void * addr , short data );                          /* set memory data */
void pokec( void * addr , char  data );                          /* set memory data */

/*******************************************************************************************/
#define __GET_REG_MEM_8_NO(ADDR)       				\
		  asm( "ldi   %0         , %%R6" : : "i" (ADDR ) );	\
                  asm( "ldb  (%R6, 0x0)  ,%R0");

#define __GET_REG_MEM_16_NO(ADDR)       					\
		  asm( "ldi   %0         , %%R6" : : "i" (ADDR ) );	\
                  asm( "lds  (%R6, 0x0)  ,%R0");

#define __GET_REG_MEM_32_NO(ADDR)       					\
		  asm( "ldi   %0         , %%R6" : : "i" (ADDR ) );	\
                  asm( "ld   (%R6, 0x0)  ,%R0");
/*******************************************************************************************/

#define __SET_REG_MEM_8_NO(ADDR ,VALUE)       			\
		  asm( "ldi  %0   , %%R6" : : "i" (ADDR ) );	\
		  asm( "ldi  %0   , %%R7" : : "i" (VALUE) );	\
                  asm( "stb  %R7  ,(%R6,0)");

#define __SET_REG_MEM_8_PP(ADDR ,VALUE)       			\
		  asm( "push %R6  , %R7");			\
		  asm( "ldi  %0   , %%R6" : : "i" (ADDR ) );	\
		  asm( "ldi  %0   , %%R7" : : "i" (VALUE) );	\
                  asm( "stb  %R7  ,(%R6,0)");			\
		  asm( "pop  %R6  , %R7");

#define __SET_REG_MEM_16_NO(ADDR ,VALUE)       			\
		  asm( "ldi  %0   , %%R6" : : "i" (ADDR ) );	\
		  asm( "ldi  %0   , %%R7" : : "i" (VALUE) );	\
                  asm( "sts  %R7  ,(%R6,0)");

#define __SET_REG_MEM_16_PP(ADDR ,VALUE)       			\
		  asm( "push %R6  , %R7");			\
		  asm( "ldi  %0   , %%R6" : : "i" (ADDR ) );	\
		  asm( "ldi  %0   , %%R7" : : "i" (VALUE) );	\
                  asm( "sts  %R7  ,(%R6,0)");			\
		  asm( "pop  %R6  , %R7");

#define __SET_REG_MEM_32_NO(ADDR ,VALUE)       			\
		  asm( "ldi  %0   , %%R6" : : "i" (ADDR ) );	\
		  asm( "ldi  %0   , %%R7" : : "i" (VALUE) );	\
                  asm( "st   %R7  ,(%R6,0)");

#define __SET_REG_MEM_32_PP(ADDR ,VALUE)       			\
		  asm( "push %R6  , %R7");			\
		  asm( "ldi  %0   , %%R6" : : "i" (ADDR ) );	\
		  asm( "ldi  %0   , %%R7" : : "i" (VALUE) );	\
                  asm( "st   %R7  ,(%R6,0)");			\
		  asm( "pop  %R6  , %R7");
/*******************************************************************************************/
#define __SET_VECTORED() asm("set 12 ; ");
#define __ENABLE_INT()   asm("set 13 ; ");  // global interrupt enable
#define __DISABLE_INT()  asm("clr 13 ; ");  // global interrupt disable
/******************************************************************************************/

/***************************************************************/
/*  Macro for Register Write / Read  */
/***************************************************************/

#define __SET_REG_MEM_8_BIT(ADDR, DATA)		pokec((void*) ADDR, (char)  DATA );
#define __SET_REG_MEM_16_BIT(ADDR, DATA)	pokes((void*) ADDR, (short) DATA );
#define __SET_REG_MEM_32_BIT(ADDR, DATA)	pokel((void*) ADDR, (long)  DATA );

#define __GET_REG_MEM_8_BIT(ADDR, DATA)		DATA = peekc((void*) ADDR);
#define __GET_REG_MEM_16_BIT(ADDR, DATA)	DATA = peeks((void*) ADDR);
#define __GET_REG_MEM_32_BIT(ADDR, DATA)	DATA = peekl((void*) ADDR);

/***************************************************************/
/*  Peripheral Register Write / Read                           */
/***************************************************************/
/*  Macro for WDT  */

#define __SET_WDT_CNTRL_REG(VALUE)	pokec((void*) __WDT_CNTRL_REG, (char)VALUE );
#define __GET_WDT_CNTRL_REG(DATA)	DATA = peekc((void*)__WDT_CNTRL_REG);
#define __SET_WDT_CNT_REG(VALUE)	pokes((void*) __WDT_CNT_REG, (short)VALUE );
#define __GET_WDT_CNT_REG(DATA) 	DATA = peeks((void*)__WDT_CNT_REG);

/*  Macro for Pin Mux  */

#define __SET_PMUX0_MOD_REG(VALUE)	pokel((void*) __PMUX0_CNTRL_REG, (long)VALUE );
#define __SET_PMUX1_MOD_REG(VALUE)	pokel((void*) __PMUX1_CNTRL_REG, (long)VALUE );

/*  Macro for DMA  */

#define __DMA0_CNTRL_REG_SET(VALUE)	pokes((void*) __DMA0_CNTRL_REG, (short)VALUE );
#define __DMA0_SRC_ADDR_SET(VALUE)	pokel((void*) __DMA0_SRC_REG, (long)VALUE );
#define __DMA0_DST_ADDR_SET(VALUE)	pokel((void*) __DMA0_DST_REG, (long)VALUE );
#define __DMA0_CNT_REG_SET(VALUE)	pokel((void*) __DMA0_CNT_REG, (long)VALUE);
#define __GET_DMA0_CNT_REG(DATA) 	DATA = peekl((void*)__DMA0_CNT_REG);
#define __DMA1_CNTRL_REG_SET(VALUE)     pokes((void*) __DMA1_CNTRL_REG, (short)VALUE );
#define __DMA1_SRC_ADDR_SET(VALUE)	pokel((void*) __DMA1_SRC_REG, (long)VALUE );
#define __DMA1_DST_ADDR_SET(VALUE)	pokel((void*) __DMA1_DST_REG, (long)VALUE );
#define __DMA1_CNT_REG_SET(VALUE)  	pokel((void*) __DMA1_CNT_REG, (long)VALUE);
#define __GET_DMA1_CNT_REG(DATA) 	DATA = peekl((void*)__DMA1_CNT_REG);

/*  Macro for Interrupt Controller  */

#define __SET_INT_MOD_REG(CONST) 	pokes((void*)__INT_MODE_REG, (short)CONST);
#define __SET_INT_VEC_REG(CONST) 	pokes((void*)__INT_VEC_REG, (short)CONST);
#define __SET_INT_EN_REG(DATA) 		pokel((void*)__INT_EN_REG,(long)DATA);
#define __ISR_END(INTNO)   		pokec((void *)__INT_VEC_REG, (char)INTNO);

/*  Macro for UART  */

#define __SET_UART0_CNTRL_REG(CONST) 	pokec((void*)__UART0_CNTRL_REG, (char)CONST);
#define __SET_UART0_BAUD_REG(CONST) 	pokes((void*)__UART0_BAUD_REG, (short)CONST);
#define __SET_UART0_DATA(DATA) 		pokec((void*)__UART0_TXBUF_REG,(char)DATA);
#define __GET_UART0_DATA(DATA) 		DATA = peekc((void*)__UART0_RXBUF_REG);
#define __GET_UART0_STATUS(STATUS) 	STATUS = peeks((void*)(__UART0_STATUS_REG));
#define __SET_UART1_CNTRL_REG(CONST) 	pokec((void*)__UART1_CNTRL_REG, (char)CONST);
#define __SET_UART1_BAUD_REG(CONST) 	pokes((void*)__UART1_BAUD_REG, (short)CONST);
#define __SET_UART1_DATA(DATA) 		pokec((void*)__UART1_TXBUF_REG,(char)DATA);
#define __GET_UART1_DATA(DATA) 		DATA = peekc((void*)__UART1_RXBUF_REG);
#define __GET_UART1_STATUS(STATUS) 	STATUS = peeks((void*)(__UART1_STATUS_REG));

/*  Macro for Timer  */

#define __SET_TIMER0_CNTRL_REG(DATA) 	pokes((void*)__TIMER0_CNTRL_REG,(short)DATA);
#define __GET_TIMER0_CNTRL_REG(DATA) 	DATA = peeks((void*)__TIMER0_CNTRL_REG);
#define __SET_TIMER0_CNT_REG(DATA) 	pokes((void*)__TIMER0_CNT_REG,(short)DATA);
#define __SET_TIMER1_CNTRL_REG(DATA) 	pokes((void*)__TIMER1_CNTRL_REG,(short)DATA);
#define __GET_TIMER1_CNTRL_REG(DATA) 	DATA = peeks((void*)__TIMER1_CNTRL_REG);
#define __SET_TIMER1_CNT_REG(DATA) 	pokes((void*)__TIMER1_CNT_REG,(short)DATA);
#define __SET_TIMER2_CNTRL_REG(DATA) 	pokes((void*)__TIMER2_CNTRL_REG,(short)DATA);
#define __GET_TIMER2_CNTRL_REG(DATA) 	DATA = peeks((void*)__TIMER2_CNTRL_REG);
#define __SET_TIMER2_CNT_REG(DATA) 	pokes((void*)__TIMER2_CNT_REG,(short)DATA);
#define __SET_TIMER3_CNTRL_REG(DATA) 	pokes((void*)__TIMER3_CNTRL_REG,(short)DATA);
#define __GET_TIMER3_CNTRL_REG(DATA) 	DATA = peeks((void*)__TIMER3_CNTRL_REG);
#define __SET_TIMER3_CNT_REG(DATA) 	pokes((void*)__TIMER3_CNT_REG,(short)DATA);

/*  Macro for PWM  */

#define __SET_PWM_CNTRL_REG(DATA) 	pokes((void*)__PWM_CNTRL_REG,(short)DATA);
#define __GET_PWM_CNTRL_REG(DATA) 	DATA = peeks((void*)__PWM_CNTRL_REG);
#define __SET_PWM_DUTY_REG(DATA) 	pokes((void*)__PWM_DUTY_REG,(short)DATA);
#define __SET_PWM_PRD_REG(DATA) 	pokes((void*)__PWM_PRD_REG,(short)DATA);
#define __SET_PWM_PCNT_REG(DATA) 	pokes((void*)__PWM_PCNT_REG,(short)DATA);

/*  Macro for PPM  */

#define __SET_PPM0_CNTRL_REG(DATA) 	pokes((void*)__PPM0_CNTRL_REG,(short)DATA);
#define __GET_PPM0_CNTRL_REG(DATA) 	DATA = peeks((void*)__PPM0_CNTRL_REG);
#define __GET_PPM0_PW_REG(DATA) 	DATA = peeks((void*)__PPM0_PW_REG);
#define __SET_PPM1_CNTRL_REG(DATA) 	pokes((void*)__PPM1_CNTRL_REG,(short)DATA);
#define __GET_PPM1_CNTRL_REG(DATA) 	DATA = peeks((void*)__PPM1_CNTRL_REG);
#define __GET_PPM1_PW_REG(DATA) 	DATA = peeks((void*)__PPM1_PW_REG);

/*  Macro for PIO  */

#define __SET_PIO_MOD_REG(DATA) 	pokel((void*)__PIO_MOD_REG,(long)DATA);
#define __SET_PIO_LDAT_REG(DATA) 	pokel((void*)__PIO_LDAT_REG,(long)DATA);
#define __GET_PIO_EDAT_REG(DATA) 	DATA = peekl((void*)__PIO_EDAT_REG);

/************************************************

         Peripheral registers 

*************************************************/

#define __WDT_CNTRL_REG      	     0X01800010
#define __WDT_CNT_REG      	     0X01800014

#define __PMUX0_CNTRL_REG      	     0X01800018
#define __PMUX1_CNTRL_REG      	     0X0180001C

#define __LROM_CTRL_REG              0X01800400
#define __LRAM_CTRL_REG              0X01800408

#define __DMA0_CNTRL_REG 	     0X01800800
#define __DMA0_SRC_REG  	     0X01800804
#define __DMA0_DST_REG    	     0X01800808
#define __DMA0_CNT_REG   	     0X0180080C

#define __DMA1_CNTRL_REG 	     0X01800810
#define __DMA1_SRC_REG  	     0X01800814
#define __DMA1_DST_REG    	     0X01800818
#define __DMA1_CNT_REG   	     0X0180081C

#define __INT_MODE_REG    	     0X01800C00
#define __INT_VEC_REG    	     0X01800C04
#define __INT_EN_REG       	     0X01800C08

#define __UART0_CNTRL_REG            0X01801000
#define __UART0_STATUS_REG           0X01801004
#define __UART0_TXBUF_REG            0X01801008
#define __UART0_RXBUF_REG            0X0180100C
#define __UART0_BAUD_REG       	     0X01801010

#define __UART1_CNTRL_REG            0X01801020
#define __UART1_STATUS_REG           0X01801024
#define __UART1_TXBUF_REG            0X01801028
#define __UART1_RXBUF_REG            0X0180102C
#define __UART1_BAUD_REG       	     0X01801030

#define __TIMER0_CNTRL_REG           0X01801400
#define __TIMER0_CNT_REG      	     0X01801404

#define __TIMER1_CNTRL_REG           0X01801408
#define __TIMER1_CNT_REG      	     0X0180140C

#define __TIMER2_CNTRL_REG           0X01801410
#define __TIMER2_CNT_REG      	     0X01801414

#define __TIMER3_CNTRL_REG           0X01801418
#define __TIMER3_CNT_REG      	     0X0180141C

#define __PWM_CNTRL_REG      	     0X01801800
#define __PWM_DUTY_REG      	     0X01801804
#define __PWM_PRD_REG      	     0X01801808
#define __PWM_PCNT_REG    	     0X0180180C

#define __PPM0_CNTRL_REG      	     0X01801C00
#define __PPM0_PW_REG      	     0X01801C04

#define __PPM1_CNTRL_REG      	     0X01801C08
#define __PPM1_PW_REG      	     0X01801C0C

#define __PIO_MOD_REG       	     0X01802000
#define __PIO_LDAT_REG      	     0X01802004
#define __PIO_EDAT_REG      	     0X01802008

/**************************************************/
// LOCAL ROM CONTROL REGISTER
/**************************************************/
#     define __LROMCS_DECODE_ADDR_WITH_RDX  ( 0 << 7 )
#     define __LROMCS_DECODE_ADDR_ONLY      ( 1 << 7 )

#     define __LROMCS_WAIT_02_CLK           ( 0 << 0 )
#     define __LROMCS_WAIT_04_CLK           ( 1 << 0 )
#     define __LROMCS_WAIT_06_CLK           ( 2 << 0 )
#     define __LROMCS_WAIT_08_CLK           ( 3 << 0 )
#     define __LROMCS_WAIT_10_CLK           ( 4 << 0 )
#     define __LROMCS_WAIT_12_CLK           ( 5 << 0 )
#     define __LROMCS_WAIT_14_CLK           ( 6 << 0 )
#     define __LROMCS_WAIT_16_CLK           ( 7 << 0 )

/**************************************************/
// SYSTEM CONTROL REGISTER 
/**************************************************/

#     define __EROM_DATA_BUS_WIDTH_08    ( 0 << 8 )
#     define __EROM_DATA_BUS_WIDTH_16    ( 1 << 8 )
#     define __EROM_DATA_BUS_WIDTH_32    ( 2 << 8 )

#     define __FRAME_MEM_INT_WAIT_2_CLK  ( 0 << 6 )
#     define __FRAME_MEM_INT_WAIT_3_CLK  ( 1 << 6 )
#     define __FRAME_MEM_INT_WAIT_4_CLK  ( 2 << 6 )
#     define __FRAME_MEM_INT_WAIT_5_CLK  ( 3 << 6 )

#     define __INT_REG_WAIT_2_CLK        ( 0 << 4 )
#     define __INT_REG_WAIT_3_CLK        ( 1 << 4 )
#     define __INT_REG_WAIT_4_CLK        ( 2 << 4 )
#     define __INT_REG_WAIT_5_CLK        ( 3 << 4 )