📄 halboot.si
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#ifndef CYGONCE_HAL_HALBOOT_SI /* -*-asm-*- */#define CYGONCE_HAL_HALBOOT_SI// ====================================================================//// <platform>/halboot.si//// HAL bootup platform-oriented code (assembler)//// ====================================================================//####COPYRIGHTBEGIN####//// -------------------------------------------// The contents of this file are subject to the Cygnus eCos Public License// Version 1.0 (the "License"); you may not use this file except in// compliance with the License. You may obtain a copy of the License at// http://sourceware.cygnus.com/ecos// // Software distributed under the License is distributed on an "AS IS"// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the// License for the specific language governing rights and limitations under// the License.// // The Original Code is eCos - Embedded Cygnus Operating System, released// September 30, 1998.// // The Initial Developer of the Original Code is Cygnus. Portions created// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved.// -------------------------------------------////####COPYRIGHTEND####// ====================================================================//#####DESCRIPTIONBEGIN####//// Author(s): hmt// Contributors: hmt// Date: 1999-02-01// Purpose: Bootup code, platform oriented.// Description:////####DESCRIPTIONEND####//// ====================================================================// External Platform Initial Setup//// This should set up RAM and caches, and calm down any external// interrupt sources.//// It is just plain included in vectors.S//// RAM has not yet been touched at all; in fact all you have is a// register window selected. ! Empty macro for debugging vectors.S .macro led val .endm ! First of all - before setting up the stack - set ! the available memory to the full 4Mb;#define MEC_MEMCFG (0x01f80010) sethi %hi( MEC_MEMCFG ), %g1 ld [ %g1 + %lo(MEC_MEMCFG) ], %g2 mov 7, %g3 sll %g3, 10, %g3 ! Bits 10,11,12 are of interest andn %g2, %g3, %g2 mov 4, %g3 sll %g3, 10, %g3 ! Bits 10,11,12 are of interest or %g2, %g3, %g2 ! Shift 256k left 4 times to st %g2, [ %g1 + %lo(MEC_MEMCFG) ] ! ...give memsize of 4Mb ! then copy the branch instructions into the vector rd %tbr, %g1 andn %g1, 0xfff, %g1 ! clear non-address bits sethi %hi(real_vector_instructions), %l0 or %l0, %lo(real_vector_instructions), %l0 ld [ %l0 ], %l1 st %l1, [ %g1 ] ! into the vector ld [ %l0 + 4 ], %l1 st %l1, [ %g1 + 4 ] ! into the vector#endif /* CYGONCE_HAL_HALBOOT_SI *//* EOF halboot.si */
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