📄 hal_intr.h
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externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_VSR_COUNT];externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_VSR_COUNT];externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_VSR_COUNT];// (interrupt_objects only used in the interrupt case _but_ the interrupt// attach &co macros write it, so keep it full-sized)//---------------------------------------------------------------------------// Default ISRs for exception/interrupt handing.// note that these have the same ABI apart from the extra SP parameter// for exceptions.externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);// return code from ISR is passed to interrupt_end() in the kernel.externC void cyg_hal_exception_handler(CYG_ADDRWORD vector, CYG_ADDRWORD data, CYG_ADDRWORD stackpointer);//---------------------------------------------------------------------------// Default VSRs for exception/interrupt handing.// note that these do not have a C ABI as such; they are *vector* service// routines and are written in assembler.externC void hal_default_exception_vsr( void );externC void hal_default_interrupt_vsr( void );//---------------------------------------------------------------------------// Interrupt state storagetypedef cyg_uint32 CYG_INTERRUPT_STATE;//---------------------------------------------------------------------------// Interrupt control macros// THIS ONE IS NOT A STANDARD HAL ENTRY (HAL_DISABLE_TRAPS)// (so should be unused externally)#define HAL_DISABLE_TRAPS(_old_) \ asm volatile ( \ "rd %%psr, %0;" \ "andn %0, 0x20, %%l7;" \ "wr %%l7, %%psr;" \ "nop; nop; nop" \ : "=r"(_old_) \ : \ : "l7" \ );// THIS ONE IS NOT A STANDARD HAL ENTRY (HAL_QUERY_TRAPS)// (so should be unused externally)#define HAL_QUERY_TRAPS(_old_) \ asm volatile ( \ "rd %%psr, %%l7;" \ "and %%l7, 0x020, %0" \ : "=r"(_old_) \ : \ : "l7" \ );#define HAL_DISABLE_INTERRUPTS(_old_) \ asm volatile ( \ "rd %%psr, %0;" \ "or %0, 0xf00, %%l7;" \ "wr %%l7, %%psr;" \ "nop; nop; nop" \ : "=r"(_old_) \ : \ : "l7" \ );#define HAL_ENABLE_INTERRUPTS() \ asm volatile ( \ "rd %%psr, %%l7;" \ "andn %%l7, 0xf00, %%l7;" \ "or %%l7, 0x020, %%l7;" \ "wr %%l7, %%psr;" \ "nop; nop; nop" \ : \ : \ : "l7" \ );#define HAL_RESTORE_INTERRUPTS(_old_) \ asm volatile ( \ "rd %%psr, %%l7;" \ "andn %%l7, 0xf20, %%l7;" \ "and %0 , 0xf20, %%l6;" \ "wr %%l6, %%l7, %%psr;" \ "nop; nop; nop" \ : \ : "r"(_old_) \ : "l6","l7" \ );#define HAL_QUERY_INTERRUPTS(_old_) \ asm volatile ( \ "rd %%psr, %%l7;" \ "and %%l7, 0xf00, %%l7;" \ "xor %%l7, 0xf00, %0" \ : "=r"(_old_) \ : \ : "l7" \ );//---------------------------------------------------------------------------// Interrupt and VSR attachment macros#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \ CYG_MACRO_START \ cyg_uint32 _index_; \ HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ \ if( (CYG_ADDRESS)hal_default_isr == hal_interrupt_handlers[_vector_] || \ (CYG_ADDRESS)cyg_hal_exception_handler == \ hal_interrupt_handlers[_vector_] ) { \ (_state_) = 0; \ } else { \ (_state_) = 1; \ } \ CYG_MACRO_END#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \ CYG_MACRO_START \ if( (CYG_ADDRESS)hal_default_isr == hal_interrupt_handlers[_vector_] ||\ (CYG_ADDRESS)cyg_hal_exception_handler == \ hal_interrupt_handlers[_vector_] ) \ { \ hal_interrupt_handlers[_vector_] = (CYG_ADDRESS)_isr_; \ hal_interrupt_data[_vector_] = (CYG_ADDRWORD) _data_; \ hal_interrupt_objects[_vector_] = (CYG_ADDRESS)_object_; \ } \CYG_MACRO_END #define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) CYG_MACRO_START \ if( hal_interrupt_handlers[_vector_] == (CYG_ADDRESS)_isr_ ) \ { \ hal_interrupt_handlers[_vector_] = \ (CYG_VECTOR_IS_INTERRUPT( _vector_ ) \ ? (CYG_ADDRESS)hal_default_isr \ : (CYG_ADDRESS)cyg_hal_exception_handler); \ hal_interrupt_data[_vector_] = 0; \ hal_interrupt_objects[_vector_] = 0; \ } \CYG_MACRO_END#define HAL_VSR_GET( _vector_, _pvsr_ ) \ *(CYG_ADDRESS *)(_pvsr_) = hal_vsr_table[_vector_]; #define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) CYG_MACRO_START \ if( _poldvsr_ != NULL ) \ *(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \ hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \CYG_MACRO_END// This is an ugly name, but what it means is: grab the VSR back to eCos// internal handling, or if you like, the default handler. But if// cooperating with GDB and CygMon, the default behaviour is to pass most// exceptions to CygMon. This macro undoes that so that eCos handles the// exception. So use it with care.#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) CYG_MACRO_START \ if( _poldvsr_ != NULL ) \ *(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \ hal_vsr_table[_vector_] = ( CYG_VECTOR_IS_INTERRUPT( _vector_ ) \ ? (CYG_ADDRESS)hal_default_interrupt_vsr \ : (CYG_ADDRESS)hal_default_exception_vsr ); \CYG_MACRO_END//---------------------------------------------------------------------------// Which PIC (if any) is available is dependent on the board.// This sets up that stuff:#include <cyg/hal/hal_xpic.h>// Ditto the clock(s)// This defines all the clock macros the kernel requires:#include <cyg/hal/hal_clock.h>//---------------------------------------------------------------------------#endif // ifndef CYGONCE_HAL_INTR_H// End of hal_intr.h
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