testcxx.cxx

ecos为实时嵌入式操作系统

//===========================================================================
//
//      testcxx.cxx
//
//      uITRON "C++" test program
//
//===========================================================================
//####COPYRIGHTBEGIN####
//
// -------------------------------------------
// The contents of this file are subject to the Cygnus eCos Public License
// Version 1.0 (the "License"); you may not use this file except in
// compliance with the License.  You may obtain a copy of the License at
// http://sourceware.cygnus.com/ecos
// 
// Software distributed under the License is distributed on an "AS IS"
// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied.  See the
// License for the specific language governing rights and limitations under
// the License.
// 
// The Original Code is eCos - Embedded Cygnus Operating System, released
// September 30, 1998.
// 
// The Initial Developer of the Original Code is Cygnus.  Portions created
// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions.  All Rights Reserved.
// -------------------------------------------
//
//####COPYRIGHTEND####
//===========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):   hmt
// Contributors:        hmt
// Date:        1998-03-13
// Purpose:     uITRON API testing
// Description: 
//
//####DESCRIPTIONEND####
//
//===========================================================================

#include <pkgconf/uitron.h>             // uITRON setup CYGNUM_UITRON_SEMAS
                                        // CYGPKG_UITRON et al
#include <cyg/infra/testcase.h>         // testing infrastructure

#ifdef CYGPKG_UITRON                    // we DO want the uITRON package

#ifdef CYGSEM_KERNEL_SCHED_MLQUEUE      // we DO want prioritized threads

#ifdef CYGFUN_KERNEL_THREADS_TIMER      // we DO want timout-able calls

#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK     // we DO want the realtime clock

// we're OK if it's C++ or neither of those two is defined:
#if defined( __cplusplus ) || \
    (!defined( CYGIMP_UITRON_INLINE_FUNCS ) && \
     !defined( CYGIMP_UITRON_CPP_OUTLINE_FUNCS) )

// =================== TEST CONFIGURATION ===================
#if \
    /* test configuration for enough tasks */                      \
    (CYGNUM_UITRON_TASKS >= 4)                                  && \
    (CYGNUM_UITRON_TASKS < 90)                                  && \
    (CYGNUM_UITRON_START_TASKS == 1)                            && \
    ( !defined(CYGPKG_UITRON_TASKS_CREATE_DELETE) ||               \
      CYGNUM_UITRON_TASKS_INITIALLY >= 4             )          && \
                                                                   \
    /* the end of the large #if statement */                       \
    1 

// ============================ END ============================



#include <cyg/compat/uitron/uit_func.h> // uITRON

externC void
cyg_package_start( void )
{
    CYG_TEST_INIT();
    CYG_TEST_INFO( "Calling cyg_uitron_start()" );
    cyg_uitron_start();
}

volatile int intercom = 0;
volatile int intercount = 0;
INT scratch = 0;

extern "C" {
    void task1( unsigned int arg );
    void task2( unsigned int arg );
    void task3( unsigned int arg );
    void task4( unsigned int arg );
}


#ifndef CYGSEM_KERNEL_SCHED_TIMESLICE
#define TIMESLICEMSG "Assuming no kernel timeslicing"
#define TSGO()          (1)
#define TSRELEASE()     CYG_EMPTY_STATEMENT
#define TSSTOP()        CYG_EMPTY_STATEMENT
#define TSLOCK()        CYG_EMPTY_STATEMENT
#define TSUNLOCK()      CYG_EMPTY_STATEMENT
#define ICWAIT( _i_ )   CYG_EMPTY_STATEMENT

#else
// Now follow some nasty bodges to control the scheduling when basically it
// isn't controlled ie. timeslicing is on.  It's bodgy because we're
// testing normal synchronization methods, so we shouldn't rely on them for
// comms between threads here.  Instead there's a mixture of communicating
// via a flag (ts_interlock) which stops the "controlled" thread running
// away, and waiting for the controlled thread to run enough for us.
//
// Tasks 3 and 4 are waited for by the control task: task 3 locks the
// scheduler so is immediately descheduled when it unlocks it, task 4 does
// waiting-type operations, so we must give it chance to run by yielding a
// few times ourselves.  Note the plain constant in ICWAIT() below.

#define TIMESLICEMSG "Assuming kernel timeslicing ENABLED"
volatile int ts_interlock = 0;
#define TSGO()          (ts_interlock)
#define TSRELEASE()     ts_interlock = 1
#define TSSTOP()        ts_interlock = 0

#define TSLOCK()        CYG_MACRO_START                                 \
    ER ercd2 = dis_dsp();                                               \
    CYG_TEST_CHECK( E_OK == ercd2, "dis_dsp (TSLOCK) bad ercd2" );      \
CYG_MACRO_END

#define TSUNLOCK()      CYG_MACRO_START                                 \
    ER ercd3 = ena_dsp();                                               \
    CYG_TEST_CHECK( E_OK == ercd3, "ena_dsp (TSUNLOCK) bad ercd3" );    \
CYG_MACRO_END

#define ICWAIT( _i_ )   CYG_MACRO_START                                 \
    int loops;                                                          \
    for ( loops = 3; (0 < loops) || ((_i_) > intercount); loops-- ) {   \
        ER ercd4 = rot_rdq( 0 ); /* yield */                            \
        CYG_TEST_CHECK( E_OK == ercd4, "rot_rdq (ICWAIT) bad ercd4" );  \
    }                                                                   \
CYG_MACRO_END
#endif // CYGSEM_KERNEL_SCHED_TIMESLICE

/*
#define IC() \
CYG_MACRO_START \
  static char *msgs[] = { "ZERO", "ONE", "TWO", "THREE", "FOUR", "LOTS" }; \
  CYG_TEST_INFO( msgs[ intercount > 5 ? 5 : intercount ] ); \
CYG_MACRO_END
*/

// #define CYG_TEST_UITRON_TEST1_LOOPING 1

void task1( unsigned int arg )
{
    ER ercd;
    T_RTSK ref_tskd;

#ifdef CYG_TEST_UITRON_TEST1_LOOPING
    while ( 1 ) {
#endif // CYG_TEST_UITRON_TEST1_LOOPING

    CYG_TEST_INFO( "Task 1 running" );
    CYG_TEST_INFO( TIMESLICEMSG );

    intercom = 0;
    intercount = 0;

    CYG_TEST_INFO( "Testing get_tid and ref_tsk" );
    ercd = get_tid( &scratch );
    CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
    CYG_TEST_CHECK( 1 == scratch, "tid not 1" );
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
#ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR
    ercd = get_tid( NULL );
    CYG_TEST_CHECK( E_PAR == ercd, "get_tid bad ercd !E_PAR" );
#endif
    ercd = ref_tsk( &ref_tskd, -6 );
    CYG_TEST_CHECK( E_ID == ercd, "ref_tsk bad ercd !E_ID" );
    ercd = ref_tsk( &ref_tskd, 99 );
    CYG_TEST_CHECK( E_ID == ercd, "ref_tsk bad ercd !E_ID" );
#ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR
    ercd = ref_tsk( NULL, 1 );
    CYG_TEST_CHECK( E_PAR == ercd, "ref_tsk bad ercd !E_PAR" );
#endif
#endif // we can test bad param error returns
    ercd = ref_tsk( &ref_tskd, 1 );
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
    CYG_TEST_CHECK( TTS_RUN == ref_tskd.tskstat, "Bad task status 1" );
    ercd = ref_tsk( &ref_tskd, 0 );
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
    CYG_TEST_CHECK( TTS_RUN == ref_tskd.tskstat, "Bad task status 0" );
    ercd = ref_tsk( &ref_tskd, 2 );
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
    CYG_TEST_CHECK( TTS_DMT == ref_tskd.tskstat, "Bad task status 2" );
    CYG_TEST_CHECK( 2 == ref_tskd.tskpri, "Bad task prio 2" );

    ercd = rsm_tsk( 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "rsm_tsk DMT bad ercd !E_OBJ" );
    ercd = frsm_tsk( 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "frsm_tsk DMT bad ercd !E_OBJ" );
    ercd = rel_wai( 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "rel_wai DMT bad ercd !E_OBJ" );
    ercd = sus_tsk( 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "sus_tsk DMT bad ercd !E_OBJ" );
    ercd = wup_tsk( 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "wup_tsk DMT bad ercd !E_OBJ" );
    ercd = can_wup( &scratch, 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "can_wup DMT bad ercd !E_OBJ" );

    CYG_TEST_PASS( "get_tid, ref_tsk" );

    CYG_TEST_INFO( "Testing prio change and start task" );
    ercd = sta_tsk( 2, 99 );
    CYG_TEST_CHECK( E_OK == ercd, "sta_tsk bad ercd" );

    // drop pri of task 2
    ercd = chg_pri( 2, 4 );
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri bad ercd" );
    ercd = ref_tsk( &ref_tskd, 2 );
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
    CYG_TEST_CHECK( TTS_RDY == ref_tskd.tskstat, "Bad task status 2" );
    CYG_TEST_CHECK( 4 == ref_tskd.tskpri, "Bad task prio 2" );

    // drop our pri below task 2
    ercd = chg_pri( 0, 5 );
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri bad ercd" );

    ercd = ref_tsk( &ref_tskd, 1 );
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
    CYG_TEST_CHECK( 5 == ref_tskd.tskpri, "Bad task prio 1" );
    ercd = ref_tsk( &ref_tskd, 0 );
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
    CYG_TEST_CHECK( 5 == ref_tskd.tskpri, "Bad task prio 0" );
    ercd = ref_tsk( &ref_tskd, 2 );
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
    // it will have run to completion and regained its original prio
    CYG_TEST_CHECK( 2 == ref_tskd.tskpri, "Bad task prio 2" );
    CYG_TEST_CHECK( TTS_DMT == ref_tskd.tskstat, "Bad task status 2" );

    // retest these now that the task has executed once
    ercd = rsm_tsk( 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "rsm_tsk DMT bad ercd !E_OBJ" );
    ercd = frsm_tsk( 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "frsm_tsk DMT bad ercd !E_OBJ" );
    ercd = rel_wai( 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "rel_wai DMT bad ercd !E_OBJ" );
    ercd = sus_tsk( 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "sus_tsk DMT bad ercd !E_OBJ" );
    ercd = wup_tsk( 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "wup_tsk DMT bad ercd !E_OBJ" );
    ercd = can_wup( &scratch, 2 );
    CYG_TEST_CHECK( E_OBJ == ercd, "can_wup DMT bad ercd !E_OBJ" );

#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
    ercd = chg_pri( -6, 9 );
    CYG_TEST_CHECK( E_ID == ercd, "chg_pri bad ercd !E_ID" );
    ercd = chg_pri( 99, 9 );
    CYG_TEST_CHECK( E_ID == ercd, "chg_pri bad ercd !E_ID" );
    ercd = sta_tsk( -6, 99 );
    CYG_TEST_CHECK( E_ID == ercd, "sta_tsk bad ercd !E_ID" );
    ercd = sta_tsk( 99, 99 );
    CYG_TEST_CHECK( E_ID == ercd, "sta_tsk bad ercd !E_ID" );
#endif // we can test bad param error returns

    CYG_TEST_PASS( "sta_tsk, chg_pri" );

    CYG_TEST_INFO( "Testing delay and dispatch disabling" );
    ercd = dly_tsk( 10 );
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
    ercd = ena_dsp();
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
    ercd = dly_tsk( 10 );
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
    ercd = dis_dsp();
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
    ercd = dly_tsk( 10 );
    CYG_TEST_CHECK( E_CTX == ercd, "dly_tsk bad ercd !E_CTX" );
    ercd = dis_dsp();
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
    ercd = dly_tsk( 10 );
    CYG_TEST_CHECK( E_CTX == ercd, "dly_tsk bad ercd !E_CTX" );
#endif // we can test bad param error returns
    ercd = ena_dsp();
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
    ercd = dly_tsk( 10 );
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
    ercd = ena_dsp();
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
    ercd = dly_tsk( 10 );
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );

    CYG_TEST_PASS( "dly_tsk, ena_dsp, dis_dsp" );
    
    CYG_TEST_INFO( "Testing ready queue manipulation" );
    ercd = rot_rdq( 0 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
    ercd = rot_rdq( 4 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
    ercd = rot_rdq( 5 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
    ercd = rot_rdq( -6 );
    CYG_TEST_CHECK( E_PAR == ercd, "rot_rdq bad ercd !E_PAR" );
    ercd = rot_rdq( 99 );
    CYG_TEST_CHECK( E_PAR == ercd, "rot_rdq bad ercd !E_PAR" );
#endif // we can test bad param error returns
    
    CYG_TEST_PASS( "rot_rdq" );

    CYG_TEST_INFO( "Testing suspend/resume" );
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
    ercd = sus_tsk( -6 );
    CYG_TEST_CHECK( E_ID == ercd, "sus_tsk bad ercd !E_ID" );
    ercd = sus_tsk( 99 );
    CYG_TEST_CHECK( E_ID == ercd, "sus_tsk bad ercd !E_ID" );
    ercd = rsm_tsk( -6 );
    CYG_TEST_CHECK( E_ID == ercd, "rsm_tsk bad ercd !E_ID" );
    ercd = rsm_tsk( 99 );
    CYG_TEST_CHECK( E_ID == ercd, "rsm_tsk bad ercd !E_ID" );
    ercd = frsm_tsk( -6 );
    CYG_TEST_CHECK( E_ID == ercd, "frsm_tsk bad ercd !E_ID" );
    ercd = frsm_tsk( 99 );
    CYG_TEST_CHECK( E_ID == ercd, "frsm_tsk bad ercd !E_ID" );
#endif // we can test bad param error returns
    // drop task 3 pri to same as us
    CYG_TEST_CHECK( 0 == intercount, "intercount != 0" );

    intercom = 3;                       // tell T3 to loop
    TSRELEASE();
    ercd = dis_dsp();
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
    ercd = sta_tsk( 3, 66 );
    CYG_TEST_CHECK( E_OK == ercd, "sta_tsk bad ercd" );
    ercd = chg_pri( 3, 5 );
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri bad ercd" );
    ercd = ena_dsp();
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );

    ercd = rot_rdq( 0 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
    ICWAIT( 1 );
    CYG_TEST_CHECK( 1 == intercount, "intercount != 1" );
    ercd = sus_tsk( 3 );
    TSRELEASE();
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
    intercom = 0;                       // bad data to T3
    ercd = rot_rdq( 0 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
    CYG_TEST_CHECK( 1 == intercount, "intercount != 1" );
    intercom = 3;                       // tell T3 to loop
    TSRELEASE();
    ercd = rsm_tsk( 3 );
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
    ercd = rot_rdq( 0 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
    ICWAIT( 2 );
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );

    CYG_TEST_INFO( "Command task 3 inner loop stop" );
    intercom = 2 + 4;
    TSRELEASE();
    ercd = rot_rdq( 0 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
    
    ercd = sus_tsk( 3 );
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
    intercom = 0;                       // bad data to T3
    TSRELEASE();
    ercd = rot_rdq( 0 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
    ercd = sus_tsk( 3 );                // suspend AGAIN
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
    ercd = sus_tsk( 3 );                //     AND AGAIN
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
    TSRELEASE();
    ercd = rot_rdq( 0 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
    ercd = rsm_tsk( 3 );
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
    ercd = rsm_tsk( 3 );
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
    TSRELEASE();
    ercd = rot_rdq( 0 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
    intercom = 3;                       // tell T3 to loop
    TSRELEASE();
    ercd = rsm_tsk( 3 );                // expect restart this time
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
    ercd = rot_rdq( 0 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
    ICWAIT( 3 );
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );

    CYG_TEST_INFO( "Command task 3 inner loop stop 2" );
    intercom = 2 + 4;
    TSRELEASE();
    ercd = rot_rdq( 0 );
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );