upsd.h

本程序可以支持SLE4442、SLE4428、FALSH、CPU卡

/*****************************************************
	硬件定义:外部IO偏移地址
	Copyright 2003-2004 by CDY
******************************************************/
#define CSIO_ADDR	0xfe00

#define PA_IN	XBYTE[CSIO_ADDR+0x00]	//输入寄存器
#define PA_CON	XBYTE[CSIO_ADDR+0x02]	//控制寄存器
#define PA_OUT	XBYTE[CSIO_ADDR+0x04]	//输出寄存器
#define PA_DIR	XBYTE[CSIO_ADDR+0x06]	//方向寄存器
#define PA_DRI	XBYTE[CSIO_ADDR+0x08]	//驱动寄存器
#define PA_MAC	XBYTE[CSIO_ADDR+0x0A]	//输入宏单元
#define PA_EN	XBYTE[CSIO_ADDR+0x0C]	//使能寄存器

#define PB_IN	XBYTE[CSIO_ADDR+0x01]
#define PB_CON	XBYTE[CSIO_ADDR+0x03]
#define PB_OUT	XBYTE[CSIO_ADDR+0x05]
#define PB_DIR	XBYTE[CSIO_ADDR+0x07]
#define PB_DRI	XBYTE[CSIO_ADDR+0x09]
#define PB_MAC	XBYTE[CSIO_ADDR+0x0B]
#define PB_EN	XBYTE[CSIO_ADDR+0x0D]

#define PC_IN	XBYTE[CSIO_ADDR+0x10]
#define PC_OUT	XBYTE[CSIO_ADDR+0x12]
#define PC_DIR	XBYTE[CSIO_ADDR+0x14]
#define PC_DRI	XBYTE[CSIO_ADDR+0x16]
#define PC_MAC	XBYTE[CSIO_ADDR+0x18]
#define PC_EN	XBYTE[CSIO_ADDR+0x1A]

#define PD_IN	XBYTE[CSIO_ADDR+0x11]
#define PD_OUT	XBYTE[CSIO_ADDR+0x13]
#define PD_DIR	XBYTE[CSIO_ADDR+0x15]
#define PD_DRI	XBYTE[CSIO_ADDR+0x17]
#define PD_EN	XBYTE[CSIO_ADDR+0x1B]

#define OUT_MAC_AB	XBYTE[CSIO_ADDR+0x20]	//输出宏单元AB
#define OUT_MAC_BC	XBYTE[CSIO_ADDR+0x21]	//输出宏单元BC
#define OMC_MAC_AB	XBYTE[CSIO_ADDR+0x22]	//屏蔽寄存器AB
#define OMC_MAC_BC	XBYTE[CSIO_ADDR+0x23]	//屏蔽寄存器BC

#define M_PRO	XBYTE[CSIO_ADDR+0xC0]	//主FLASH保护位寄存器
#define S_PRO	XBYTE[CSIO_ADDR+0xC2]	//次FLASH保护位寄存器
#define JTAG_EN	XBYTE[CSIO_ADDR+0xC7]	//JATG使能寄存器
#define PMMR0	XBYTE[CSIO_ADDR+0xB0]	//PLD电源功耗管理寄存器
#define PMMR2	XBYTE[CSIO_ADDR+0xB4]
#define PAGE	XBYTE[CSIO_ADDR+0xE0]	//页寄存器
#define VM		XBYTE[CSIO_ADDR+0xE2]	//程序、数据切换控制寄存器

sbit PSW1   = PSW^1;	
/*    PCON   */
//sbit SMOD   = PCON^7;	   // Baud Rate bit for USART	
//sbit SMOD2  = PCON^6;  	   // Baud Rate bit for USART2
//sbit LVREN  = PCON^5;	   // Low voltage Reset enable
//sbit UCLK   = PCON^4;	   // Reserved
//sbit GF1    = PCON^3;	   // General Flag1
//sbit GF0    = PCON^2;	   // General Flag0
//sbit PD     = PCON^1;	   // Power Down Mode
//sbit IDLE   = PCON^0;	   // Idle Mode
/* ------------------------ */
/*  UPSD 3200 Extensions    */
/* ------------------------ */
sfr P4 =0xC0;		// New port 4
sfr P1SFS    = 0x91;	// Port 1 I/O select
sfr P3SFS    = 0x93;	// Port 3 I/O select
sfr P4SFS    = 0x94;	// Port 4 I/O select

// --- ADC SFRs ---
sfr ASCL    = 0x95;	// ADC Clock Prescaler 8-bit
sfr ADAT   = 0x96;	// ADC Data Value
sfr ACON   = 0x97;	// ADC Control Register

// --- UART2 SFRS ----
sfr SCON2  = 0x9A;	// UART2 Serial Control
sfr SBUF2  = 0x9B;	// UART2 Serial Buffer

// --- PWM SFRs -----
sfr PWMCON   = 0xA1;	// PWM Polarity Control
sfr PWM0  = 0xA2;		// PWM0 Duty Cycle
sfr PWM1  = 0xA3;		// PWM1 Duty Cycle
sfr PWM2  = 0xA4;		// PWM2 Duty Cycle
sfr PWM3  = 0xA5;		// PWM3 Duty Cycle
sfr PSCL0L   = 0xB1;	// 8bit PWM Prescaler low
sfr PSCL0H   = 0xB2;	// 8bit PWM Prescaler high

// --- WDT SFRs ---
sfr WDRST   = 0xA6;	// Watch Dog Reset
sfr WDKEY   = 0xAE;	// Watch Dog Key Enable

// --- INTERRUPT 2 SFRs ---
sfr IEA   = 0xA7;		// Interrupt Enable (2nd)
	//sbit EDDC    = IEA^7; 
	//sbit ES2   = IEA^4; 
	//sbit EI2C   = IEA^1;
	//sbit EUSB   = IEA^0;
sfr IPA    = 0xB7;	// Interrupt Priority (2nd)
	//sbit PDDC   = IPA^7;
	//sbit PS2    = IPA^5;
	//sbit PT1   = IPA^3;
	//sbit PX1   = IPA^2;
	//sbit PI2C   = IPA^1;
	//sbit PUSB   = IPA^0;

// --- I2C S1/S2 & DDC SFRs ---
sfr S1SETUP= 0xD1;	// DDC-I2C S1 Setup Control
sfr S2SETUP= 0xD2;	// I2C S2 Setup Control
sfr RAMBUF = 0xD4;	// DDC Ram Buffer Access
sfr DDCDAT = 0xD5;	// DDC I2C Xmit register
sfr DDCADR = 0xD6;	// DDC Memory Address Pointer
sfr DDCCON = 0xD7;	// DDC Control Register
sfr S1CON  = 0xD8;	// DDC I2C S1 Control
sfr S1STA  = 0xD9;	// DDC I2C Status
sfr S1DAT  = 0xDA;	// DDC I2C Data Hold Register
sfr S1ADR  = 0xDB;   // DDC I2C Bus Address
sfr S2CON  = 0xDC;	// I2C S2 Control
	//sbit CR2    = S2CON^7;
	//sbit EN1   = S2CON^6; 
	//sbit STA   = S2CON^5; 
	//sbit STO    = S2CON^4;
	//sbit ADDR   = S2CON^3;
	//sbit AA   = S2CON^2;
	//sbit CR1   = S2CON^1;
	//sbit CR0   = S2CON^0;

sfr S2STA  = 0xDD;	// I2C S2 Status
	//sbit GC    = S2STA^7;
	//sbit STOP   = S2STA^6; 
	//sbit INTR   = S2STA^5; 
	//sbit TX_MD    = S2STA^4;
	//sbit BBUSY   = S2STA^3;
	//sbit BLOST   = S2STA^2;
	//sbit ACK_R   = S2STA^1;
	//sbit SLV   = S2STA^0;
sfr S2DAT  = 0xDE;	// I2C S2 Data Hold Register
sfr S2ADR  = 0xDF;	// I2C S2 Bus Address

// --- USB SFRs ---
sfr USCL  = 0xE1;		// USB Clock 8bit prescaler register
sfr UDT1  = 0xE6;		// USB End Point 1 Data Register
sfr UDT0  = 0xE7;	// USB End Point 0 Data register
sfr UISTA = 0xE8;	// USB Interrupt Status
sfr UIEN  = 0xE9;	// USB Interrupt Enable
sfr UCON0 = 0xEA;	// USB End Point 0 Control
sfr UCON1 = 0xEB;	// USB End Point 1 Control
sfr UCON2 = 0xEC;	// USB End Point 2 Control
sfr USTA  = 0xED;		// USB End Point 0 Status
sfr UADR  = 0xEE;		// USB Address Register
sfr UDR0  = 0xEF;		// USB Endpoint 0 Data Receive

/* -----------------------------------
Interrupt Vectors:
Interrupt Address = (Number * 8) + 3
------------------------------------ */ 
#define RESET_VECTOR_ADDR		0		// Reset Address = 0
#define IE0_VECTOR			0     	// 0x03 External Interrupt 0
#define IEO_VECTOR_ADDR             0x03
#define TF0_VECTOR			1		//0x0B Timer 0
#define TF0_VECTOR_ADDR			0x0B
#define IE1_VECTOR			2		//0x13 External Interrupt 1
#define IE1_VECTOR_ADDR			0x13
#define TF1_VECTOR			3		//0x1B Timer 1
#define TF1_VECTOR_ADDR			0x1B
#define SIO_VECTOR			4		//0x23 Serial Port 0
#define SIO_VECTOR_ADDR			0x23
#define TF2_VECTOR			5		//0x2B Timer 2
#define TF2_VECTOR_ADDR			0x2B	
#define USB_VECTOR			6		//0x33 USB
#define USB_VECTOR_ADDR			0x33	
#define DDC_VECTOR			7		//0x3B DDC
#define DDC_VECTOR_ADDR			0x3B	
#define I2C_VECTOR			8		//0x43 I2C
#define I2C_VECTOR_ADDR			0x43	
#define SIO1_VECTOR   			9		//0x4B Serial Port 1
#define SIO1_VECTOR_ADDR   		0x4B