syslib.c

860最小系统的bsp

/* Copyright 2001 Beijing Xinwei ShenZhen department, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01m,18mar99,cn   added support for motCpmEnd driver (SPR# 25839).
01l,03dec98,mas  added GUARDED attributes to non-local memory areas mapped in
		 sysPhysMemDesc[]. (SPR 23674)
01k,12nov98,cn   changed sysFecEnetEnable(), sysFecEnetDisable() to
                 enable/disable the PHY device.
01j,09nov98,cn   added support for FADS860T boards and FEC.
01i,08may98,gls  added clear of all cpm interrups in sysToMonitor
01h,08mar98,gls	 added checks to allow BSP to work with the PPC850FADS
01g,18feb98,gls  added code to allow the BSP to work with the PPC823FADS
01f,12nov97,map  updated to use ppc860Timer.c [SPR# 9366]
01e,21feb97,mas  removed NOMANUAL, made sysHwInit2() visible to 'man' (SPR 7879)
01d,11nov96,tam  added power management mode initialization.
01c,06nov96,tpr  reworked sysHwInit().
01b,28may96,dzb  added Ethernet driver support routines.
		 added port initialization, and increased system to 24Mhz.
01a,19apr96,tpr  written.
*/

/*
DESCRIPTION
This library provides board-specific routines.  The chip drivers included are:

    ppc860Timer.c	- PowerPC/860 Timer library
    sysMotCpmEnd.c	- configuration module for the motCpmEnd driver

INCLUDE FILES: sysLib.h

SEE ALSO:
.pG "Configuration"
*/

/* includes */

#include "vxWorks.h"
#include "vme.h"
#include "memLib.h"
#include "cacheLib.h"
#include "sysLib.h"
#include "config.h"
#include "string.h"
#include "intLib.h"
#include "logLib.h"
#include "stdio.h"
#include "taskLib.h"
#include "vxLib.h"
#include "tyLib.h"
#include "arch/ppc/vxPpcLib.h"
#include "private/vmLibP.h"

#include "drv/multi/ppc860Siu.h"
#include "bsc860.h"

#ifdef	INCLUDE_CPM
#include "drv/netif/if_cpm.h"
#endif

PHYS_MEM_DESC sysPhysMemDesc [] =
    {
        {
            (void *) LOCAL_MEM_LOCAL_ADRS,
            (void *) LOCAL_MEM_LOCAL_ADRS,
            LOCAL_MEM_SIZE,
            VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
            VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE
        },
        {
            (void *) 0x01fe0000,
            (void *) 0x01fe0000,
            0x00020000,					
            VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE, 
            VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  
        },
        {
            (void *) 0x02800000,
            (void *) 0x02800000,
            0x00080000,					
            VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE, 
            VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  
        },
        {
            (void *) 0x30000000,
            (void *) 0x30000000,
            0x00800000,     /*30000000-303fffff,31000000-313fffff*/                     
            VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE ,
            VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  
        },

        {
            (void *) 0x04000000,
            (void *) 0x04000000,
            0x00800000,                         
            VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE ,
            VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  
        },
        {
            (void *) 0x05000000,
            (void *) 0x05000000,
            0x00080000,					
            VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
            VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
        },

        {
            (void *) 0x06000000,
            (void *) 0x06000000,
            0x00080000,					
            VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
            VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
        },
        {
            (void *) 0x06a00000,
            (void *) 0x06a00000,
            0x00002000,					
            VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
            VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
        },
        {
            (void *) 0x07000000,
            (void *) 0x07000000,
            0x01000000,					
            VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
            VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
        },
        {
            (void *) INTERNAL_MEM_MAP_ADDR,
            (void *) INTERNAL_MEM_MAP_ADDR,
            INTERNAL_MEM_MAP_SIZE,			
            VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE |
            VM_STATE_MASK_GUARDED,
            VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  |
            VM_STATE_GUARDED
        }
    
    };

int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);

int   sysBus      = BUS;                /* system bus type (VME_BUS, etc) */
int   sysCpu      = CPU;                /* system CPU type (PPC860) */
char *sysBootLine = BOOT_LINE_ADRS;	/* address of boot line */
char *sysExcMsg   = EXC_MSG_ADRS;	/* catastrophic message area */
int   sysProcNum;			/* processor number of this CPU */
int   sysFlags;				/* boot flags */
char  sysBootHost [BOOT_FIELD_LEN];	/* name of host from which we booted */
char  sysBootFile [BOOT_FIELD_LEN];	/* name of file from which we booted */
BOOL  sysVmeEnable = FALSE;		/* by default no VME */

#ifdef	INCLUDE_CPM
/* XXX set the following array to a unique Ethernet hardware address XXX */

/* last 5 nibbles are board specific, initialized in sysHwInit */

UINT8 sysCpmEnetAddr[6] = {0x80, 0x80, 0x69, 0x00, 0x01, 0x91};

extern STATUS cpmattach();

#endif	/* INCLUDE_CPM */

/* locals */

void sysCpmEnetDisable (int unit);
void sysCpmEnetIntDisable (int unit);
void sysNetHwInit();
void sysNetHwInit2();
void sysNetSwitch();


#include "sysSerial.c"
#include "intrCtl/ppc860Intr.c"
#include "mem/nullNvRam.c"
#include "timer/ppc860Timer.c"		/* PPC860 & 821 have on chip timers */
#ifdef INCLUDE_CPM
#include "sysMotCpmEnd.c"		/* configuration module for motCpmEnd */
#endif	/* INCLUDE_CPM */

#define ENET_MAC_ADDR_FLAG   0x307c0000/*wut*/
#define ENET_MAC_ADDR_OK        0x55


/******************************************************************************
*
* sysModel - return the model name of the CPU board
*
* This routine returns the model name of the CPU board.
*
* RETURNS: A pointer to the string.
*/

char * sysModel (void)
{
    return ("BSC - PowerPC 860");
}





/******************************************************************************
*
* sysBspRev - return the bsp version with the revision eg 1.0/<x>
*
* This function returns a pointer to a bsp version with the revision.
* for eg. 1.0/<x>. BSP_REV defined in config.h is concatanated to
* BSP_VERSION and returned.
*
* RETURNS: A pointer to the BSP version/revision string.
*/

char * sysBspRev (void)
{
    return (BSP_VERSION BSP_REV);
}





/******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various feature of the  boards. It sets up
* the control registers, initializes various devices if they are present.
*
* NOTE: This routine should not be called directly by the user.
*
* RETURNS: N/A
*/

void sysHwInit (void)
{
    int	immrVal = vxImmrGet();

    /* set the SPLL to the value requested */

    /** PLPRCR(immrVal) = (*PLPRCR(immrVal) & ~PLPRCR_MF_MSK) | 
				(SPLL_MUL_FACTOR << PLPRCR_MF_SHIFT);*/

    /* set the BRGCLK division factor */

    /** SCCR(immrVal) = (* SCCR(immrVal) & ~SCCR_DFBRG_MSK) |
				(BRGCLK_DIV_FACTOR << SCCR_DFBRG_SHIFT);*/
    /* set the Periodic Timer A value */
     
    /** MAMR(immrVal) = 0xc0904114;*/	

    /* set the Periodic Timer PreScale */

    /** MPTPR(immrVal) = 0x0400;*/

    /* reset the port A */

    *PAPAR(immrVal) = 0x0000;
    *PADIR(immrVal) = 0x0000;
    *PAODR(immrVal) = 0x0000;

    /* reset the port B */

    *PBPAR(immrVal) = 0x0000000;
    *PBDIR(immrVal) = 0x0000000;
    *PBODR(immrVal) = 0x0000000;
    *PBDIR(immrVal) |= 0x00000020;
    *PBDAT(immrVal) |= 0x00000020;
    /*PB26----E-DSQE（取1,O）*/
    /*PB27----E-LBK（取0,O）*/

    /* reset the port C */

    *PCPAR(immrVal) = 0x0000;
    *PCDIR(immrVal) = 0x0000;
    *PCSO(immrVal)  = 0x0000;

    /* reset the port D */

    *PDPAR(immrVal) = 0x0000;
    *PDDIR(immrVal) = 0x0000;
    
    /* set port D to light LED*/
    *PDDIR(immrVal) |= 0x03fc;
    *PDDAT(immrVal)&=(~0x03fc);
    
    *SICR(immrVal) = 0x0;		/* initialize SI/NMSI connections */

    /* Initialize interrupts */

    ppc860IntrInit(IV_LEVEL4);	/* default vector level,IV_LEVEL4*/

    /* Reset serial channels */

    sysSerialHwInit();

    /* make sure Ethernet is Disabled */
    
    sysNetHwInit();
    
    /*sysNetSwitch();*/
    
    /*
     * The power management mode is initialized here. Reduced power mode
     * is activated only when the kernel is iddle (cf vxPowerDown).
     * Power management mode is selected via vxPowerModeSet().
     * DEFAULT_POWER_MGT_MODE is defined in config.h.
     */

    vxPowerModeSet (DEFAULT_POWER_MGT_MODE);
}





/*******************************************************************************
*
* sysPhysMemTop - get the address of the top of physical memory
*
* This routine returns the address of the first missing byte of memory,
* which indicates the top of memory.
*
* RETURNS: The address of the top of physical memory.
*
* SEE ALSO: sysMemTop()
*/

char * sysPhysMemTop (void)
{
    static char * physTop = NULL;

    if (physTop == NULL)
	{
	    physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);
	}

    return (physTop) ;
}





/*******************************************************************************
*
* sysMemTop - get the address of the top of VxWorks memory
*
* This routine returns a pointer to the first byte of memory not
* controlled or used by VxWorks.
*
* The user can reserve memory space by defining the macro USER_RESERVED_MEM
* in config.h.  This routine returns the address of the reserved memory
* area.  The value of USER_RESERVED_MEM is in bytes.
*
* RETURNS: The address of the top of VxWorks memory.
*/

char * sysMemTop (void)
{
    static char * memTop = NULL;

    if (memTop == NULL)
	{
	    memTop = sysPhysMemTop () - USER_RESERVED_MEM;
	}

    return memTop;
}


/******************************************************************************
*
* sysToMonitor - transfer control to the ROM monitor
*
* This routine transfers control to the ROM monitor.  Normally, it is called
* only by reboot()--which services ^X--and bus errors at interrupt level.
* However, in some circumstances, the user may wish to introduce a
* <startType> to enable special boot ROM facilities.
*
* RETURNS: Does not return.
*/

STATUS sysToMonitor
    (
     int startType	/* parameter passed to ROM to tell it how to boot */
    )
{
    FUNCPTR pRom = (FUNCPTR) (ROM_TEXT_ADRS + 4);	/* Warm reboot */

    *CIMR(vxImmrGet()) = 0;     /* disable all cpm interupts */
    
    sysCpmEnetDisable (0);	/* disable the ethernet device */
 
    #ifdef INCLUDE_MOT_FEC

    /* disable the FEC */

    sysFecEnetDisable (vxImmrGet ());

    #endif /* INCLUDE_MOT_FEC */
    sysSerialReset();		/* reset the serail device */

    (*pRom) (startType);	/* jump to bootrom entry point */

    return (OK);	/* in case we ever continue from ROM monitor */
}





/******************************************************************************
*
* sysHwInit2 - additional system configuration and initialization
*
* This routine connects system interrupts and does any additional
* configuration necessary.
*
* RETURNS: N/A
*/

void sysHwInit2 (void)
{
    static BOOL configured = FALSE;
    int		immrVal;

    if (!configured)
	{

	    immrVal = vxImmrGet();
	    
	    /* initialize network  interrrupts*/
           
            sysNetHwInit2();
            
	    /* initialize serial interrupts */
        
	    sysSerialHwInit2();
        
	    * SCCR(immrVal) &= ~SCCR_TBS;
        
	    /* un-freeze the Time Base clock */