spi驱动.txt

MPC850的SPI接口的驱动

while (pSpi->pRxBdBase->statusMode & SPI_TRANS_RX_BD_EMPTY)
{
/* Busy-wait. */
;
}

/* De-assert EEPROM chip select (CS). */
*PBDAT(pSpi->regBase) |= 0x00001;

/* Copy EEPROM data into given string. */
bcopyBytes(&eeprom_data[3], string, strLen);
return(OK);
} /* end of sysNvRamGet */


/******************************************************************************
*
* sysNvRamSet - write to non-volatile RAM
*
* This routine copies a specified string into non-volatile RAM.
*
* RETURNS: OK, or ERROR if access is outside the non-volatile RAM range.
*
* SEE ALSO: sysNvRamGet(), sysHwSpiInit()
*/

STATUS sysNvRamSet(
char* string,
int strLen,
int offset)
{
/* (Note - given offset is not used by this routine.) */

UCHAR dataChar;
USHORT int_offset = 0;
SPI_DEV* pSpi;

pSpi = &spiDev;

if (pSpi->init != TRUE)
return(ERROR);

offset += NV_BOOT_OFFSET; /* boot line begins at = 0 */

if ((offset < 0)
|| (strLen < 0)
|| ((offset + strLen) > SPI_SERIAL_EEPROM_SZ))
return (ERROR);

int_offset = offset;

while (strLen)
{
sysNvRamWriteEnable();
dataChar = (UCHAR) *string++;
sysNvRamWriteByte(dataChar, int_offset++);
strLen--;
}

return(OK);
} /* end of sysNvRamSet */


/******************************************************************************
*
* sysNvRamWriteEnable - enable writing to NVRAM
*
* This routine enables writing to NVRAM
*
* RETURNS: none
*
* NOMANUAL
*/

LOCAL void sysNvRamWriteEnable(
void)
{
SPI_DEV* pSpi;


pSpi = &spiDev;

/* Wait for EEPROM to become ready. */
while (sysNvRamGetStatus() == ERROR)
{
/* Busy-wait. */
;
}

/* Assert EEPROM chip select (CS). */
*PBDAT(pSpi->regBase) &= 0x3FFFE;

/* Wait for transmit to finish (first). */
while (pSpi->pTxBdBase->statusMode & SPI_TRANS_TX_BD_READY)
{
/* Busy-wait. */
;
}

/* Disable SPI (serial port interface). */
*MPC860_SPMODE(pSpi->regBase) = DisSPI;

/* Set up for "write enable latch (enable write operations)". */
*eep_wt_ptr = 6;

/* Set up transmit buffer descriptor. */
pSpi->pTxBdBase->dataPointer = eep_wt_ptr;
pSpi->pTxBdBase->dataLength = 1;
pSpi->pTxBdBase->statusMode = ( SPI_TRANS_TX_BD_READY |
SPI_TRANS_TX_BD_WRAP |
SPI_TRANS_TX_BD_LAST );

/* Set SPI read value. */
pSpi->pPram->mrblr = 1;

/* Set up receive buffer descriptor. */
pSpi->pRxBdBase->dataPointer = eep_wt_ptr + 16;
pSpi->pRxBdBase->statusMode = ( SPI_TRANS_RX_BD_EMPTY |
SPI_TRANS_RX_BD_WRAP );

/* Assert EEPROM chip select (CS). */
*PBDAT(pSpi->regBase) &= 0x3FFFE;

/* Enable SPI. */
*MPC860_SPMODE(pSpi->regBase) = EnSPI;

/* Start transfer. */
*MPC860_SPCOM(pSpi->regBase) = SPI_STR;

/* Wait for reading to finish. */
while (pSpi->pRxBdBase->statusMode & 0x8000)
{
/* Busy-wait. */
;
}

/* De-assert EEPROM chip select (CS). */
*PBDAT(pSpi->regBase) |= 0x00001;

return;
} /* end of sysNvRamWriteEnable */


/******************************************************************************
*
* sysNvRamWriteByte - write a byte to NVRAM
*
* This routine writes one byte to NVRAM
*
* RETURNS: none
*
* NOMANUAL
*/

LOCAL void sysNvRamWriteByte(
UCHAR data,
USHORT eep_addr)
{
SPI_DEV* pSpi;


pSpi = &spiDev;

/* Wait for EEPROM to become ready. */
while (sysNvRamGetStatus() == ERROR)
{
/* Busy-wait. */
;
}

/* Wait for transmit to finish (first). */
while (pSpi->pTxBdBase->statusMode & SPI_TRANS_TX_BD_READY)
{
/* Busy-wait. */
;
}

/* Disable SPI (serial port interface). */
*MPC860_SPMODE(pSpi->regBase) = DisSPI;


/* Set up for "write data to memory array beginning at selected addr". */
*eep_wt_ptr = 2;

/* Write the given character into the proper write buffer location. */
*(eep_wt_ptr + 3) = data;

*(USHORT*) (eep_wt_ptr + 1) = eep_addr;

/* Set up transmit buffer descriptor. */
pSpi->pTxBdBase->dataPointer = eep_wt_ptr;
pSpi->pTxBdBase->dataLength = 4;
pSpi->pTxBdBase->statusMode = ( SPI_TRANS_TX_BD_READY |
SPI_TRANS_TX_BD_WRAP |
SPI_TRANS_TX_BD_LAST );

/* Set SPI read value. */
pSpi->pPram->mrblr = 4;

/* Set up receive buffer descriptor. */
pSpi->pRxBdBase->dataPointer = eep_wt_ptr + 32;
pSpi->pRxBdBase->statusMode = ( SPI_TRANS_RX_BD_WRAP |
SPI_TRANS_RX_BD_EMPTY );
/* Assert EEPROM chip select (CS). */
*PBDAT(pSpi->regBase) &= 0x3FFFE;

/* Enable SPI. */
*MPC860_SPMODE(pSpi->regBase) = EnSPI;

/* Start transfer. */
*MPC860_SPCOM(pSpi->regBase) = SPI_STR;

/* Wait for reading to finish. */
while (pSpi->pRxBdBase->statusMode & SPI_TRANS_RX_BD_EMPTY)
{
/* Busy-wait. */
;
}

/* De-assert EEPROM chip select (CS). */
*PBDAT(pSpi->regBase) |= 0x00001;

return;
} /* end of sysNvRamWriteByte */


/******************************************************************************
*
* sysNvRamGetStatus - get the status of NVRAM
*
* This routine gets the status of the NVRAM
*
* RETURNS: OK or ERROR
*
* NOMANUAL
*/

LOCAL STATUS sysNvRamGetStatus(
void)
{
SPI_DEV* pSpi;


pSpi = &spiDev;

/* Wait for transmit to finish (first). */
while (pSpi->pTxBdBase->statusMode & SPI_TRANS_TX_BD_READY)
{
/* Busy-wait. */
;
}

/* Assert EEPROM chip select (CS). */
*PBDAT(pSpi->regBase) &= 0x3FFFE;

/* Disable SPI (serial port interface). */
*MPC860_SPMODE(pSpi->regBase) = DisSPI;

/* Set up for "read status register". */
*eep_wt_ptr = 5;

/* Set up transmit buffer descriptor. */
pSpi->pTxBdBase->dataPointer = eep_wt_ptr;
pSpi->pTxBdBase->dataLength = 2;
pSpi->pTxBdBase->statusMode = ( SPI_TRANS_TX_BD_READY |
SPI_TRANS_TX_BD_WRAP |
SPI_TRANS_TX_BD_LAST );

/* Set SPI read value. */
pSpi->pPram->mrblr = 2;

/* Set up receive buffer descriptor. */
pSpi->pRxBdBase->dataPointer = eep_wt_ptr + 16;
pSpi->pRxBdBase->statusMode = ( SPI_TRANS_RX_BD_WRAP |
SPI_TRANS_RX_BD_EMPTY );

/* Enable SPI. */
*MPC860_SPMODE(pSpi->regBase) = EnSPI;

/* Start transfer. */
*MPC860_SPCOM(pSpi->regBase) = SPI_STR;

/* Wait for reading to finish. */
while (pSpi->pRxBdBase->statusMode & SPI_TRANS_RX_BD_EMPTY)
{
;
}

/* De-assert EEPROM chip select (CS). */
*PBDAT(pSpi->regBase) |= 0x00001;

if (*(eep_wt_ptr + 17) & 1)
{
return(ERROR);
}
else
{
return(OK);
}
} /* end of sysNvRamGetStatus */



/* NV-RAM test. */
UCHAR read_from_EEPROM[(SPI_SERIAL_EEPROM_SZ + SPI_SERIAL_CMD_SEQ_SZ)];
UCHAR write_to_EEPROM[(SPI_SERIAL_EEPROM_SZ + SPI_SERIAL_CMD_SEQ_SZ)];
void nvram_test(int seed,int offset )
{
STATUS status;
int i;


printf("About to init SPI.\\n");
sysHwSpiInit();
printf("About to read contents of entire EEPROM.\\n");
status = sysNvRamGet(&read_from_EEPROM[0], SPI_SERIAL_EEPROM_SZ, 0);
printf("Status of sysNvRamGet is %d.\\n", status);
printf("Contents of EEPROM are: \\n");
for (i = 0; i < 64; i++)
{
printf("\\n%x %x %x %x",
*((UINT*) &read_from_EEPROM[i * 16]),
*((UINT*) &read_from_EEPROM[(i * 16) + 4]),
*((UINT*) &read_from_EEPROM[(i * 16) + 8]),
*((UINT*) &read_from_EEPROM[(i * 16) + 12]));
}
for (i = 0; i < SPI_SERIAL_EEPROM_SZ; i++)
{
write_to_EEPROM = (unsigned char)0;
}
printf("About to write contents of entire EEPROM.\\n");
status = sysNvRamSet(&write_to_EEPROM[0], SPI_SERIAL_EEPROM_SZ - offset,
offset);
printf("Status of sysNvRamSet is %d.\\n", status);
printf("About to read contents of entire EEPROM.\\n");
status = sysNvRamGet(&read_from_EEPROM[0], SPI_SERIAL_EEPROM_SZ, 0);

for (i = 0; i < SPI_SERIAL_EEPROM_SZ; i++)
{
if (read_from_EEPROM != write_to_EEPROM)
{
printf("\\n%d: 0x%02x != 0x%02x ", i, read_from_EEPROM,
write_to_EEPROM);
}
}
printf("\\nDONE");

return;
}


/* end of sysSpiNvRam.c */