📄 file3.lst
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1 ;--------------------------------------------------------
2 ; File Created by SDCC : FreeWare ANSI-C Compiler
3 ; Version 2.3.8 Thu Mar 17 16:18:59 2005
4
5 ;--------------------------------------------------------
6 .module file3
7 .optsdcc -mmcs51 --model-small
8
9 ;--------------------------------------------------------
10 ; Public variables in this module
11 ;--------------------------------------------------------
12 .globl _display_PARM_2
13 .globl _disbuf_u
14 .globl _main
15 .globl _delay
16 .globl _display
17 ;--------------------------------------------------------
18 ; special function registers
19 ;--------------------------------------------------------
0080 20 _P0 = 0x0080
0081 21 _SP = 0x0081
0082 22 _DPL = 0x0082
0083 23 _DPH = 0x0083
0087 24 _PCON = 0x0087
0088 25 _TCON = 0x0088
0089 26 _TMOD = 0x0089
008A 27 _TL0 = 0x008a
008B 28 _TL1 = 0x008b
008C 29 _TH0 = 0x008c
008D 30 _TH1 = 0x008d
0090 31 _P1 = 0x0090
0098 32 _SCON = 0x0098
0099 33 _SBUF = 0x0099
00A0 34 _P2 = 0x00a0
00A8 35 _IE = 0x00a8
00B0 36 _P3 = 0x00b0
00B8 37 _IP = 0x00b8
00D0 38 _PSW = 0x00d0
00E0 39 _ACC = 0x00e0
00F0 40 _B = 0x00f0
41 ;--------------------------------------------------------
42 ; special function bits
43 ;--------------------------------------------------------
0080 44 _P0_0 = 0x0080
0081 45 _P0_1 = 0x0081
0082 46 _P0_2 = 0x0082
0083 47 _P0_3 = 0x0083
0084 48 _P0_4 = 0x0084
0085 49 _P0_5 = 0x0085
0086 50 _P0_6 = 0x0086
0087 51 _P0_7 = 0x0087
0088 52 _IT0 = 0x0088
0089 53 _IE0 = 0x0089
008A 54 _IT1 = 0x008a
008B 55 _IE1 = 0x008b
008C 56 _TR0 = 0x008c
008D 57 _TF0 = 0x008d
008E 58 _TR1 = 0x008e
008F 59 _TF1 = 0x008f
0090 60 _P1_0 = 0x0090
0091 61 _P1_1 = 0x0091
0092 62 _P1_2 = 0x0092
0093 63 _P1_3 = 0x0093
0094 64 _P1_4 = 0x0094
0095 65 _P1_5 = 0x0095
0096 66 _P1_6 = 0x0096
0097 67 _P1_7 = 0x0097
0098 68 _RI = 0x0098
0099 69 _TI = 0x0099
009A 70 _RB8 = 0x009a
009B 71 _TB8 = 0x009b
009C 72 _REN = 0x009c
009D 73 _SM2 = 0x009d
009E 74 _SM1 = 0x009e
009F 75 _SM0 = 0x009f
00A0 76 _P2_0 = 0x00a0
00A1 77 _P2_1 = 0x00a1
00A2 78 _P2_2 = 0x00a2
00A3 79 _P2_3 = 0x00a3
00A4 80 _P2_4 = 0x00a4
00A5 81 _P2_5 = 0x00a5
00A6 82 _P2_6 = 0x00a6
00A7 83 _P2_7 = 0x00a7
00A8 84 _EX0 = 0x00a8
00A9 85 _ET0 = 0x00a9
00AA 86 _EX1 = 0x00aa
00AB 87 _ET1 = 0x00ab
00AC 88 _ES = 0x00ac
00AF 89 _EA = 0x00af
00B0 90 _P3_0 = 0x00b0
00B1 91 _P3_1 = 0x00b1
00B2 92 _P3_2 = 0x00b2
00B3 93 _P3_3 = 0x00b3
00B4 94 _P3_4 = 0x00b4
00B5 95 _P3_5 = 0x00b5
00B6 96 _P3_6 = 0x00b6
00B7 97 _P3_7 = 0x00b7
00B0 98 _RXD = 0x00b0
00B1 99 _TXD = 0x00b1
00B2 100 _INT0 = 0x00b2
00B3 101 _INT1 = 0x00b3
00B4 102 _T0 = 0x00b4
00B5 103 _T1 = 0x00b5
00B6 104 _WR = 0x00b6
00B7 105 _RD = 0x00b7
00B8 106 _PX0 = 0x00b8
00B9 107 _PT0 = 0x00b9
00BA 108 _PX1 = 0x00ba
00BB 109 _PT1 = 0x00bb
00BC 110 _PS = 0x00bc
00D0 111 _P = 0x00d0
00D1 112 _F1 = 0x00d1
00D2 113 _OV = 0x00d2
00D3 114 _RS0 = 0x00d3
00D4 115 _RS1 = 0x00d4
00D5 116 _F0 = 0x00d5
00D6 117 _AC = 0x00d6
00D7 118 _CY = 0x00d7
119 ;--------------------------------------------------------
120 ; overlayable register banks
121 ;--------------------------------------------------------
122 .area REG_BANK_0 (REL,OVR,DATA)
0000 123 .ds 8
124 ;--------------------------------------------------------
125 ; internal ram data
126 ;--------------------------------------------------------
127 .area DSEG (DATA)
128 ;--------------------------------------------------------
129 ; overlayable items in internal ram
130 ;--------------------------------------------------------
131 .area OSEG (OVR,DATA)
132 .area OSEG (OVR,DATA)
0000 133 _display_PARM_2::
0000 134 .ds 1
135 ;--------------------------------------------------------
136 ; Stack segment in internal ram
137 ;--------------------------------------------------------
138 .area SSEG (DATA)
0000 139 __start__stack:
0000 140 .ds 1
141
142 ;--------------------------------------------------------
143 ; indirectly addressable internal ram data
144 ;--------------------------------------------------------
145 .area ISEG (DATA)
146 ;--------------------------------------------------------
147 ; bit data
148 ;--------------------------------------------------------
149 .area BSEG (BIT)
150 ;--------------------------------------------------------
151 ; external ram data
152 ;--------------------------------------------------------
153 .area XSEG (XDATA)
154 ;--------------------------------------------------------
155 ; external initialized ram data
156 ;--------------------------------------------------------
157 .area XISEG (XDATA)
158 ;--------------------------------------------------------
159 ; interrupt vector
160 ;--------------------------------------------------------
161 .area CSEG (CODE)
0000 162 __interrupt_vect:
0000 02s00r00 163 ljmp __sdcc_gsinit_startup
0003 32 164 reti
0004 165 .ds 7
000B 32 166 reti
000C 167 .ds 7
0013 32 168 reti
0014 169 .ds 7
001B 32 170 reti
001C 171 .ds 7
0023 32 172 reti
0024 173 .ds 7
002B 32 174 reti
175 ;--------------------------------------------------------
176 ; global & static initialisations
177 ;--------------------------------------------------------
178 .area GSINIT (CODE)
179 .area GSFINAL (CODE)
180 .area GSINIT (CODE)
0000 181 __sdcc_gsinit_startup:
0000 75 81rFF 182 mov sp,#__start__stack - 1
0003 12s00r00 183 lcall __sdcc_external_startup
0006 E5 82 184 mov a,dpl
0008 60 03 185 jz __sdcc_init_data
000A 02s00r2C 186 ljmp __sdcc_program_startup
000D 187 __sdcc_init_data:
188 ; _mcs51_genXINIT() start
000D 79r00 189 mov r1,#l_XINIT
000F E9 190 mov a,r1
0010 44s00 191 orl a,#(l_XINIT >> 8)
0012 60 1B 192 jz 00003$
0014 7As00 193 mov r2,#((l_XINIT+255) >> 8)
0016 90s00r00 194 mov dptr,#s_XINIT
0019 78r00 195 mov r0,#s_XISEG
001B 75 A0s00 196 mov p2,#(s_XISEG >> 8)
001E E4 197 00001$: clr a
001F 93 198 movc a,@a+dptr
0020 F2 199 movx @r0,a
0021 A3 200 inc dptr
0022 08 201 inc r0
0023 B8 00 02 202 cjne r0,#0,00002$
0026 05 A0 203 inc p2
0028 D9 F4 204 00002$: djnz r1,00001$
002A DA F2 205 djnz r2,00001$
002C 75 A0 FF 206 mov p2,#0xFF
002F 207 00003$:
208 ; _mcs51_genXINIT() end
209 ; _mcs51_genRAMCLEAR() start
002F 78r00 210 mov r0,#l_XSEG
0031 E8 211 mov a,r0
0032 44s00 212 orl a,#(l_XSEG >> 8)
0034 60 0C 213 jz 00005$
0036 79s00 214 mov r1,#((l_XSEG + 255) >> 8)
0038 90s00r00 215 mov dptr,#s_XSEG
003B E4 216 clr a
003C F0 217 00004$: movx @dptr,a
003D A3 218 inc dptr
003E D8 FC 219 djnz r0,00004$
0040 D9 FA 220 djnz r1,00004$
0042 F6 221 00005$: mov @r0,a
0043 D8 FD 222 djnz r0,00005$
223 ; _mcs51_genRAMCLEAR() end
224 .area GSFINAL (CODE)
0000 02s00r2C 225 ljmp __sdcc_program_startup
226 ;--------------------------------------------------------
227 ; Home
228 ;--------------------------------------------------------
229 .area HOME (CODE)
230 .area CSEG (CODE)
231 ;--------------------------------------------------------
232 ; code
233 ;--------------------------------------------------------
234 .area CSEG (CODE)
002C 235 __sdcc_program_startup:
002C 12s00r31 236 lcall _main
237 ; return from main will lock up
002F 80 FE 238 sjmp .
239 ;------------------------------------------------------------
240 ;Allocation info for local variables in function 'main'
241 ;------------------------------------------------------------
242 ;k Allocated to registers
243 ;------------------------------------------------------------
244 ;c:/hj51avr/code/c/file3.c:21: void main()
245 ; -----------------------------------------
246 ; function main
247 ; -----------------------------------------
0031 248 _main:
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