📄 ispvar.h
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fabric_dev : 1, loggedin : 1, roles : 2, valid : 1; u_int32_t portid; u_int64_t node_wwn; u_int64_t port_wwn; } portdb[MAX_FC_TARG], tport[FC_PORT_ID]; /* * Scratch DMA mapped in area to fetch Port Database stuff, etc. */ caddr_t isp_scratch; ISP_DMA_ADDR_T isp_scdma;#ifdef ISP_FW_CRASH_DUMP u_int16_t *isp_dump_data;#endif} fcparam;#define FW_CONFIG_WAIT 0#define FW_WAIT_AL_PA 1#define FW_WAIT_LOGIN 2#define FW_READY 3#define FW_LOSS_OF_SYNC 4#define FW_ERROR 5#define FW_REINIT 6#define FW_NON_PART 7#define LOOP_NIL 0#define LOOP_LIP_RCVD 1#define LOOP_PDB_RCVD 2#define LOOP_SCANNING_FABRIC 3#define LOOP_FSCAN_DONE 4#define LOOP_SCANNING_LOOP 5#define LOOP_LSCAN_DONE 6#define LOOP_SYNCING_PDB 7#define LOOP_READY 8#define TOPO_NL_PORT 0#define TOPO_FL_PORT 1#define TOPO_N_PORT 2#define TOPO_F_PORT 3#define TOPO_PTP_STUB 4/* * Soft Structure per host adapter */typedef struct ispsoftc { /* * Platform (OS) specific data */ struct isposinfo isp_osinfo; /* * Pointer to bus specific functions and data */ struct ispmdvec * isp_mdvec; /* * (Mostly) nonvolatile state. Board specific parameters * may contain some volatile state (e.g., current loop state). */ void * isp_param; /* type specific */ u_int16_t isp_fwrev[3]; /* Loaded F/W revision */ u_int16_t isp_romfw_rev[3]; /* PROM F/W revision */ u_int16_t isp_maxcmds; /* max possible I/O cmds */ u_int8_t isp_type; /* HBA Chip Type */ u_int8_t isp_revision; /* HBA Chip H/W Revision */ u_int32_t isp_maxluns; /* maximum luns supported */ u_int32_t isp_clock : 8, /* input clock */ : 4, isp_port : 1, /* 23XX only */ isp_failed : 1, /* board failed */ isp_open : 1, /* opened (ioctl) */ isp_touched : 1, /* board ever seen? */ isp_bustype : 1, /* SBus or PCI */ isp_loaded_fw : 1, /* loaded firmware */ isp_role : 2, /* roles supported */ isp_dblev : 12; /* debug log mask */ u_int32_t isp_confopts; /* config options */ u_int16_t isp_rqstinrp; /* register for REQINP */ u_int16_t isp_rqstoutrp; /* register for REQOUTP */ u_int16_t isp_respinrp; /* register for RESINP */ u_int16_t isp_respoutrp; /* register for RESOUTP */ /* * Instrumentation */ u_int64_t isp_intcnt; /* total int count */ u_int64_t isp_intbogus; /* spurious int count */ u_int64_t isp_intmboxc; /* mbox completions */ u_int64_t isp_intoasync; /* other async */ u_int64_t isp_rsltccmplt; /* CMDs on result q */ u_int64_t isp_fphccmplt; /* CMDs via fastpost */ u_int16_t isp_rscchiwater; u_int16_t isp_fpcchiwater; /* * Volatile state */ volatile u_int32_t isp_obits : 8, /* mailbox command output */ isp_mboxbsy : 1, /* mailbox command active */ isp_state : 3, isp_sendmarker : 2, /* send a marker entry */ isp_update : 2, /* update parameters */ isp_nactive : 16; /* how many commands active */ volatile u_int16_t isp_reqodx; /* index of last ISP pickup */ volatile u_int16_t isp_reqidx; /* index of next request */ volatile u_int16_t isp_residx; /* index of next result */ volatile u_int16_t isp_resodx; /* index of next result */ volatile u_int16_t isp_rspbsy; volatile u_int16_t isp_lasthdls; /* last handle seed */ volatile u_int16_t isp_mboxtmp[MAX_MAILBOX]; volatile u_int16_t isp_lastmbxcmd; /* last mbox command sent */ volatile u_int16_t isp_mbxwrk0; volatile u_int16_t isp_mbxwrk1; volatile u_int16_t isp_mbxwrk2; void * isp_mbxworkp; /* * Active commands are stored here, indexed by handle functions. */ XS_T **isp_xflist; /* * request/result queue pointers and dma handles for them. */ caddr_t isp_rquest; caddr_t isp_result; ISP_DMA_ADDR_T isp_rquest_dma; ISP_DMA_ADDR_T isp_result_dma;} ispsoftc_t;#define SDPARAM(isp) ((sdparam *) (isp)->isp_param)#define FCPARAM(isp) ((fcparam *) (isp)->isp_param)/* * ISP Driver Run States */#define ISP_NILSTATE 0#define ISP_RESETSTATE 1#define ISP_INITSTATE 2#define ISP_RUNSTATE 3/* * ISP Configuration Options */#define ISP_CFG_NORELOAD 0x80 /* don't download f/w */#define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */#define ISP_CFG_TWOGB 0x20 /* force 2GB connection (23XX only) */#define ISP_CFG_ONEGB 0x10 /* force 1GB connection (23XX only) */#define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */#define ISP_CFG_PORT_PREF 0x0C /* Mask for Port Prefs (2200 only) */#define ISP_CFG_LPORT 0x00 /* prefer {N/F}L-Port connection */#define ISP_CFG_NPORT 0x04 /* prefer {N/F}-Port connection */#define ISP_CFG_NPORT_ONLY 0x08 /* insist on {N/F}-Port connection */#define ISP_CFG_LPORT_ONLY 0x0C /* insist on {N/F}L-Port connection */#define ISP_CFG_OWNWWPN 0x100 /* override NVRAM wwpn */#define ISP_CFG_OWNWWNN 0x200 /* override NVRAM wwnn *//* * Prior to calling isp_reset for the first time, the outer layer * should set isp_role to one of NONE, INITIATOR, TARGET, BOTH. * * If you set ISP_ROLE_NONE, the cards will be reset, new firmware loaded, * NVRAM read, and defaults set, but any further initialization (e.g. * INITIALIZE CONTROL BLOCK commands for 2X00 cards) won't be done. * * If INITIATOR MODE isn't set, attempts to run commands will be stopped * at isp_start and completed with the moral equivalent of SELECTION TIMEOUT. * * If TARGET MODE is set, it doesn't mean that the rest of target mode support * needs to be enabled, or will even work. What happens with the 2X00 cards * here is that if you have enabled it with TARGET MODE as part of the ICB * options, but you haven't given the f/w any ram resources for ATIOs or * Immediate Notifies, the f/w just handles what it can and you never see * anything. Basically, it sends a single byte of data (the first byte, * which you can set as part of the INITIALIZE CONTROL BLOCK command) for * INQUIRY, and sends back QUEUE FULL status for any other command. * */#define ISP_ROLE_NONE 0x0#define ISP_ROLE_INITIATOR 0x1#define ISP_ROLE_TARGET 0x2#define ISP_ROLE_BOTH (ISP_ROLE_TARGET|ISP_ROLE_INITIATOR)#define ISP_ROLE_EITHER ISP_ROLE_BOTH#ifndef ISP_DEFAULT_ROLES#define ISP_DEFAULT_ROLES ISP_ROLE_INITIATOR#endif/* * Firmware related defines */#define ISP_CODE_ORG 0x1000 /* default f/w code start */#define ISP_CODE_ORG_2300 0x0800 /* ..except for 2300s */#define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic)#define ISP_FW_MAJOR(code) ((code >> 24) & 0xff)#define ISP_FW_MINOR(code) ((code >> 16) & 0xff)#define ISP_FW_MICRO(code) ((code >> 8) & 0xff)#define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2])#define ISP_FW_MAJORX(xp) (xp[0])#define ISP_FW_MINORX(xp) (xp[1])#define ISP_FW_MICROX(xp) (xp[2])/* * Bus (implementation) types */#define ISP_BT_PCI 0 /* PCI Implementations */#define ISP_BT_SBUS 1 /* SBus Implementations *//* * If we have not otherwise defined SBus support away make sure * it is defined here such that the code is included as default */#ifndef ISP_SBUS_SUPPORTED#define ISP_SBUS_SUPPORTED 1#endif/* * Chip Types */#define ISP_HA_SCSI 0xf#define ISP_HA_SCSI_UNKNOWN 0x1#define ISP_HA_SCSI_1020 0x2#define ISP_HA_SCSI_1020A 0x3#define ISP_HA_SCSI_1040 0x4#define ISP_HA_SCSI_1040A 0x5#define ISP_HA_SCSI_1040B 0x6#define ISP_HA_SCSI_1040C 0x7#define ISP_HA_SCSI_1240 0x8#define ISP_HA_SCSI_1080 0x9#define ISP_HA_SCSI_1280 0xa#define ISP_HA_SCSI_12160 0xb#define ISP_HA_FC 0xf0#define ISP_HA_FC_2100 0x10#define ISP_HA_FC_2200 0x20#define ISP_HA_FC_2300 0x30#define ISP_HA_FC_2312 0x40#define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI)#define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240)#define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080)#define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280)#define IS_12160(isp) (isp->isp_type == ISP_HA_SCSI_12160)#define IS_12X0(isp) (IS_1240(isp) || IS_1280(isp))#define IS_DUALBUS(isp) (IS_12X0(isp) || IS_12160(isp))#define IS_ULTRA2(isp) (IS_1080(isp) || IS_1280(isp) || IS_12160(isp))#define IS_ULTRA3(isp) (IS_12160(isp))#define IS_FC(isp) ((isp)->isp_type & ISP_HA_FC)#define IS_2100(isp) ((isp)->isp_type == ISP_HA_FC_2100)#define IS_2200(isp) ((isp)->isp_type == ISP_HA_FC_2200)#define IS_23XX(isp) ((isp)->isp_type >= ISP_HA_FC_2300)#define IS_2300(isp) ((isp)->isp_type == ISP_HA_FC_2300)#define IS_2312(isp) ((isp)->isp_type == ISP_HA_FC_2312)/* * DMA cookie macros */#define DMA_WD3(x) 0#define DMA_WD2(x) 0#define DMA_WD1(x) (((x) >> 16) & 0xffff)#define DMA_WD0(x) (((x) & 0xffff))/* * Core System Function Prototypes *//* * Reset Hardware. Totally. Assumes that you'll follow this with * a call to isp_init. */void isp_reset(struct ispsoftc *);/* * Initialize Hardware to known state */void isp_init(struct ispsoftc *);/* * Reset the ISP and call completion for any orphaned commands. */void isp_reinit(struct ispsoftc *);#ifdef ISP_FW_CRASH_DUMP/* * Dump firmware entry point.
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