📄 mpi_cnfg.h
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U16 IOCStatus; /* 0Eh */ U32 IOCLogInfo; /* 10h */ fCONFIG_PAGE_HEADER Header; /* 14h */} MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY, ConfigReply_t, MPI_POINTER pConfigReply_t;/******************************************************************************* C o n f i g u r a t i o n P a g e s******************************************************************************//***************************************************************************** Manufacturing Config pages****************************************************************************/#define MPI_MANUFACTPAGE_DEVICEID_FC909 (0x0621)#define MPI_MANUFACTPAGE_DEVICEID_FC919 (0x0624)#define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622)#define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628)#define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626)#define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030)#define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031)#define MPI_MANUFACTPAGE_DEVID_1030_53C1035 (0x0032)#define MPI_MANUFACTPAGE_DEVID_1030ZC_53C1035 (0x0033)#define MPI_MANUFACTPAGE_DEVID_53C1035 (0x0040)#define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041)#define MPI_MANUFACTPAGE_DEVID_SA2010 (0x0804)#define MPI_MANUFACTPAGE_DEVID_SA2010ZC (0x0805)#define MPI_MANUFACTPAGE_DEVID_SA2020 (0x0806)#define MPI_MANUFACTPAGE_DEVID_SA2020ZC (0x0807)typedef struct _CONFIG_PAGE_MANUFACTURING_0{ fCONFIG_PAGE_HEADER Header; /* 00h */ U8 ChipName[16]; /* 04h */ U8 ChipRevision[8]; /* 14h */ U8 BoardName[16]; /* 1Ch */ U8 BoardAssembly[16]; /* 2Ch */ U8 BoardTracerNumber[16]; /* 3Ch */} fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0, ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t;#define MPI_MANUFACTURING0_PAGEVERSION (0x00)typedef struct _CONFIG_PAGE_MANUFACTURING_1{ fCONFIG_PAGE_HEADER Header; /* 00h */ U8 VPD[256]; /* 04h */} fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1, ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t;#define MPI_MANUFACTURING1_PAGEVERSION (0x00)typedef struct _MPI_CHIP_REVISION_ID{ U16 DeviceID; /* 00h */ U8 PCIRevisionID; /* 02h */ U8 Reserved; /* 03h */} MPI_CHIP_REVISION_ID, MPI_POINTER PTR_MPI_CHIP_REVISION_ID, MpiChipRevisionId_t, MPI_POINTER pMpiChipRevisionId_t;/* * Host code (drivers, BIOS, utilities, etc.) should leave this define set to * one and check Header.PageLength at runtime. */#ifndef MPI_MAN_PAGE_2_HW_SETTINGS_WORDS#define MPI_MAN_PAGE_2_HW_SETTINGS_WORDS (1)#endiftypedef struct _CONFIG_PAGE_MANUFACTURING_2{ fCONFIG_PAGE_HEADER Header; /* 00h */ MPI_CHIP_REVISION_ID ChipId; /* 04h */ U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */} fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2, ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;#define MPI_MANUFACTURING2_PAGEVERSION (0x00)/* * Host code (drivers, BIOS, utilities, etc.) should leave this define set to * one and check Header.PageLength at runtime. */#ifndef MPI_MAN_PAGE_3_INFO_WORDS#define MPI_MAN_PAGE_3_INFO_WORDS (1)#endiftypedef struct _CONFIG_PAGE_MANUFACTURING_3{ fCONFIG_PAGE_HEADER Header; /* 00h */ MPI_CHIP_REVISION_ID ChipId; /* 04h */ U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */} fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3, ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;#define MPI_MANUFACTURING3_PAGEVERSION (0x00)typedef struct _CONFIG_PAGE_MANUFACTURING_4{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 Reserved1; /* 04h */ U8 InfoOffset0; /* 08h */ U8 InfoSize0; /* 09h */ U8 InfoOffset1; /* 0Ah */ U8 InfoSize1; /* 0Bh */ U8 InquirySize; /* 0Ch */ U8 Reserved2; /* 0Dh */ U16 Reserved3; /* 0Eh */ U8 InquiryData[56]; /* 10h */ U32 ISVolumeSettings; /* 48h */ U32 IMEVolumeSettings; /* 4Ch */ U32 IMVolumeSettings; /* 50h */} fCONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4, ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t;#define MPI_MANUFACTURING4_PAGEVERSION (0x00)/***************************************************************************** IO Unit Config Pages****************************************************************************/typedef struct _CONFIG_PAGE_IO_UNIT_0{ fCONFIG_PAGE_HEADER Header; /* 00h */ U64 UniqueValue; /* 04h */} fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0, IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;#define MPI_IOUNITPAGE0_PAGEVERSION (0x00)typedef struct _CONFIG_PAGE_IO_UNIT_1{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 Flags; /* 04h */} fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1, IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;#define MPI_IOUNITPAGE1_PAGEVERSION (0x00)/* IO Unit Page 1 Flags defines */#define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000)#define MPI_IOUNITPAGE1_SINGLE_FUNCTION (0x00000001)#define MPI_IOUNITPAGE1_MULTI_PATHING (0x00000002)#define MPI_IOUNITPAGE1_SINGLE_PATHING (0x00000000)#define MPI_IOUNITPAGE1_DISABLE_IR (0x00000040)#define MPI_IOUNITPAGE1_FORCE_32 (0x00000080)typedef struct _MPI_ADAPTER_INFO{ U8 PciBusNumber; /* 00h */ U8 PciDeviceAndFunctionNumber; /* 01h */ U16 AdapterFlags; /* 02h */} MPI_ADAPTER_INFO, MPI_POINTER PTR_MPI_ADAPTER_INFO, MpiAdapterInfo_t, MPI_POINTER pMpiAdapterInfo_t;#define MPI_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001)#define MPI_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002)typedef struct _CONFIG_PAGE_IO_UNIT_2{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 Flags; /* 04h */ U32 BiosVersion; /* 08h */ MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */} fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2, IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;#define MPI_IOUNITPAGE2_PAGEVERSION (0x00)#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002)#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004)#define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE (0x00000008)#define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40 (0x00000010)/* * Host code (drivers, BIOS, utilities, etc.) should leave this define set to * one and check Header.PageLength at runtime. */#ifndef MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX#define MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1)#endiftypedef struct _CONFIG_PAGE_IO_UNIT_3{ fCONFIG_PAGE_HEADER Header; /* 00h */ U8 GPIOCount; /* 04h */ U8 Reserved1; /* 05h */ U16 Reserved2; /* 06h */ U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */} fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3, IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;#define MPI_IOUNITPAGE3_PAGEVERSION (0x01)#define MPI_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFC)#define MPI_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2)#define MPI_IOUNITPAGE3_GPIO_SETTING_OFF (0x00)#define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01)/***************************************************************************** IOC Config Pages****************************************************************************/typedef struct _CONFIG_PAGE_IOC_0{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 TotalNVStore; /* 04h */ U32 FreeNVStore; /* 08h */ U16 VendorID; /* 0Ch */ U16 DeviceID; /* 0Eh */ U8 RevisionID; /* 10h */ U8 Reserved[3]; /* 11h */ U32 ClassCode; /* 14h */ U16 SubsystemVendorID; /* 18h */ U16 SubsystemID; /* 1Ah */} fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0, IOCPage0_t, MPI_POINTER pIOCPage0_t;#define MPI_IOCPAGE0_PAGEVERSION (0x01)typedef struct _CONFIG_PAGE_IOC_1{ fCONFIG_PAGE_HEADER Header; /* 00h */ U32 Flags; /* 04h */ U32 CoalescingTimeout; /* 08h */ U8 CoalescingDepth; /* 0Ch */ U8 PCISlotNum; /* 0Dh */ U8 Reserved[2]; /* 0Eh */} fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1, IOCPage1_t, MPI_POINTER pIOCPage1_t;#define MPI_IOCPAGE1_PAGEVERSION (0x01)#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001)#define MPI_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF)typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL{ U8 VolumeID; /* 00h */ U8 VolumeBus; /* 01h */ U8 VolumeIOC; /* 02h */ U8 VolumePageNumber; /* 03h */ U8 VolumeType; /* 04h */ U8 Flags; /* 05h */ U16 Reserved3; /* 06h */} fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,⌨️ 快捷键说明
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