📄 traps.c
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#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \asmlinkage void do_##name(struct pt_regs * regs, long error_code) \{ \ siginfo_t info; \ info.si_signo = signr; \ info.si_errno = 0; \ info.si_code = sicode; \ info.si_addr = (void *)siaddr; \ do_trap(trapnr, signr, str, regs, error_code, &info); \}DO_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->rip)DO_ERROR( 4, SIGSEGV, "overflow", overflow)DO_ERROR( 5, SIGSEGV, "bounds", bounds)DO_ERROR_INFO( 6, SIGILL, "invalid operand", invalid_op, ILL_ILLOPN, regs->rip)DO_ERROR( 7, SIGSEGV, "device not available", device_not_available)DO_ERROR( 8, SIGSEGV, "double fault", double_fault)DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)DO_ERROR(12, SIGBUS, "stack segment", stack_segment)DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, get_cr2())DO_ERROR(18, SIGSEGV, "reserved", reserved)asmlinkage void do_int3(struct pt_regs * regs, long error_code){ if (notify_die(DIE_INT3, "int3", regs, error_code) == NOTIFY_BAD) return; do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);}extern void dump_pagetable(unsigned long);asmlinkage void do_general_protection(struct pt_regs * regs, long error_code){#ifdef CONFIG_CHECKING { unsigned long gs; struct x8664_pda *pda = cpu_pda + stack_smp_processor_id(); rdmsrl(MSR_GS_BASE, gs); if (gs != (unsigned long)pda) { wrmsrl(MSR_GS_BASE, pda); printk("general protection handler: wrong gs %lx expected %p\n", gs, pda); } }#endif if (regs->cs & 3) { current->thread.error_code = error_code; current->thread.trap_no = 13; if (exception_trace) printk("%s[%d] general protection rip:%lx rsp:%lx error:%lx\n", current->comm, current->pid, regs->rip,regs->rsp,error_code); force_sig(SIGSEGV, current); return; } /* kernel gp */ { unsigned long fixup; fixup = search_exception_table(regs->rip); if (fixup) { extern int exception_trace; if (exception_trace) printk(KERN_ERR "%s: fixed kernel gp exception at %lx err:%ld\n", current->comm, regs->rip, error_code); regs->rip = fixup; return; } die("general protection fault", regs, error_code); }}static void mem_parity_error(unsigned char reason, struct pt_regs * regs){ printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n"); printk("You probably have a hardware problem with your RAM chips\n"); /* Clear and disable the memory parity error line. */ reason = (reason & 0xf) | 4; outb(reason, 0x61);}static void io_check_error(unsigned char reason, struct pt_regs * regs){ printk("NMI: IOCK error (debug interrupt?)\n"); show_registers(regs); /* Re-enable the IOCK line, wait for a few seconds */ reason = (reason & 0xf) | 8; outb(reason, 0x61); mdelay(2000); reason &= ~8; outb(reason, 0x61);}static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs){ printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n", reason, smp_processor_id()); printk("Dazed and confused, but trying to continue\n"); printk("Do you have a strange power saving mode enabled?\n");}static void default_do_nmi(struct pt_regs * regs){ unsigned char reason = inb(0x61); if (!(reason & 0xc0)) {#if CONFIG_X86_LOCAL_APIC /* * Ok, so this is none of the documented NMI sources, * so it must be the NMI watchdog. */ if (nmi_watchdog) { nmi_watchdog_tick(regs); return; }#endif if (notify_die(DIE_NMI, "nmi", regs, reason) == NOTIFY_BAD) return; unknown_nmi_error(reason, regs); return; } if (notify_die(DIE_NMI, "nmi", regs, reason) == NOTIFY_BAD) return; if (reason & 0x80) mem_parity_error(reason, regs); if (reason & 0x40) io_check_error(reason, regs); /* * Reassert NMI in case it became active meanwhile * as it's edge-triggered. */ outb(0x8f, 0x70); inb(0x71); /* dummy */ outb(0x0f, 0x70); inb(0x71); /* dummy */}static int dummy_nmi_callback(struct pt_regs * regs, int cpu){ return 0;} static nmi_callback_t nmi_callback = dummy_nmi_callback; asmlinkage void do_nmi(struct pt_regs * regs, long error_code){ int cpu = smp_processor_id(); ++nmi_count(cpu); if (!nmi_callback(regs, cpu)) default_do_nmi(regs);}void set_nmi_callback(nmi_callback_t callback){ nmi_callback = callback;}void unset_nmi_callback(void){ nmi_callback = dummy_nmi_callback;}asmlinkage void do_debug(struct pt_regs * regs, long error_code){ unsigned long condition; struct task_struct *tsk = current; siginfo_t info;#ifdef CONFIG_CHECKING { unsigned long gs; struct x8664_pda *pda = cpu_pda + stack_smp_processor_id(); rdmsrl(MSR_GS_BASE, gs); if (gs != (unsigned long)pda) { wrmsrl(MSR_GS_BASE, pda); printk("debug handler: wrong gs %lx expected %p\n", gs, pda); } }#endif asm("movq %%db6,%0" : "=r" (condition)); if (notify_die(DIE_DEBUG, "debug", regs, error_code) == NOTIFY_BAD) return; /* Mask out spurious debug traps due to lazy DR7 setting */ if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) { if (!tsk->thread.debugreg[7]) { goto clear_dr7; } } tsk->thread.debugreg[6] = condition; /* Mask out spurious TF errors due to lazy TF clearing */ if (condition & DR_STEP) { /* * The TF error should be masked out only if the current * process is not traced and if the TRAP flag has been set * previously by a tracing process (condition detected by * the PT_DTRACE flag); remember that the i386 TRAP flag * can be modified by the process itself in user mode, * allowing programs to debug themselves without the ptrace() * interface. */ if ((regs->cs & 3) == 0) goto clear_TF; if ((tsk->ptrace & (PT_DTRACE|PT_PTRACED)) == PT_DTRACE) goto clear_TF; } /* Ok, finally something we can handle */ tsk->thread.trap_no = 1; tsk->thread.error_code = error_code; info.si_signo = SIGTRAP; info.si_errno = 0; info.si_code = TRAP_BRKPT; info.si_addr = ((regs->cs & 3) == 0) ? (void *)tsk->thread.rip : (void *)regs->rip; force_sig_info(SIGTRAP, &info, tsk); clear_dr7: asm("movq %0,%%db7"::"r"(0UL)); return;clear_TF: regs->eflags &= ~TF_MASK; return;}/* * Note that we play around with the 'TS' bit in an attempt to get * the correct behaviour even in the presence of the asynchronous * IRQ13 behaviour */void math_error(void *rip){ struct task_struct * task; siginfo_t info; unsigned short cwd, swd; /* * Save the info for the exception handler and clear the error. */ task = current; save_init_fpu(task); task->thread.trap_no = 16; task->thread.error_code = 0; info.si_signo = SIGFPE; info.si_errno = 0; info.si_code = __SI_FAULT; info.si_addr = rip; /* * (~cwd & swd) will mask out exceptions that are not set to unmasked * status. 0x3f is the exception bits in these regs, 0x200 is the * C1 reg you need in case of a stack fault, 0x040 is the stack * fault bit. We should only be taking one exception at a time, * so if this combination doesn't produce any single exception, * then we have a bad program that isn't syncronizing its FPU usage * and it will suffer the consequences since we won't be able to * fully reproduce the context of the exception */ cwd = get_fpu_cwd(task); swd = get_fpu_swd(task); switch (((~cwd) & swd & 0x3f) | (swd & 0x240)) { case 0x000: default: break; case 0x001: /* Invalid Op */ case 0x041: /* Stack Fault */ case 0x241: /* Stack Fault | Direction */ info.si_code = FPE_FLTINV; break; case 0x002: /* Denormalize */ case 0x010: /* Underflow */ info.si_code = FPE_FLTUND; break; case 0x004: /* Zero Divide */ info.si_code = FPE_FLTDIV; break; case 0x008: /* Overflow */ info.si_code = FPE_FLTOVF; break; case 0x020: /* Precision */ info.si_code = FPE_FLTRES; break; } force_sig_info(SIGFPE, &info, task);}asmlinkage void do_coprocessor_error(struct pt_regs * regs, long error_code){ math_error((void *)regs->rip);}asmlinkage void bad_intr(void){ printk("bad interrupt"); }static inline void simd_math_error(void *rip){ struct task_struct * task; siginfo_t info; unsigned short mxcsr; /* * Save the info for the exception handler and clear the error. */ task = current; save_init_fpu(task); task->thread.trap_no = 19; task->thread.error_code = 0; info.si_signo = SIGFPE; info.si_errno = 0; info.si_code = __SI_FAULT; info.si_addr = rip; /* * The SIMD FPU exceptions are handled a little differently, as there * is only a single status/control register. Thus, to determine which * unmasked exception was caught we must mask the exception mask bits * at 0x1f80, and then use these to mask the exception bits at 0x3f. */ mxcsr = get_fpu_mxcsr(task); switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) { case 0x000: default: break; case 0x001: /* Invalid Op */ info.si_code = FPE_FLTINV; break; case 0x002: /* Denormalize */ case 0x010: /* Underflow */ info.si_code = FPE_FLTUND; break; case 0x004: /* Zero Divide */ info.si_code = FPE_FLTDIV; break; case 0x008: /* Overflow */ info.si_code = FPE_FLTOVF; break; case 0x020: /* Precision */ info.si_code = FPE_FLTRES; break; } force_sig_info(SIGFPE, &info, task);}asmlinkage void do_simd_coprocessor_error(struct pt_regs * regs, long error_code){ simd_math_error((void *)regs->rip);}asmlinkage void do_spurious_interrupt_bug(struct pt_regs * regs){}/* * 'math_state_restore()' saves the current math information in the * old math state array, and gets the new ones from the current task * * Careful.. There are problems with IBM-designed IRQ13 behaviour. * Don't touch unless you *really* know how it works. */asmlinkage void math_state_restore(void){ struct task_struct *me = current; clts(); /* Allow maths ops (or we recurse) */ if (!me->used_math) init_fpu(); restore_fpu_checking(&me->thread.i387.fxsave); me->flags |= PF_USEDFPU; /* So we fxsave on switch_to() */}asmlinkage void math_emulate(void){ BUG();}void do_call_debug(struct pt_regs *regs) { notify_die(DIE_CALL, "debug call", regs, 0); } #ifndef CONFIG_MCEvoid do_machine_check(struct pt_regs *regs){ printk("Machine check ignored\n");} #endifvoid __init trap_init(void){ set_intr_gate(0,÷_error); set_intr_gate(1,&debug); set_intr_gate_ist(2,&nmi,NMI_STACK); set_system_gate(3,&int3); /* int3-5 can be called from all */ set_system_gate(4,&overflow); set_system_gate(5,&bounds); set_intr_gate(6,&invalid_op); set_intr_gate(7,&device_not_available); set_intr_gate_ist(8,&double_fault, DOUBLEFAULT_STACK); set_intr_gate(9,&coprocessor_segment_overrun); set_intr_gate(10,&invalid_TSS); set_intr_gate(11,&segment_not_present); set_intr_gate_ist(12,&stack_segment,STACKFAULT_STACK); set_intr_gate(13,&general_protection); set_intr_gate(14,&page_fault); set_intr_gate(15,&spurious_interrupt_bug); set_intr_gate(16,&coprocessor_error); set_intr_gate(17,&alignment_check); set_intr_gate(18,&machine_check); set_intr_gate(19,&simd_coprocessor_error);#ifdef CONFIG_IA32_EMULATION set_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);#endif set_intr_gate(KDB_VECTOR, call_debug); notify_die(DIE_TRAPINIT, "traps initialized", 0, 0); /* * Should be a barrier for any external CPU state. */ cpu_init();}
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