ide.c

这个linux源代码是很全面的~基本完整了~使用c编译的~由于时间问题我没有亲自测试~但就算用来做参考资料也是非常好的

/* $Id: ide.c,v 1.26 2002/09/17 12:16:59 bjornw Exp $
 *
 * Etrax specific IDE functions, like init and PIO-mode setting etc.
 * Almost the entire ide.c is used for the rest of the Etrax ATA driver.
 * Copyright (c) 2000, 2001, 2002 Axis Communications AB 
 *
 * Authors:    Bjorn Wesen        (initial version)
 *             Mikael Starvik     (pio setup stuff)
 *
 * $Log: ide.c,v $
 * Revision 1.26  2002/09/17 12:16:59  bjornw
 * Removed unnecessary cli/sti pair
 *
 * Revision 1.25  2002/08/19 08:07:19  matsfg
 * Added IN_WORD.
 *
 * Revision 1.24  2002/04/22 11:47:21  johana
 * Fix according to 2.4.19-pre7. time_after/time_before and
 * missing end of comment.
 * The patch has a typo for ethernet.c in e100_clear_network_leds(),
 *  that is fixed here.
 *
 * Revision 1.23  2002/03/19 15:35:51  bjornw
 * Cleaned up the bus-reset code a bit and made G27-reset work
 *
 * Revision 1.22  2002/03/19 15:23:05  bjornw
 * Added flush_etrax_cache before starting the receiving DMA
 *
 * Revision 1.21  2002/03/06 15:37:56  hp
 * 	* ide.c (OUT_BYTE): If timing out in the first busy-loop, do a
 * 	printk, fall through and still do the write.
 * 	(IN_BYTE): If timing out in the first loop, and reg indicated it's
 * 	the ATA status register in the device being read, return BUSY_STAT.
 *
 * Revision 1.20  2002/02/22 11:47:56  bjornw
 * Added a timeout to IN_BYTE and OUT_BYTE
 *
 * Revision 1.19  2001/05/09 12:53:16  johana
 * Added #include <asm/dma.h>
 *
 * Revision 1.18  2001/05/09 12:37:00  johana
 * Use DMA_NBR macros from dma.h.
 *
 * Revision 1.17  2001/04/23 13:36:30  matsfg
 * Changed CONFIG_IDE_DELAY to CONFIG_ETRAX_IDE_DELAY
 *
 * Revision 1.16  2001/04/05 08:30:07  matsfg
 * Corrected cse1 and csp0 reset.
 *
 * Revision 1.15  2001/04/04 14:34:06  bjornw
 * Re-instated code that mysteriously disappeared during review updates.
 *
 * Revision 1.14  2001/04/04 13:45:12  matsfg
 * Calls REG_SHADOW_SET for cse1 reset so only the resetbit is affected
 *
 * Revision 1.13  2001/04/04 13:26:40  matsfg
 * memmapping is done in init.c
 *
 * Revision 1.12  2001/04/04 11:37:56  markusl
 * Updated according to review remarks
 *
 * Revision 1.11  2001/03/29 12:49:14  matsfg
 * Changed check for ata_tot_size from >= to >.
 * Sets sw_len to 0 if size is exactly 65536.
 *
 * Revision 1.10  2001/03/16 09:39:30  matsfg
 * Support for reset on port CSP0
 *
 * Revision 1.9  2001/03/01 13:11:18  bjornw
 * 100 -> HZ
 *
 * Revision 1.8  2001/03/01 09:32:56  matsfg
 * Moved IDE delay to a CONFIG-parameter instead
 *
 * Revision 1.7  2001/02/23 13:46:38  bjornw
 * Spellling check
 *
 * Revision 1.6  2001/02/22 15:44:30  bjornw
 * * Use ioremap when mapping the CSE1 memory-mapped reset-line for LX v2
 * * sw_len for a 65536 descriptor is 0, not 65536
 * * Express concern for G27 reset code
 *
 * Revision 1.5  2001/02/16 07:35:38  matsfg
 * Now handles DMA request blocks between 64k and 128k by split into two descriptors.
 *
 * Revision 1.4  2001/01/10 21:14:32  bjornw
 * Initialize hwif->ideproc, for the new way of handling ide_xxx_data
 *
 * Revision 1.3  2000/12/01 17:48:18  bjornw
 * - atapi_output_bytes now uses DMA
 * - dma_active check removed - the kernel does proper serializing and it had
 *   a race-condition anyway
 * - ide_build_dmatable had a nameclash
 * - re-added the RESET_DMA thingys because sometimes the interface can get
 *   stuck apparently
 * - added ide_release_dma
 *
 * Revision 1.2  2000/11/29 17:31:29  bjornw
 * 2.4 port
 *
 * - The "register addresses" stored in the hwif are now 32-bit fields that
 *   don't need to be shifted into correct positions in R_ATA_CTRL_DATA
 * - PIO-mode detection temporarily disabled since ide-modes.c is not compiled
 * - All DMA uses virt_to_phys conversions for DMA buffers and descriptor ptrs
 * - Probably correct ide_dma_begin semantics in dmaproc now for ATAPI devices
 * - Removed RESET_DMA when starting a new transfer - why was this necessary ?
 * - Indentation fix
 *
 *
 */

/* Regarding DMA: 
 *
 * There are two forms of DMA - "DMA handshaking" between the interface and the drive,
 * and DMA between the memory and the interface. We can ALWAYS use the latter, since it's
 * something built-in in the Etrax. However only some drives support the DMA-mode handshaking
 * on the ATA-bus. The normal PC driver and Triton interface disables memory-if DMA when the
 * device can't do DMA handshaking for some stupid reason. We don't need to do that.
 */ 

#undef REALLY_SLOW_IO           /* most systems can safely undef this */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/blkdev.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/init.h>

#include <asm/io.h>
#include <asm/svinto.h>
#include <asm/dma.h>

/* number of Etrax DMA descriptors */
#define MAX_DMA_DESCRS 64

/* number of times to retry busy-flags when reading/writing IDE-registers 
 * this can't be too high because a hung harddisk might cause the watchdog
 * to trigger (sometimes IN_BYTE and OUT_BYTE are called with irq's disabled)
 */

#define IDE_REGISTER_TIMEOUT 300

#ifdef CONFIG_ETRAX_IDE_CSE1_16_RESET
/* address where the memory-mapped IDE reset bit lives, if used */
static volatile unsigned long *reset_addr;
#endif

#define LOWDB(x)
#define D(x) 

void 
OUT_BYTE(unsigned char data, ide_ioreg_t reg) {
	int timeleft;
	LOWDB(printk("ob: data 0x%x, reg 0x%x\n", data, reg));

	/* note the lack of handling any timeouts. we stop waiting, but we don't
	 * really notify anybody.
	 */

	timeleft = IDE_REGISTER_TIMEOUT;
	/* wait for busy flag */
	while(timeleft && (*R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy)))
		timeleft--;

	/*
	 * Fall through at a timeout, so the ongoing command will be
	 * aborted by the write below, which is expected to be a dummy
	 * command to the command register.  This happens when a faulty
	 * drive times out on a command.  See comment on timeout in
	 * IN_BYTE.
	 */
	if(!timeleft)
		printk("ATA timeout reg 0x%lx := 0x%x\n", reg, data);

	*R_ATA_CTRL_DATA = reg | data; /* write data to the drive's register */

	timeleft = IDE_REGISTER_TIMEOUT;
	/* wait for transmitter ready */
	while(timeleft && !(*R_ATA_STATUS_DATA &
			    IO_MASK(R_ATA_STATUS_DATA, tr_rdy)))
		timeleft--;
}
unsigned char 
IN_BYTE(ide_ioreg_t reg) {
        /* data was in the lower 16 bits in the status reg */
        return (unsigned char)(IN_WORD(reg));
}

unsigned short 
IN_WORD(ide_ioreg_t reg) {
	int status;
	int timeleft;

	timeleft = IDE_REGISTER_TIMEOUT;
	/* wait for busy flag */
	while(timeleft && (*R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy)))
		timeleft--;

	if(!timeleft) {
		/*
		 * If we're asked to read the status register, like for
		 * example when a command does not complete for an
		 * extended time, but the ATA interface is stuck in a
		 * busy state at the *ETRAX* ATA interface level (as has
		 * happened repeatedly with at least one bad disk), then
		 * the best thing to do is to pretend that we read
		 * "busy" in the status register, so the IDE driver will
		 * time-out, abort the ongoing command and perform a
		 * reset sequence.  Note that the subsequent OUT_BYTE
		 * call will also timeout on busy, but as long as the
		 * write is still performed, everything will be fine.
		 */
		if ((reg & IO_MASK (R_ATA_CTRL_DATA, addr))
		    == IO_FIELD (R_ATA_CTRL_DATA, addr, IDE_STATUS_OFFSET))
			return BUSY_STAT;
		else
			/* For other rare cases we assume 0 is good enough.  */
			return 0;
	}

	*R_ATA_CTRL_DATA = reg | IO_STATE(R_ATA_CTRL_DATA, rw, read); /* read data */ 

	timeleft = IDE_REGISTER_TIMEOUT;
	/* wait for available */
	while(timeleft && !((status = *R_ATA_STATUS_DATA) &
			    IO_MASK(R_ATA_STATUS_DATA, dav)))
		timeleft--;

	if(!timeleft)
		return 0;

	LOWDB(printk("inb: 0x%x from reg 0x%x\n", status & 0xff, reg));

        return (unsigned short)status;
}

/* PIO timing (in R_ATA_CONFIG)
 *
 *                        _____________________________
 * ADDRESS :     ________/
 *
 *                            _______________
 * DIOR    :     ____________/               \__________
 *
 *                               _______________
 * DATA    :     XXXXXXXXXXXXXXXX_______________XXXXXXXX
 *
 *
 * DIOR is unbuffered while address and data is buffered.
 * This creates two problems:
 * 1. The DIOR pulse is to early (because it is unbuffered)
 * 2. The rise time of DIOR is long
 *
 * There are at least three different plausible solutions
 * 1. Use a pad capable of larger currents in Etrax
 * 2. Use an external buffer
 * 3. Make the strobe pulse longer
 *
 * Some of the strobe timings below are modified to compensate
 * for this. This implies a slight performance decrease.
 *
 * THIS SHOULD NEVER BE CHANGED!
 *
 * TODO: Is this true for the latest LX boards still ?
 */

#define ATA_DMA2_STROBE  4 
#define ATA_DMA2_HOLD    0
#define ATA_DMA1_STROBE  4 
#define ATA_DMA1_HOLD    1
#define ATA_DMA0_STROBE 12 
#define ATA_DMA0_HOLD    9
#define ATA_PIO4_SETUP   1
#define ATA_PIO4_STROBE  5
#define ATA_PIO4_HOLD    0
#define ATA_PIO3_SETUP   1
#define ATA_PIO3_STROBE  5
#define ATA_PIO3_HOLD    1
#define ATA_PIO2_SETUP   1
#define ATA_PIO2_STROBE  6
#define ATA_PIO2_HOLD    2
#define ATA_PIO1_SETUP   2
#define ATA_PIO1_STROBE 11
#define ATA_PIO1_HOLD    4
#define ATA_PIO0_SETUP   4
#define ATA_PIO0_STROBE 19
#define ATA_PIO0_HOLD    4

static int e100_dmaproc (ide_dma_action_t func, ide_drive_t *drive);
static void e100_ideproc (ide_ide_action_t func, ide_drive_t *drive,
			  void *buffer, unsigned int length);

/*
 * good_dma_drives() lists the model names (from "hdparm -i")
 * of drives which do not support mword2 DMA but which are
 * known to work fine with this interface under Linux.
 */

const char *good_dma_drives[] = {"Micropolis 2112A",
				 "CONNER CTMA 4000",
				 "CONNER CTT8000-A",
				 NULL};

static void tune_e100_ide(ide_drive_t *drive, byte pio)
{
	unsigned long flags;
	
	pio = 4;
	/* pio = ide_get_best_pio_mode(drive, pio, 4, NULL); */
	
	/* set pio mode! */
  	 
	switch(pio) {
		case 0:
			*R_ATA_CONFIG = ( IO_FIELD( R_ATA_CONFIG, enable,     1 ) |
					  IO_FIELD( R_ATA_CONFIG, dma_strobe, ATA_DMA2_STROBE ) |
					  IO_FIELD( R_ATA_CONFIG, dma_hold,   ATA_DMA2_HOLD ) |
					  IO_FIELD( R_ATA_CONFIG, pio_setup,  ATA_PIO0_SETUP ) |
					  IO_FIELD( R_ATA_CONFIG, pio_strobe, ATA_PIO0_STROBE ) |
					  IO_FIELD( R_ATA_CONFIG, pio_hold,   ATA_PIO0_HOLD ) );
			break;
		case 1:
			*R_ATA_CONFIG = ( IO_FIELD( R_ATA_CONFIG, enable,     1 ) |
					  IO_FIELD( R_ATA_CONFIG, dma_strobe, ATA_DMA2_STROBE ) |
					  IO_FIELD( R_ATA_CONFIG, dma_hold,   ATA_DMA2_HOLD ) |
					  IO_FIELD( R_ATA_CONFIG, pio_setup,  ATA_PIO1_SETUP ) |
					  IO_FIELD( R_ATA_CONFIG, pio_strobe, ATA_PIO1_STROBE ) |
					  IO_FIELD( R_ATA_CONFIG, pio_hold,   ATA_PIO1_HOLD ) );
			break;
		case 2: