open_pic.c

这个linux源代码是很全面的~基本完整了~使用c编译的~由于时间问题我没有亲自测试~但就算用来做参考资料也是非常好的

/*
 *  arch/ppc/kernel/open_pic.c -- OpenPIC Interrupt Handling
 *
 *  Copyright (C) 1997 Geert Uytterhoeven
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License.  See the file COPYING in the main directory of this archive
 *  for more details.
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/ptrace.h>
#include <asm/signal.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/prom.h>

#include <asm/machdep.h>

#include "local_irq.h"
#include "open_pic.h"
#include "open_pic_defs.h"
#include "i8259.h"
#include <asm/ppcdebug.h>

void* OpenPIC_Addr;
static volatile struct OpenPIC *OpenPIC = NULL;
u_int OpenPIC_NumInitSenses __initdata = 0;
u_char *OpenPIC_InitSenses __initdata = NULL;

void find_ISUs(void);

static u_int NumProcessors;
static u_int NumSources;
static int NumISUs;
static int open_pic_irq_offset;
static volatile unsigned char* chrp_int_ack_special;
static int broken_ipi_registers;

OpenPIC_SourcePtr ISU[OPENPIC_MAX_ISU];

static void openpic_end_irq(unsigned int irq_nr);
static void openpic_set_affinity(unsigned int irq_nr, unsigned long cpumask);

struct hw_interrupt_type open_pic = {
	" OpenPIC  ",
	NULL,
	NULL,
	openpic_enable_irq,
	openpic_disable_irq,
	NULL,
	openpic_end_irq,
	openpic_set_affinity
};

#ifdef CONFIG_SMP
static void openpic_end_ipi(unsigned int irq_nr);
static void openpic_enable_ipi(unsigned int irq_nr);
static void openpic_disable_ipi(unsigned int irq_nr);

struct hw_interrupt_type open_pic_ipi = {
	" OpenPIC  ",
	NULL,
	NULL,
	openpic_enable_ipi,
	openpic_disable_ipi,
	NULL,
	openpic_end_ipi,
	NULL
};
#endif /* CONFIG_SMP */

unsigned int openpic_vec_ipi;
unsigned int openpic_vec_timer;
unsigned int openpic_vec_spurious;

/*
 *  Accesses to the current processor's openpic registers
 */
#ifdef CONFIG_SMP
#define THIS_CPU		Processor[cpu]
#define DECL_THIS_CPU		int cpu = hard_smp_processor_id()
#define CHECK_THIS_CPU		check_arg_cpu(cpu)
#else
#define THIS_CPU		Processor[hard_smp_processor_id()]
#define DECL_THIS_CPU
#define CHECK_THIS_CPU
#endif /* CONFIG_SMP */

#if 1
#define check_arg_ipi(ipi) \
    if (ipi < 0 || ipi >= OPENPIC_NUM_IPI) \
	printk(KERN_ERR "open_pic.c:%d: illegal ipi %d\n", __LINE__, ipi);
#define check_arg_timer(timer) \
    if (timer < 0 || timer >= OPENPIC_NUM_TIMERS) \
	printk(KERN_ERR "open_pic.c:%d: illegal timer %d\n", __LINE__, timer);
#define check_arg_vec(vec) \
    if (vec < 0 || vec >= OPENPIC_NUM_VECTORS) \
	printk(KERN_ERR "open_pic.c:%d: illegal vector %d\n", __LINE__, vec);
#define check_arg_pri(pri) \
    if (pri < 0 || pri >= OPENPIC_NUM_PRI) \
	printk(KERN_ERR "open_pic.c:%d: illegal priority %d\n", __LINE__, pri);
/*
 * Print out a backtrace if it's out of range, since if it's larger than NR_IRQ's
 * data has probably been corrupted and we're going to panic or deadlock later
 * anyway --Troy
 */
extern unsigned long* _get_SP(void);
#define check_arg_irq(irq) \
    if (irq < open_pic_irq_offset || irq >= (NumSources+open_pic_irq_offset)){ \
      printk(KERN_ERR "open_pic.c:%d: illegal irq %d\n", __LINE__, irq); \
      print_backtrace(_get_SP()); }
#define check_arg_cpu(cpu) \
    if (cpu < 0 || cpu >= OPENPIC_MAX_PROCESSORS){ \
	printk(KERN_ERR "open_pic.c:%d: illegal cpu %d\n", __LINE__, cpu); \
	print_backtrace(_get_SP()); }
#else
#define check_arg_ipi(ipi)	do {} while (0)
#define check_arg_timer(timer)	do {} while (0)
#define check_arg_vec(vec)	do {} while (0)
#define check_arg_pri(pri)	do {} while (0)
#define check_arg_irq(irq)	do {} while (0)
#define check_arg_cpu(cpu)	do {} while (0)
#endif

#define GET_ISU(source)	ISU[(source) >> 4][(source) & 0xf]

void __init openpic_init_IRQ(void)
{
        struct device_node *np;
        int i;
        unsigned int *addrp;
        unsigned char* chrp_int_ack_special = 0;
        unsigned char init_senses[NR_IRQS - NUM_8259_INTERRUPTS];
        int nmi_irq = -1;
#if defined(CONFIG_VT) && defined(CONFIG_ADB_KEYBOARD) && defined(XMON)
        struct device_node *kbd;
#endif

        if (!(np = find_devices("pci"))
            || !(addrp = (unsigned int *)
                 get_property(np, "8259-interrupt-acknowledge", NULL)))
                printk(KERN_ERR "Cannot find pci to get ack address\n");
        else
		chrp_int_ack_special = (unsigned char *)
			__ioremap(addrp[prom_n_addr_cells(np)-1], 1, _PAGE_NO_CACHE);
        /* hydra still sets OpenPIC_InitSenses to a static set of values */
        if (OpenPIC_InitSenses == NULL) {
                prom_get_irq_senses(init_senses, NUM_8259_INTERRUPTS, NR_IRQS);
                OpenPIC_InitSenses = init_senses;
                OpenPIC_NumInitSenses = NR_IRQS - NUM_8259_INTERRUPTS;
        }
        openpic_init(1, NUM_8259_INTERRUPTS, chrp_int_ack_special, nmi_irq);
        for ( i = 0 ; i < NUM_8259_INTERRUPTS  ; i++ )
                irq_desc[i].handler = &i8259_pic;
        i8259_init();
}

static inline u_int openpic_read(volatile u_int *addr)
{
	u_int val;

	val = in_le32(addr);
	return val;
}

static inline void openpic_write(volatile u_int *addr, u_int val)
{
	out_le32(addr, val);
}

static inline u_int openpic_readfield(volatile u_int *addr, u_int mask)
{
	u_int val = openpic_read(addr);
	return val & mask;
}

static inline void openpic_writefield(volatile u_int *addr, u_int mask,
			       u_int field)
{
	u_int val = openpic_read(addr);
	openpic_write(addr, (val & ~mask) | (field & mask));
}

static inline void openpic_clearfield(volatile u_int *addr, u_int mask)
{
	openpic_writefield(addr, mask, 0);
}

static inline void openpic_setfield(volatile u_int *addr, u_int mask)
{
	openpic_writefield(addr, mask, mask);
}

static void openpic_safe_writefield(volatile u_int *addr, u_int mask,
				    u_int field)
{
	unsigned int loops = 100000;

	openpic_setfield(addr, OPENPIC_MASK);
	while (openpic_read(addr) & OPENPIC_ACTIVITY) {
		if (!loops--) {
			printk(KERN_ERR "openpic_safe_writefield timeout\n");
			break;
		}
	}
	openpic_writefield(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK);
}

#ifdef CONFIG_SMP
static u_int openpic_read_IPI(volatile u_int* addr)
{
        u_int val = 0;

	if (broken_ipi_registers)
		/* yes this is right ... bug, feature, you decide! -- tgall */
		val = in_be32(addr);
	else
		val = in_le32(addr);

        return val;
}

static void openpic_test_broken_IPI(void)
{
	u_int t;

	openpic_write(&OpenPIC->Global.IPI_Vector_Priority(0), OPENPIC_MASK);
	t = openpic_read(&OpenPIC->Global.IPI_Vector_Priority(0));
	if (t == le32_to_cpu(OPENPIC_MASK)) {
		printk(KERN_INFO "OpenPIC reversed IPI registers detected\n");
		broken_ipi_registers = 1;
	}
}

/* because of the power3 be / le above, this is needed */
static inline void openpic_writefield_IPI(volatile u_int* addr, u_int mask, u_int field)
{
        u_int  val = openpic_read_IPI(addr);
        openpic_write(addr, (val & ~mask) | (field & mask));
}

static inline void openpic_clearfield_IPI(volatile u_int *addr, u_int mask)
{
        openpic_writefield_IPI(addr, mask, 0);
}

static inline void openpic_setfield_IPI(volatile u_int *addr, u_int mask)
{
        openpic_writefield_IPI(addr, mask, mask);
}

static void openpic_safe_writefield_IPI(volatile u_int *addr, u_int mask, u_int field)
{
	unsigned int loops = 100000;

        openpic_setfield_IPI(addr, OPENPIC_MASK);

        /* wait until it's not in use */
        /* BenH: Is this code really enough ? I would rather check the result
         *       and eventually retry ...
         */
        while(openpic_read_IPI(addr) & OPENPIC_ACTIVITY) {
		if (!loops--) {
			printk(KERN_ERR "openpic_safe_writefield timeout\n");
			break;
		}
	}

        openpic_writefield_IPI(addr, mask, field | OPENPIC_MASK);
}
#endif /* CONFIG_SMP */

void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack,
			 int programmer_switch_irq)
{
	u_int t, i;
	u_int timerfreq;
	const char *version;

	if (!OpenPIC_Addr) {
		printk(KERN_INFO "No OpenPIC found !\n");
		return;
	}
	OpenPIC = (volatile struct OpenPIC *)OpenPIC_Addr;

	ppc64_boot_msg(0x20, "OpenPic Init");

	t = openpic_read(&OpenPIC->Global.Feature_Reporting0);
	switch (t & OPENPIC_FEATURE_VERSION_MASK) {
	case 1:
		version = "1.0";
		break;
	case 2:
		version = "1.2";
		break;
	case 3:
		version = "1.3";
		break;
	default:
		version = "?";
		break;
	}
	NumProcessors = ((t & OPENPIC_FEATURE_LAST_PROCESSOR_MASK) >>
			 OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT) + 1;
	NumSources = ((t & OPENPIC_FEATURE_LAST_SOURCE_MASK) >>
		      OPENPIC_FEATURE_LAST_SOURCE_SHIFT) + 1;
	printk(KERN_INFO "OpenPIC Version %s (%d CPUs and %d IRQ sources) at %p\n",
	       version, NumProcessors, NumSources, OpenPIC);
	timerfreq = openpic_read(&OpenPIC->Global.Timer_Frequency);
	if (timerfreq)
		printk(KERN_INFO "OpenPIC timer frequency is %d.%06d MHz\n",
		       timerfreq / 1000000, timerfreq % 1000000);

	if (!main_pic)
		return;

	open_pic_irq_offset = offset;
	chrp_int_ack_special = (volatile unsigned char*)chrp_ack;

	find_ISUs();

	/* Initialize timer interrupts */
	ppc64_boot_msg(0x21, "OpenPic Timer");
	for (i = 0; i < OPENPIC_NUM_TIMERS; i++) {
		/* Disabled, Priority 0 */
		openpic_inittimer(i, 0, openpic_vec_timer+i);
		/* No processor */
		openpic_maptimer(i, 0);
	}

#ifdef CONFIG_SMP
	/* Initialize IPI interrupts */
	ppc64_boot_msg(0x22, "OpenPic IPI");
	openpic_test_broken_IPI();
	for (i = 0; i < OPENPIC_NUM_IPI; i++) {
		/* Disabled, Priority 10..13 */
		openpic_initipi(i, 10+i, openpic_vec_ipi+i);
		/* IPIs are per-CPU */
		irq_desc[openpic_vec_ipi+i].status |= IRQ_PER_CPU;
		irq_desc[openpic_vec_ipi+i].handler = &open_pic_ipi;
	}
#endif

	/* Initialize external interrupts */
	ppc64_boot_msg(0x23, "OpenPic Ext");

	openpic_set_priority(0xf);

	/* SIOint (8259 cascade) is special */
	if (offset) {
		openpic_initirq(0, 8, offset, 1, 1);
		openpic_mapirq(0, 1<<get_hard_smp_processor_id(0));
	}

	/* Init all external sources */
	for (i = 1; i < NumSources; i++) {
		int pri, sense;

		/* the bootloader may have left it enabled (bad !) */
		openpic_disable_irq(i+offset);

		pri = (i == programmer_switch_irq)? 9: 8;
		sense = (i < OpenPIC_NumInitSenses)? OpenPIC_InitSenses[i]: 1;
		if (sense)
			irq_desc[i+offset].status = IRQ_LEVEL;

		/* Enabled, Priority 8 or 9 */
		openpic_initirq(i, pri, i+offset, !sense, sense);
		/* Processor 0 */
		openpic_mapirq(i, 1<<get_hard_smp_processor_id(0));
	}

	/* Init descriptors */
	for (i = offset; i < NumSources + offset; i++)
		irq_desc[i].handler = &open_pic;

	/* Initialize the spurious interrupt */
	ppc64_boot_msg(0x24, "OpenPic Spurious");
	openpic_set_spurious(openpic_vec_spurious);

	/* Initialize the cascade */
	if (offset) {
		if (request_irq(offset, no_action, SA_INTERRUPT,
				"82c59 cascade", NULL))
			printk(KERN_ERR "Unable to get OpenPIC IRQ 0 for cascade\n");
	}
	openpic_set_priority(0);
	openpic_disable_8259_pass_through();

	ppc64_boot_msg(0x25, "OpenPic Done");
}

void openpic_setup_ISU(int isu_num, unsigned long addr)
{
	if (isu_num >= OPENPIC_MAX_ISU)
		return;
	ISU[isu_num] = (OpenPIC_SourcePtr) __ioremap(addr, 0x400, _PAGE_NO_CACHE);
	if (isu_num >= NumISUs)
		NumISUs = isu_num + 1;
}