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📄 pci_dma.c

📁 这个linux源代码是很全面的~基本完整了~使用c编译的~由于时间问题我没有亲自测试~但就算用来做参考资料也是非常好的
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	/* can't go anywhere w/o a direction in life */	if (direction == PCI_DMA_NONE)		BUG();	/*	 * Get the hwgraph vertex for the device	 */	device_sysdata = (struct sn_device_sysdata *) hwdev->sysdata;	vhdl = device_sysdata->vhdl;	/*	 * Setup a DMA address for each entry in the	 * scatterlist.	 */	for (i = 0; i < nents; i++, sg++) {		/* this catches incorrectly written drivers that                   attempt to map scatterlists that they have                   previously mapped.  we print a warning and                   continue, but the driver should be fixed */#ifdef DEBUG		if (sg->dma_address) {/* This needs to be cleaned up at some point. */			NAG("A PCI driver (for device at%8s) has attempted to "			    "map a scatterlist that was previously mapped at "			    "%p - this is currently being worked around.\n",			    hwdev->slot_name, (void *)sg->dma_address);			phys_addr = (u64)sg->dma_address & TO_PHYS_MASK;		} else#endif			phys_addr = __pa(sg->address ? sg->address :					page_address(sg->page) + offset);		/*		 * Handle the most common case: 64 bit cards.  This		 * call should always succeed.		 */		if (IS_PCIA64(hwdev)) {			sg->dma_address = pciio_dmatrans_addr(vhdl, NULL, phys_addr,						       sg->length,						       DMA_DATA_FLAGS | PCIIO_DMA_A64 );			sg->dma_length = sg->length;			continue;		}		/*		 * Handle 32-63 bit cards via direct mapping		 */		if (IS_PCI32G(hwdev)) {			sg->dma_address = pciio_dmatrans_addr(vhdl, NULL,								phys_addr,								sg->length,								DMA_DATA_FLAGS);			sg->dma_length = sg->length;			if (sg->dma_address)				continue;		}		/*		 * It is a 32 bit card and we cannot do direct mapping,		 * so we use an ATE.		 */		dma_map = 0;		dma_map = pciio_dmamap_alloc(vhdl, NULL, sg->length,					     DMA_DATA_FLAGS);		if (!dma_map) {			printk(KERN_ERR "sn_pci_map_sg: Unable to allocate "			       "anymore 32 bit page map entries.\n");			BUG();		}		sg->dma_address = pciio_dmamap_addr(dma_map, phys_addr, sg->length);		sg->dma_length = sg->length;#warning BADBADBAD scsi retries will die since sglist is unmapped and reused.		sg->page = (char *)dma_map;	}	return nents;}/** * sn_pci_unmap_sg - unmap a scatter-gather list * @hwdev: device to unmap * @sg: scatterlist to unmap * @nents: number of scatterlist entries * @direction: DMA direction * * Unmap a set of streaming mode DMA translations.  Again, cpu read rules * concerning calls here are the same as for pci_unmap_single() below.  Also * known as sn_pci_unmap_sg() by the IA64 machvec code. */voidsn_pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction){	int i;	/* can't go anywhere w/o a direction in life */	if (direction == PCI_DMA_NONE)		BUG();	for (i = 0; i < nents; i++, sg++)#warning need to derive sn_dma_map from sg->dma_address instead		if (sg->page) {			struct sn_dma_maps_s *sn_dma_map;			/*			 * We maintain the DMA Map pointer in sg->page if 			 * it is ever allocated.			 */			sg->dma_address = 0;			sn_dma_map = (struct sn_dma_maps_s *)sg->page;			pciio_dmamap_done((pciio_dmamap_t)sn_dma_map);			pciio_dmamap_free((pciio_dmamap_t)sn_dma_map);			sn_dma_map->dma_addr = 0;			sg->page = 0;		}}/** * sn_pci_map_single - map a single region for DMA * @hwdev: device to map for * @ptr: kernel virtual address of the region to map * @size: size of the region * @direction: DMA direction * * Map the region pointed to by @ptr for DMA and return the * DMA address.   Also known as platform_pci_map_single() by * the IA64 machvec code. * * We map this to the one step pciio_dmamap_trans interface rather than * the two step pciio_dmamap_alloc/pciio_dmamap_addr because we have * no way of saving the dmamap handle from the alloc to later free * (which is pretty much unacceptable). * * TODO: simplify our interface; *       get rid of dev_desc and vhdl (seems redundant given a pci_dev); *       figure out how to save dmamap handle so can use two step. */dma_addr_tsn_pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction){	devfs_handle_t vhdl;	dma_addr_t dma_addr;	unsigned long phys_addr;	struct sn_device_sysdata *device_sysdata;	pciio_dmamap_t dma_map = NULL;	struct sn_dma_maps_s *sn_dma_map;	if (direction == PCI_DMA_NONE)		BUG();	/* SN cannot support DMA addresses smaller than 32 bits. */	if (IS_PCI32L(hwdev)) return 0;	/*	 * find vertex for the device	 */	device_sysdata = (struct sn_device_sysdata *)hwdev->sysdata;	vhdl = device_sysdata->vhdl;	/*	 * Call our dmamap interface	 */	dma_addr = 0;	phys_addr = __pa(ptr);	if (IS_PCIA64(hwdev)) {		/*		 * This device supports 64 bit DMA addresses.		 */		dma_addr = pciio_dmatrans_addr(vhdl, NULL, phys_addr, size,					       DMA_DATA_FLAGS | PCIIO_DMA_A64);		return dma_addr;	}	/*	 * Devices that supports 32 bit to 63 bit DMA addresses get	 * 32 bit DMA addresses.	 *	 * First try to get a 32 bit direct map register.	 */	if (IS_PCI32G(hwdev)) {		dma_addr = pciio_dmatrans_addr(vhdl, NULL, phys_addr, size,					       DMA_DATA_FLAGS);		if (dma_addr)			return dma_addr;	}	/*	 * It's a 32 bit card and we cannot do direct mapping so	 * let's use the PMU instead.	 */	dma_map = NULL;	dma_map = pciio_dmamap_alloc(vhdl, NULL, size, DMA_DATA_FLAGS);	if (!dma_map) {		printk(KERN_ERR "pci_map_single: Unable to allocate anymore "		       "32 bits page map entries.\n");		BUG();	}	dma_addr = (dma_addr_t) pciio_dmamap_addr(dma_map, phys_addr, size);	sn_dma_map = (struct sn_dma_maps_s *)dma_map;	sn_dma_map->dma_addr = dma_addr;	return ((dma_addr_t)dma_addr);}/** * sn_pci_unmap_single - unmap a region used for DMA * @hwdev: device to unmap * @dma_addr: DMA address to unmap * @size: size of region * @direction: DMA direction * * Unmaps the region pointed to by @dma_addr.  Also known as * platform_pci_unmap_single() by the IA64 machvec code. */voidsn_pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction){	struct sn_dma_maps_s *sn_dma_map = NULL;        if (direction == PCI_DMA_NONE)		BUG();	/*	 * Get the sn_dma_map entry.	 */	if (IS_PCI32_MAPPED(dma_addr))		sn_dma_map = find_sn_dma_map(dma_addr, hwdev->bus->number);	/*	 * and free it if necessary...	 */	if (sn_dma_map) {		pciio_dmamap_done((pciio_dmamap_t)sn_dma_map);		pciio_dmamap_free((pciio_dmamap_t)sn_dma_map);		sn_dma_map->dma_addr = (dma_addr_t)NULL;	}}/** * sn_pci_dma_sync_single - make sure all DMAs have completed * @hwdev: device to sync * @dma_handle: DMA address to sync * @size: size of region * @direction: DMA direction * * This routine is supposed to sync the DMA region specified * by @dma_handle into the 'coherence domain'.  See sn_dma_sync() * above for more information.   Also known as * platform_pci_dma_sync_single() by the IA64 machvec code. */voidsn_pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction){	if (direction == PCI_DMA_NONE)                BUG();	sn_dma_sync(hwdev);}/** * sn_pci_dma_sync_sg - make sure all DMAs have completed * @hwdev: device to sync * @sg: scatterlist to sync * @nents: number of entries in the scatterlist * @direction: DMA direction * * This routine is supposed to sync the DMA regions specified * by @sg into the 'coherence domain'.  See sn_dma_sync() * above for more information.   Also known as * platform_pci_dma_sync_sg() by the IA64 machvec code. */voidsn_pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction){        if (direction == PCI_DMA_NONE)                BUG();	sn_dma_sync(hwdev);}/** * sn_dma_supported - test a DMA mask * @hwdev: device to test * @mask: DMA mask to test * * Return whether the given PCI device DMA address mask can be supported * properly.  For example, if your device can only drive the low 24-bits * during PCI bus mastering, then you would pass 0x00ffffff as the mask to * this function.  Of course, SN only supports devices that have 32 or more * address bits. */intsn_pci_dma_supported(struct pci_dev *hwdev, u64 mask){	if (mask < 0xffffffff)		return 0;	return 1;}EXPORT_SYMBOL(sn_pci_unmap_single);EXPORT_SYMBOL(sn_pci_map_single);EXPORT_SYMBOL(sn_pci_dma_sync_single);EXPORT_SYMBOL(sn_pci_map_sg);EXPORT_SYMBOL(sn_pci_unmap_sg);EXPORT_SYMBOL(sn_pci_alloc_consistent);EXPORT_SYMBOL(sn_pci_free_consistent);EXPORT_SYMBOL(sn_pci_dma_supported);

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