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字号:
MOVE.W #$008F,SIM_BASE+TPU_PRAM0
;TPU0:OFFSET:5000 ;1MS
MOVE.W #4946,SIM_BASE+TPU_PRAM0+2
;TPU0的REF_ADDR1:TCR1
MOVE.W #$00EC,SIM_BASE+TPU_PRAM0+4
;TPU15控制字段:%0000 0000 0000 1011(检测下降沿)
MOVE.W #$0008,SIM_BASE+TPU_PRAM15 ;0000 000-0 000-0 10-00 Page296
;TPU15的bank_address字段:$820e(无效地址)
MOVE.W #$000E,SIM_BASE+TPU_PRAM15+2
;TPU15的MAX_COUNT字段:$0100(256次跳变产生中断)
MOVE.W #$0100,SIM_BASE+TPU_PRAM15+4
MOVE.W #$0008,SIM_BASE+TPU_PRAM14
MOVE.W #$000E,SIM_BASE+TPU_PRAM14+2
MOVE.W #$0100,SIM_BASE+TPU_PRAM14+4
MOVE.W #$0008,SIM_BASE+TPU_PRAM13
MOVE.W #$000E,SIM_BASE+TPU_PRAM13+2
MOVE.W #$0100,SIM_BASE+TPU_PRAM13+4
;TPU1-TPU12控制字段:不使用
;TPU1-TPU12 初始化为低电平10;OC,ITC无主机服务申请00
MOVE.W #$02AA,SIM_BASE+TPU_HSRR0 ;0000 0010 1010 1010
MOVE.W #$AAA8,SIM_BASE+TPU_HSRR1 ;1010 1010 1010 1000
;TPU各通道优先级设置:
;TPU0优先级为高11
;TPU15,14,13 优先级为中10,1010
;TPU1-TPU12 优先级为低01,并初始化为低电平
MOVE.W #$A955,SIM_BASE+TPU_CPR0 ;1010 1001 0101 0101
MOVE.W #$5557,SIM_BASE+TPU_CPR1 ;0101 0101 0101 0111
;************************************************************
; QSM 初始化
;************************************************************
.IF BDM_USED==0
;QSM_QMCR设置:STOP=0,FRZ=%00,SUPV=1,IARB=%1010
MOVE.W #$008A,SIM_BASE+QSM_QMCR ;%0000 0000 1000 1010
.ELSE
;QSM_QMCR设置:STOP=0,FRZ=%10,SUPV=1,IARB=%1010
MOVE.W #$408A,SIM_BASE+QSM_QMCR ;%0100 0000 1000 1010
.ENDIF
;QSM中断优先级设置:SPI为0,SCI为3
MOVE.B #$05,SIM_BASE+QSM_QILR;%00-00 0-011
;QSM中断向量设置:50H
MOVE.B #$50,SIM_BASE+QSM_QIVR
;QSM口数据寄存器设置:%1000 0001
MOVE.B #$BF,SIM_BASE+QSM_QPDR ;1011 1111 TXD,PCS3,PCS2,PCS1 PCS0,SCK,MOSI,MISO
;************************************************************
; QSPI 初始化
;************************************************************
;清QSPI状态寄存器
AND.B #$00,SIM_BASE+QSM_SPSR
;QSPI的SPCR0设置:;;;MSTR=0,WOMQ=0,BITS=0000,CPOL=0,CPHA=1,SP=0000 0000
MOVE.W #$8105,SIM_BASE+QSM_SPCR0
;QSPI的SPCR2设置:SPIFIE=1,WREN=0,WRTO=0,ENDQP=0000,NEWQP=0000
MOVE.W #$0000,SIM_BASE+QSM_SPCR2
;QSPI的SPCR3设置:LOOPQ=0,HMIE=0,HALT=0
MOVE.B #$00,SIM_BASE+QSM_SPCR3
;QSPI的SPCR1设置:SPE=0,DSCKL no used,DTL no used
MOVE.W #$3004,SIM_BASE+QSM_SPCR1
;QSM口方向寄存器设置:%1111 1110(0-输入,1-输出)
MOVE.B #$FE,SIM_BASE+QSM_QDDR
;QSM口分配寄存器设置:%0111 1011(0-I/O,1-Function),Bit15,Bit10 No used
MOVE.B #$7B,SIM_BASE+QSM_QPAR
;************************************************************
; ;周期中断设置,中断级别为2,中断号为0X60
;************************************************************
;PITR设置:PTP=1,PITR0-7=49周期为0.0050176秒
MOVE.W #$0131,SIM_BASE+SIM_PITR
;PICR设置:中断优先级为2(周期中断),中断向量设为60H
MOVE.W #$0260,SIM_BASE+SIM_PICR;控制
;清软件WatchDog计数器
MOVE.B #$55,SIM_BASE+SIM_SWSR
MOVE.B #$AA,SIM_BASE+SIM_SWSR
;***********************************************************
; Initialize other RAM from ROM.
;***********************************************************
MOVE.L #DATA,A0 ; A0 = ROM base of region data
MOVE.L #`BASE(data),A1 ; A1 = RAM base of region data
MOVE.L #`SIZE(data),D0 ; D0 = size of region data
LSR.L #2,D0 ; compute size in longs
BRA IDBF ; enter a fast loop
ILP: MOVE.L (A0)+,(A1)+ ; move four bytes at a time
IDBF: DBF D0,ILP ; up to 256K in inner loop
SUB.L #$10000,D0 ; rest in outer loop
BHS ILP
.IF MALLOC_USED
;***********************************************************
; Initialize memory allocator.
;***********************************************************
MOVE.L #`BASE(malloc),D0 ; address of malloc region
MOVE.L #`SIZE(malloc),D1 ; size of malloc region
.IF "ptrd"?"2"
SWAP D0 ; handle 2-byte C "pointers"
.ENDIF
.IF "long"?"2"
SWAP D1 ; handle 2-byte C "longs"
.ENDIF
MOVE.L D0,__brkp ; vars referenced by mbrk()
MOVE.L D1,__brksz
.ENDIF
.IF CPLUSPLUS
;***********************************************************
; Call any C++ initializer thunks.
;***********************************************************
MOVE.L #`BASE(init),A5 ; A5 = base of region init
MOVE.L #`SIZE(init),D7 ; D7 = size of region init
.IF "ptrf"?"2"
LSR.L #1,D7 ; number of initializer thunks
.ELSE
LSR.L #2,D7 ; number of initializer thunks
.ENDIF
BRA NDBF ; enter loop
NLP:
.IF "ptrf"?"2"
MOVE.W (A5)+,A0 ; get address of thunk
.ELSE
MOVE.L (A5)+,A0 ; get address of thunk
.ENDIF
CMP.W #0x4E71,A0 ; NOP may pad region
BEQ NDBF
JSR (A0) ; call initializer thunk
NDBF: DBF D7,NLP ; up to 256K in inner loop
SUB.L #$10000,D7 ; rest in outer loop
BHS NLP
.ENDIF
;清软件WatchDog计数器
MOVE.B #$55,SIM_BASE+SIM_SWSR
MOVE.B #$AA,SIM_BASE+SIM_SWSR
;***********************************************************
; Check control registers.
;***********************************************************
; BSR __Check_Register
;***********************************************************
; Initionalize flag.
;***********************************************************
; BSR.L BIOSInit;调用BIOS初始化程序
;***********************************************************
; Invoke main() with no arguments.
;***********************************************************
JSR _main
;***********************************************************
; Call any C++ exit thunks.
;***********************************************************
__exit
.IF CPLUSPLUS
MOVE.L #`BASE(exit),A5 ; A5 = base of region exit
MOVE.L #`SIZE(exit),D7 ; D7 = size of region exit
ADD.L D7,A5 ; reverse order
.IF "ptrf"?"2"
LSR.L #1,D7 ; number of exit thunks
.ELSE
LSR.L #2,D7 ; number of exit thunks
.ENDIF
BRA XDBF ; enter loop
XLP:
.IF "ptrf"?"2"
MOVE.W -(A5),A0 ; get address of thunk
.ELSE
MOVE.L -(A5),A0 ; get address of thunk
.ENDIF
CMP.W #0x4E71,A0 ; NOP may pad region
BEQ XDBF
JSR (A0) ; call exit thunk
XDBF: DBF D7,XLP ; up to 256K in inner loop
SUB.L #$10000,D7 ; rest in outer loop
BHS XLP
.ENDIF
DONE BRA DONE ; loop if main ever returns
;**********************************************************************
; 检查控制寄存器
;**********************************************************************
SECTION code
.FDEF __Check_Register,0
__Check_Register:
.IF BDM_USED==0
MOVEC VBR,D0
TST.L D0
BNE ._ERR
CMP.W #$80C7,SIM_BASE+SIM_MCR
BNE ._ERR
CMP.B #$DC,SIM_BASE+SIM_SYPCR
BNE ._ERR
CMP.B #$FB,SIM_BASE+SIM_DDRE ;WAAA_NEW
BNE ._ERR
CMP.B #$04,SIM_BASE+SIM_PEPAR ;WAAA_NEW
BNE ._ERR
CMP.B #$EE,SIM_BASE+SIM_DDRF
BNE ._ERR
; CMP.B #$11,SIM_BASE+SIM_PFPAR
; BNE ._ERR
CMP.W #$3AFF,SIM_BASE+SIM_CSPAR0
BNE ._ERR
CMP.W #$03FD,SIM_BASE+SIM_CSPAR1
BNE ._ERR
CMP.W #D_ROM_SIZE,SIM_BASE+SIM_CSBARBT
BNE ._ERR
CMP.W #$6830,SIM_BASE+SIM_CSORBT
BNE ._ERR
CMP.W #D_RAM_CSBAR,SIM_BASE+SIM_CSBAR0
BNE ._ERR
CMP.W #D_RAM_CSBAR,SIM_BASE+SIM_CSBAR1
BNE ._ERR
CMP.W #D_RAM_CSBAR,SIM_BASE+SIM_CSBAR2
BNE ._ERR
CMP.W #$2007,SIM_BASE+SIM_CSBAR3
BNE ._ERR
CMP.W #$2007,SIM_BASE+SIM_CSBAR4
BNE ._ERR
CMP.W #$FF88,SIM_BASE+SIM_CSBAR5
BNE ._ERR
CMP.W #$FFF3,SIM_BASE+SIM_CSBAR6
BNE ._ERR
CMP.W #$FF80,SIM_BASE+SIM_CSBAR7
BNE ._ERR
CMP.W #$4101,SIM_BASE+SIM_CSBAR8
BNE ._ERR
CMP.W #$FFF0,SIM_BASE+SIM_CSBAR9
BNE ._ERR
CMP.W #$0006,SIM_BASE+SIM_CSBAR10
BNE ._ERR
CMP.W #$5030,SIM_BASE+SIM_CSOR0
BNE ._ERR
CMP.W #$3030,SIM_BASE+SIM_CSOR1
BNE ._ERR
CMP.W #$6830,SIM_BASE+SIM_CSOR2
BNE ._ERR
CMP.W #$7030,SIM_BASE+SIM_CSOR3
BNE ._ERR
CMP.W #$6830,SIM_BASE+SIM_CSOR4
BNE ._ERR
CMP.W #$6830,SIM_BASE+SIM_CSOR5
BNE ._ERR
CMP.W #$2809,SIM_BASE+SIM_CSOR6
BNE ._ERR
CMP.W #$6830,SIM_BASE+SIM_CSOR7
BNE ._ERR
CMP.W #$7870,SIM_BASE+SIM_CSOR8
BNE ._ERR
CMP.W #$6830,SIM_BASE+SIM_CSOR9
BNE ._ERR
CMP.W #$7030,SIM_BASE+SIM_CSOR10
BNE ._ERR
CMP.W #$0000,SIM_BASE+RAM_MCR
BNE ._ERR
CMP.W #D_IRAM_BAR,SIM_BASE+RAM_BAR
BNE ._ERR
CMP.W #$00CE,SIM_BASE+TPU_TMCR
BNE ._ERR
CMP.W #$0640,SIM_BASE+TPU_TICR
BNE ._ERR
CMP.W #$AAA8,SIM_BASE+TPU_CFSR0
BNE ._ERR
CMP.W #$8888,SIM_BASE+TPU_CFSR1
BNE ._ERR
CMP.W #$8888,SIM_BASE+TPU_CFSR2
BNE ._ERR
CMP.W #$888E,SIM_BASE+TPU_CFSR3
BNE ._ERR
CMP.W #$5400,SIM_BASE+TPU_HSQR0
BNE ._ERR
CMP.W #$0000,SIM_BASE+TPU_HSQR1
BNE ._ERR
CMP.W #$008F,SIM_BASE+TPU_PRAM0
BNE ._ERR
CMP.W #$00EC,SIM_BASE+TPU_PRAM0+4
BNE ._ERR
CMP.W #$A955,SIM_BASE+TPU_CPR0
BNE ._ERR
CMP.W #$5557,SIM_BASE+TPU_CPR1
BNE ._ERR
CMP.W #$008A,SIM_BASE+QSM_QMCR
BNE ._ERR
;CMP.B #$2d,SIM_BASE+QSM_QILR
;BNE ._ERR
CMP.B #$51,SIM_BASE+QSM_QIVR
BNE ._ERR
CMP.B #$FE,SIM_BASE+QSM_QDDR
BNE ._ERR
CMP.B #$7B,SIM_BASE+QSM_QPAR
BNE ._ERR
CMP.W #$0131,SIM_BASE+SIM_PITR
BNE ._ERR
.ENDIF
RTS
._ERR BRA.L __ResetCpu
._EXIT RTS
_RegisterErrorProcess:
BRA.L __ResetCpu
;**********************************************************************
; RESET VECTOR: to supervisor program space at address 0.
;**********************************************************************
SECTION reset
XDEF _INT_Vectors
_INT_Vectors:
DC.L STKTOP ; initial stack pointer
DC.L START ; initial execution address
;**********************************************************************
; OTHER EXCEPTION VECTORS: to supervisor data space at address 8,
; or 8 bytes beyond where the vector base register will point.
; This table is commented out because no actual interrupt rou-
; tines are provided.
;**********************************************************************
SECTION vectors
DC.L BUSERROR,ADRERROR ; 0x08
DC.L ILLEGAL,ZERODIV,CHK,TRAPV ; 0x10
DC.L PRIVILEGE,TRACE,EMULA,EMULF ; 0x20
DC.L RESVD,PROTO,FORMAT,UNINIT ; 0x30
DCB.L 8,RESVD ; 0x40
;DC.L _INT_Level_4_Auto,AUTO1,AUTO2,AUTO3 ; 0x60
DC.L SPURIOUS,AUTO1,AUTO2,AUTO3 ;WAAA_NEW
DC.L _INT_Level_4_Auto,AUTO5,AUTO6,AUTO7 ; 0x70
DC.L TRAP0,TRAP1,TRAP2,TRAP3 ; 0x80
DC.L TRAP4,TRAP5,TRAP6,TRAP7 ; 0x90
DC.L TRAP8,TRAP9,TRAPA,TRAPB ; 0xa0
DC.L TRAPC,TRAPD,TRAPE,TRAPF ; 0xb0
DC.L FUNORD,FNEXACT,FZERODIV,FUNFLOW ; 0xc0
DC.L FOPND,FOVFLOW,FSNAN,RESVD ; 0xd0
DCB.L 8,RESVD ; 0xe0
DC.L INT_TPU0,INT_TPU1,INT_TPU2,INT_TPU3 ; 0x100
DC.L INT_TPU4,INT_TPU5,INT_TPU6,INT_TPU7 ; 0x110
DC.L INT_TPU8,INT_TPU9,INT_TPUA,INT_TPUB ; 0x120
DC.L INT_TPUC,INT_TPUD,INT_TPUE,INT_TPUF ; 0x130
DC.L _INT_User_16,USER ; 0x140
DC.L USER
DCB.L 13,USER ; 0x148
DC.L _INT_Timer_Interrupt ; 0x180
DCB.L 159,USER ; 0x184
END
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