lh7a404_uart_driver.c

在sharp 404开发板的串口测试代码

            case UART_ENABLE:
                /* Enable or disable the UART */
                if ((INT_32) arg == 1)
                {
                    /* Enable UART */
                    uartregs->control |= UART_CNTL_EN;
                }
                else
                {
                    /* Disable UART */
                    uartregs->control &= ~UART_CNTL_EN;
                }
                break;

            case SIR_ENABLE:
                /* Enable or disable UART SIR mode */
                if (uartregs == UART1)
                {
                    /* Only valud on UART 1 */
                    if ((INT_32) arg == 1)
                    {
                        /* Enable UART SIR */
                        uartregs->control &= ~UART_CNTL_SIR_DIS;
                    }
                    else
                    {
                        /* Disable UART SIR */
                        uartregs->control |= UART_CNTL_SIR_DIS;
                    }
                }
                else
                {
                    /* Not valid on other UARTS */
                    status = SMA_BAD_PARAMS;
                }
                break;

            case UART_SET_BAUD_RATE:
                /* Set the bps rate */
                switch (arg)
                {
                    case BPS_2400:
                        uartregs->bcr = (UNS_32) UART_BCR_2400;
                        break;

                    case BPS_4800:
                        uartregs->bcr = (UNS_32) UART_BCR_4800;
                        break;

                    case BPS_9600:
                        uartregs->bcr = (UNS_32) UART_BCR_9600;
                        break;

                    case BPS_19200:
                        uartregs->bcr = (UNS_32) UART_BCR_19200;
                        break;

                    case BPS_28800:
                        uartregs->bcr = (UNS_32) UART_BCR_28800;
                        break;

                    case BPS_38400:
                        uartregs->bcr = (UNS_32) UART_BCR_38400;
                        break;

                    case BPS_57600:
                        uartregs->bcr = (UNS_32) UART_BCR_57600;
                        break;

                    case BPS_115200:
                        uartregs->bcr = (UNS_32) UART_BCR_115200;
                        break;

                    case BPS_153600:
                        uartregs->bcr = (UNS_32) UART_BCR_153600;
                        break;

                    case BPS_230400:
                        uartregs->bcr = (UNS_32) UART_BCR_230400;
                        break;

                    case BPS_460800:
                        uartregs->bcr = (UNS_32) UART_BCR_460800;
                        break;

                    case BPS_921600:
                        uartregs->bcr = (UNS_32) UART_BCR_921600;
                        break;
                        
                    default:
                        /* Baud bps rate */
                        status = SMA_BAD_PARAMS;
                }
                break;

            case UART_SET_DATA_BITS:
                /* Set the data bit width */
                if ((arg >= 5) && (arg <= 8))
                {
                    tmp1 = uartregs->lcr & ~UART_LCR_WLEN8;
                    uartregs->lcr = (tmp1 | UART_LCR_WLEN(arg));
                }
                else
                {
                    /* Baud data width */
                    status = SMA_BAD_PARAMS;
                }
                break;

            case UART_SET_PARITY:
                /* Set UART parity */
                switch (arg)
                {
                    case UART_PARITY_NONE:
                        /* Disable parity */
                        uartregs->lcr &= ~UART_LCR_PEN;
                        break;

                    case UART_PARITY_ODD:
                        /* Odd parity */
                        uartregs->lcr &= (UART_LCR_PEN | UART_LCR_PODD);
                        break;

                    case UART_PARITY_EVEN:
                        /* Even parity */
                        uartregs->lcr &= (UART_LCR_PEN |
                            UART_LCR_PEVEN);
                        break;
                    
                    default:
                        /* Baud parity */
                        status = SMA_BAD_PARAMS;
                }
                break;

            case UART_SET_STOP_BITS:
                /* Set the number of stop bits */
                if (arg == 1)
                {
                    /* 1 stop bit */
                    uartregs->lcr &= ~UART_LCR_STP2;
                }
                else if (arg == 2)
                {
                    /* 2 stop bits */
                    uartregs->lcr |= UART_LCR_STP2;
                }
                else
                {
                    /* Baud data width */
                    status = SMA_BAD_PARAMS;
                }
                break;

            case UART_ENABLE_FIFO:
                /* Enable or disable the FIFOs */
                if ((INT_32) arg == 1)
                {
                    /* Enable FIFOs */
                    uartregs->lcr |= UART_LCR_FEN;
                }
                else
                {
                    /* Disable FIFOs */
                    uartregs->lcr &= ~UART_LCR_FEN;
                }
                break;

            case UART_ENABLE_INTS:
                /* Enable selected interrupts */
                tmp1 = ((UNS_32) arg | uartregs->inte) &
                    (UART_INTR_RTI | UART_INTR_MI | UART_INTR_TI |
                    UART_INTR_RI | UART_INTR_OVI | UART_INTR_BEI |
                    UART_INTR_PEI | UART_INTR_FEI);
                uartregs->inte = tmp1;
                break;

            case UART_DISABLE_INTS:
                /* Disable selected interrupts */
                tmp1 = (UNS_32) arg & (UART_INTR_RTI | UART_INTR_MI |
                    UART_INTR_TI | UART_INTR_RI | UART_INTR_OVI |
                    UART_INTR_BEI | UART_INTR_PEI | UART_INTR_FEI);
                uartregs->inte &= ~tmp1;
                break;

            case UART_ASSERT_BREAK:
                /* Assert or de-assert a break */
                if (arg == 1)
                {
                    /* Assert break */
                    uartregs->lcr |= UART_LCR_SENDBRK;
                }
                else
                {
                    /* De-assert break */
                    uartregs->lcr &= ~UART_LCR_SENDBRK;
                }
                break;

            case UART_SET_LOOPBACK:
                /* Enable or disable loopback mode */
                if (arg == 1)
                {
                    /* Enable loopback mode */
                    uartregs->control |= UART_CNTL_LBE;
                }
                else
                {
                    /* Disable loopback mode */
                    uartregs->control &= ~UART_CNTL_LBE;
                }
                break;

            case UART_SET_MDM_POL:
                /* Set modem signal polarity */
                if (arg == 1)
                {
                    /* Set modem signal active high */
                    uartregs->control |= UART_CNTL_MXP;
                }
                else
                {
                    /* Set modem signal active low */
                    uartregs->control &= ~UART_CNTL_MXP;
                }
                break;

            case UART_SET_TX_POL:
                /* Set TX signal polarity */
                if (arg == 1)
                {
                    /* Set TX active high */
                    uartregs->control |= UART_CNTL_TXP;
                }
                else
                {
                    /* Set TX active low */
                    uartregs->control &= ~UART_CNTL_TXP;
                }
                break;

            case UART_SET_RX_POL:
                /* Set RX signal polarity */
                if (arg == 1)
                {
                    /* Set RX active low */
                    uartregs->control |= UART_CNTL_RXP;
                }
                else
                {
                    /* Set RX active high */
                    uartregs->control &= ~UART_CNTL_RXP;
                }
                break;

            case SIR_SET_BLANKING:
                /* Enable or disable SIR blanking */
                if (arg == 1)
                {
                    /* Disable SIR blanking */
                    uartregs->control |= UART_CNTL_SIRBD;
                }
                else
                {
                    /* Enable SIR blanking */
                    uartregs->control &= ~UART_CNTL_SIRBD;
                }
                break;

            case SIR_SET_LOWPOWER:
                /* Enables or disables SIR low power mode */
                if (arg == 1)
                {
                    /* Enable SIR low power mode */
                    uartregs->control |= UART_CNTL_SIRLP;
                }
                else
                {
                    /* Disable SIR low power mode */
                    uartregs->control &= ~UART_CNTL_SIRLP;
                }
                break;

            case UART_GET_STATUS:
                /* Return a UART status */
                switch (arg)
                {
                    case UART_ENABLE_ST:
                        /* Return UART enabled status */
                        if ((uartregs->control & UART_CNTL_EN) != 0)
                        {
                            /* UART is enabled */
                            status = 1;
                        }
                        else
                        {
                            /* UART is disabled */
                            status = 0;
                        }
                        break;

                    case SIR_ENABLE_ST:
                        /* Return UART SIR enabled status */
                        if ((uartregs->control &
                            UART_CNTL_SIR_DIS) != 0)
                        {
                            /* UART SIR is enabled */
                            status = 1;
                        }
                        else
                        {
                            /* UART SIR  is disabled */
                            status = 0;
                        }
                        break;

                    case UART_BAUD_RATE:
                        /* Return the baud rate enumeration */
                        switch (uartregs->bcr)
                        {
                            case UART_BCR_2400:
                                status = BPS_2400;
                                break;

                            case UART_BCR_4800:
                                status = BPS_4800;
                                break;

                            case UART_BCR_9600:
                                status = BPS_9600;
                                break;

                            case UART_BCR_19200:
                                status = BPS_19200;
                                break;

                            case UART_BCR_28800:
                                status = BPS_28800;
                                break;

                            case UART_BCR_38400:
                                status = BPS_38400;
                                break;

                            case UART_BCR_57600:
                                status = BPS_57600;
                                break;

                            case UART_BCR_115200:
                                status = BPS_115200;
                                break;

                            case UART_BCR_153600:
                                status = BPS_153600;
                                break;

                            case UART_BCR_230400:
                                status = BPS_230400;
                                break;

                            case UART_BCR_460800:
                                status = BPS_460800;
                                break;

                            default:
                                /* Unknown bps rate */
                                status = _ERROR;
                                break;
                        }
                        break;

                    case UART_DATA_BITS:
                        /* Return the number of data bits (5 to 8) */
                        switch (uartregs->lcr & UART_LCR_WLEN8)
                        {
                            case UART_LCR_WLEN5:
                                status = 5;
                                break;

                            case UART_LCR_WLEN6:
                                status = 6;
                                break;

                            case UART_LCR_WLEN7:
                                status = 7;
                                break;

                            case UART_LCR_WLEN8:
                            default:
                                status = 8;
                                break;
                        }
                        break;

                    case UART_PARITY:
                        /* Return selected parity */
                        if ((uartregs->lcr & UART_LCR_PEN) != 0)
                        {
                            /* Parity is enabled */
                            if ((uartregs->lcr & UART_LCR_PEVEN) != 0)
                            {
                                /* Even parity */
                                status = UART_PARITY_EVEN;
                            }
                            else
                            {
                                /* Odd parity */
                                status = UART_PARITY_ODD;
                            }
                        }
                        else
                        {
                            /* No parity */
                            status = UART_PARITY_NONE;
                        }
                        break;

                    case UART_STOP_BITS:
                        /* Return the number of stop bits */
                        if ((uartregs->lcr & UART_LCR_STP2) != 0)
                        {
                            /* 2 stop bits */
                            status = 2;
                        }
                        else
                        {
                            status = 1;
                        }
                        break;

                    case UART_INT_ST:
                        /* Return enabled interrupts */
                        status = uartregs->inte & (UART_INTR_RTI |
                            UART_INTR_MI | UART_INTR_TI | UART_INTR_RI |
                            UART_INTR_OVI | UART_INTR_BEI |
                            UART_INTR_PEI | UART_INTR_FEI);
                        break;

                    case UART_LOOPBACK_ST:
                        /* Returns Loopback mode enabled status */
                        if ((uartregs->lcr & UART_CNTL_LBE) != 0)
                        {
                            /* Loopback mode is enabled */
                            status = 1;
                        }
                        else
                        {
                            /* Loopback mode is disabled */
                            status = 0;
                        }
                        break;

                    case UART_MDM_POL_ST:
                        /* Returns modem polarity bit status */
                        if ((uartregs->lcr & UART_CNTL_MXP) != 0)