lh7a404_dcdc.h

在sharp 404开发板的串口测试代码

/***********************************************************************
 * $Workfile:   lh7a404_dcdc.h  $
 * $Revision:   1.0  $
 * $Author:   WellsK  $
 * $Date:   Jun 30 2003 16:28:50  $
 *
 * Project: LH7A404 DCDC definitions
 *
 * Description:
 *     This file contains the structure definitions and manifest
 *     constants for the LH7A404 component:
 *         DC-DC Converter (configurable dual-output)
 *
 * Revision History:
 * $Log:   //smaicnt2/pvcs/VM/sharpmcu/archives/sharpmcu/software/csps/lh7a404/include/lh7a404_dcdc.h-arc  $
 * 
 *    Rev 1.0   Jun 30 2003 16:28:50   WellsK
 * Initial revision.
 * 
 * 
 ***********************************************************************
 * SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
 * OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
 * AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES, 
 * SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
 *
 * SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY 
 * FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A 
 * SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
 * FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
 *
 * COPYRIGHT (C) 2001 SHARP MICROELECTRONICS OF THE AMERICAS, INC.
 *     CAMAS, WA
 **********************************************************************/

#ifndef LH7A404_DCDC_H
#define LH7A404_DCDC_H

#include "abl_types.h"
#include "lh7a404_chip.h"

/***********************************************************************
 * DC-DC Converter Register Structure
 **********************************************************************/

/* DCDC Module Register Structure */ 
typedef struct 
{
    volatile UNS_32 pmpcon;    /* DCDC Drive 0/1 config register */ 
    volatile UNS_32 reserved;  /* Reserved */
    volatile UNS_32 pmpfreq;   /* DCDC Frequency config register */ 
} DCDC_REGS_T;

/***********************************************************************
 * DC-DC duty cycle configuration register definitions
 **********************************************************************/

/* Drive 0, high drive state (nEXTPWR) duty cycle load macro */
#define DCDC_PMP_DRV0_DTYHI(n)   _SBF(0, ((n) & 0xF))
/* Drive 0, low drive state (nEXTPWR) duty cycle load macro */
#define DCDC_PMP_DRV0_DTYLO(n)   _SBF(4, ((n) & 0xF))
/* Drive 1, high drive state (nEXTPWR) duty cycle load macro */
#define DCDC_PMP_DRV1_DTYHI(n)   _SBF(8, ((n) & 0xF))
/* Drive 1, low drive state (nEXTPWR) duty cycle load macro */
#define DCDC_PMP_DRV1_DTYLO(n)   _SBF(12, ((n) & 0xF))

/***********************************************************************
 * DC-DC frequency configuration register definitions
 **********************************************************************/

/* Drive 0, high drive state (nEXTPWR) prescaler load macro */
#define DCDC_FREQ_DRV0_PREHI(n)  _SBF(0, ((n) & 0x7))
/* Drive 0, low drive state (nEXTPWR) prescaler load macro */
#define DCDC_FREQ_DRV0_PRELO(n)  _SBF(4, ((n) & 0x7))
/* Drive 1, high drive state (nEXTPWR) prescaler load macro */
#define DCDC_FREQ_DRV1_PREHI(n)  _SBF(8, ((n) & 0x7))
/* Drive 1, low drive state (nEXTPWR) prescaler load macro */
#define DCDC_FREQ_DRV1_PRELO(n)  _SBF(12, ((n) & 0x7))

/* Macro pointing to DC to DC converter registers */
#define DCDC    ((DCDC_REGS_T *)(DCDC_BASE))

#endif /* LH7A404_DCDC_H */