pic169xx.h

一个PIC的demo程序包

/*
 *	Header file for the Microchip
 *	PIC 16C923 chip
 *	PIC 16C924 chip
 *	Midrange Microcontroller
 */

static volatile unsigned char TMR0	@ 0x01;
static volatile unsigned char PCL	@ 0x02;
static volatile unsigned char STATUS	@ 0x03;
static          unsigned char FSR	@ 0x04;
static volatile unsigned char PORTA	@ 0x05;
static volatile unsigned char PORTB	@ 0x06;
static volatile unsigned char PORTC	@ 0x07;
static volatile unsigned char PORTD	@ 0x08;
static volatile unsigned char PORTE	@ 0x09;
static          unsigned char PCLATH	@ 0x0A;
static volatile unsigned char INTCON	@ 0x0B;
static volatile unsigned char PIR1	@ 0x0C;
static volatile unsigned char TMR1L	@ 0x0E;
static volatile unsigned char TMR1H	@ 0x0F;
static volatile unsigned char T1CON	@ 0x10;
static volatile unsigned char TMR2	@ 0x11;
static volatile unsigned char T2CON	@ 0x12;
static volatile unsigned char SSPBUF	@ 0x13;
static volatile unsigned char SSPCON	@ 0x14;
static volatile unsigned char CCPR1L	@ 0x15;
static volatile unsigned char CCPR1H	@ 0x16;
static volatile unsigned char CCP1CON	@ 0x17;

	/*  Bank 1  */
static          unsigned char bank1	OPTION	@ 0x81;
static          unsigned char bank1	TRISA	@ 0x85;
static          unsigned char bank1	TRISB	@ 0x86;
static          unsigned char bank1	TRISC	@ 0x87;
static          unsigned char bank1	TRISD	@ 0x88;
static          unsigned char bank1	TRISE	@ 0x89;
static volatile unsigned char bank1	PIE1	@ 0x8C;
static volatile unsigned char bank1	PCON	@ 0x8E;
static volatile unsigned char bank1	PR2	@ 0x92;
static volatile unsigned char bank1	SSPADD	@ 0x93;
static volatile unsigned char bank1	SSPSTAT	@ 0x94;

	/*  Bank 2  */
static volatile unsigned char bank2	PORTF	@ 0x107;
static volatile unsigned char bank2	PORTG	@ 0x108;
static volatile unsigned char bank2	LCDSE	@ 0x10D;
static volatile unsigned char bank2	LCDPS	@ 0x10E;
static volatile unsigned char bank2	LCDCON	@ 0x10F;
static volatile unsigned char bank2	LCDD00	@ 0x110;
static volatile unsigned char bank2	LCDD01	@ 0x111;
static volatile unsigned char bank2	LCDD02	@ 0x112;
static volatile unsigned char bank2	LCDD03	@ 0x113;
static volatile unsigned char bank2	LCDD04	@ 0x114;
static volatile unsigned char bank2	LCDD05	@ 0x115;
static volatile unsigned char bank2	LCDD06	@ 0x116;
static volatile unsigned char bank2	LCDD07	@ 0x117;
static volatile unsigned char bank2	LCDD08	@ 0x118;
static volatile unsigned char bank2	LCDD09	@ 0x119;
static volatile unsigned char bank2	LCDD10	@ 0x11A;
static volatile unsigned char bank2	LCDD11	@ 0x11B;
static volatile unsigned char bank2	LCDD12	@ 0x11C;
static volatile unsigned char bank2	LCDD13	@ 0x11D;
static volatile unsigned char bank2	LCDD14	@ 0x11E;
static volatile unsigned char bank2	LCDD15	@ 0x11F;

	/*  Bank 3  */
static 		unsigned char bank3	TRISF	@ 0x187;
static 		unsigned char bank3	TRISG	@ 0x188;

#ifdef _16C924
	static volatile unsigned char ADRES	@ 0x1E;
	static volatile unsigned char ADCON0	@ 0x1F;
	static volatile unsigned char bank1	ADCON1	@ 0x9F;
	
	/*	ADCON0 bits	*/
	static bit	ADCS1	@ (unsigned)&ADCON0*8+7;
	static bit	ADCS0	@ (unsigned)&ADCON0*8+6;
	static bit	CHS2	@ (unsigned)&ADCON0*8+5;
	static bit	CHS1	@ (unsigned)&ADCON0*8+4;
	static bit	CHS0	@ (unsigned)&ADCON0*8+3;
	static bit	ADGO	@ (unsigned)&ADCON0*8+2;
	static bit	ADON	@ (unsigned)&ADCON0*8+0;

	/*	ADCON1 bits	*/
	static bank1 bit	PCFG2	@ (unsigned)&ADCON1*8+2;
	static bank1 bit	PCFG1	@ (unsigned)&ADCON1*8+1;
	static bank1 bit	PCFG0	@ (unsigned)&ADCON1*8+0;
#endif

/*	STATUS bits	*/
static bit      IRP     @ (unsigned)&STATUS*8+7;
static bit      RP1     @ (unsigned)&STATUS*8+6;
static bit      RP0     @ (unsigned)&STATUS*8+5;
static bit	TO	@ (unsigned)&STATUS*8+4;
static bit	PD	@ (unsigned)&STATUS*8+3;
static bit      ZERO    @ (unsigned)&STATUS*8+2;
static bit      DC      @ (unsigned)&STATUS*8+1;
static bit      CARRY   @ (unsigned)&STATUS*8+0;

/*      PORTA bits      */
static bit      RA5     @ (unsigned)&PORTA*8+5;
static bit      RA4     @ (unsigned)&PORTA*8+4;
static bit      RA3     @ (unsigned)&PORTA*8+3;
static bit      RA2     @ (unsigned)&PORTA*8+2;
static bit      RA1     @ (unsigned)&PORTA*8+1;
static bit      RA0     @ (unsigned)&PORTA*8+0;

/*      PORTB bits      */
static bit      RB7     @ (unsigned)&PORTB*8+7;
static bit      RB6     @ (unsigned)&PORTB*8+6;
static bit      RB5     @ (unsigned)&PORTB*8+5;
static bit      RB4     @ (unsigned)&PORTB*8+4;
static bit      RB3     @ (unsigned)&PORTB*8+3;
static bit      RB2     @ (unsigned)&PORTB*8+2;
static bit      RB1     @ (unsigned)&PORTB*8+1;
static bit      RB0     @ (unsigned)&PORTB*8+0;

/*      PORTC bits      */
static bit      RC5     @ (unsigned)&PORTC*8+5;
static bit      RC4     @ (unsigned)&PORTC*8+4;
static bit      RC3     @ (unsigned)&PORTC*8+3;
static bit      RC2     @ (unsigned)&PORTC*8+2;
static bit      RC1     @ (unsigned)&PORTC*8+1;
static bit      RC0     @ (unsigned)&PORTC*8+0;

/*      PORTD bits      */
static bit      RD7     @ (unsigned)&PORTD*8+7;
static bit      RD6     @ (unsigned)&PORTD*8+6;
static bit      RD5     @ (unsigned)&PORTD*8+5;
static bit      RD4     @ (unsigned)&PORTD*8+4;
static bit      RD3     @ (unsigned)&PORTD*8+3;
static bit      RD2     @ (unsigned)&PORTD*8+2;
static bit      RD1     @ (unsigned)&PORTD*8+1;
static bit      RD0     @ (unsigned)&PORTD*8+0;

/*      PORTE bits      */
static bit      RE7     @ (unsigned)&PORTE*8+7;
static bit      RE6     @ (unsigned)&PORTE*8+6;
static bit      RE5     @ (unsigned)&PORTE*8+5;
static bit      RE4     @ (unsigned)&PORTE*8+4;
static bit      RE3     @ (unsigned)&PORTE*8+3;
static bit      RE2     @ (unsigned)&PORTE*8+2;
static bit      RE1     @ (unsigned)&PORTE*8+1;
static bit      RE0     @ (unsigned)&PORTE*8+0;

/*	INTCON bits	*/
static bit	GIE	@ (unsigned)&INTCON*8+7;
static bit	PEIE	@ (unsigned)&INTCON*8+6;
static bit	T0IE	@ (unsigned)&INTCON*8+5;
static bit	INTE	@ (unsigned)&INTCON*8+4;
static bit	RBIE	@ (unsigned)&INTCON*8+3;
static bit	T0IF	@ (unsigned)&INTCON*8+2;
static bit	INTF	@ (unsigned)&INTCON*8+1;
static bit	RBIF	@ (unsigned)&INTCON*8+0;

/*	PIR1 bits	*/
static bit	LCDIF	@ (unsigned)&PIR1*8+7;
#ifdef _16C924
static bit	ADIF	@ (unsigned)&PIR1*8+6;
#endif
static bit	SSPIF	@ (unsigned)&PIR1*8+3;
static bit	CCP1IF	@ (unsigned)&PIR1*8+2;
static bit	TMR2IF	@ (unsigned)&PIR1*8+1;
static bit	TMR1IF	@ (unsigned)&PIR1*8+0;

/*	T1CON bits	*/
static bit	T1CKPS1	@ (unsigned)&T1CON*8+5;
static bit	T1CKPS0	@ (unsigned)&T1CON*8+4;
static bit	T1OSCEN	@ (unsigned)&T1CON*8+3;
static bit	T1SYNC	@ (unsigned)&T1CON*8+2;
static bit	TMR1CS	@ (unsigned)&T1CON*8+1;
static bit	TMR1ON	@ (unsigned)&T1CON*8+0;

/*	T2CON bits	*/
static bit	TOUTPS3	@ (unsigned)&T2CON*8+6;
static bit	TOUTPS2	@ (unsigned)&T2CON*8+5;
static bit	TOUTPS1	@ (unsigned)&T2CON*8+4;
static bit	TOUTPS0	@ (unsigned)&T2CON*8+3;
static bit	TMR2ON	@ (unsigned)&T2CON*8+2;
static bit	T2CKPS1	@ (unsigned)&T2CON*8+1;
static bit	T2CKPS0	@ (unsigned)&T2CON*8+0;

/*	SSPCON bits	*/
static bit	WCOL	@ (unsigned)&SSPCON*8+7;
static bit	SSPOV	@ (unsigned)&SSPCON*8+6;
static bit	SSPEN	@ (unsigned)&SSPCON*8+5;
static bit	CKP	@ (unsigned)&SSPCON*8+4;
static bit	SSPM3	@ (unsigned)&SSPCON*8+3;
static bit	SSPM2	@ (unsigned)&SSPCON*8+2;
static bit	SSPM1	@ (unsigned)&SSPCON*8+1;
static bit	SSPM0	@ (unsigned)&SSPCON*8+0;

/*	CCP1CON bits	*/
static bit	CCP1X	@ (unsigned)&CCP1CON*8+5;
static bit	CCPIY	@ (unsigned)&CCP1CON*8+4;
static bit	CCP1M3	@ (unsigned)&CCP1CON*8+3;
static bit	CCP1M2	@ (unsigned)&CCP1CON*8+2;
static bit	CCP1M1	@ (unsigned)&CCP1CON*8+1;
static bit	CCP1M0	@ (unsigned)&CCP1CON*8+0;

/*	OPTION bits	*/
static bank1 bit	RBPU	@ (unsigned)&OPTION*8+7;
static bank1 bit	INTEDG	@ (unsigned)&OPTION*8+6;
static bank1 bit	T0CS	@ (unsigned)&OPTION*8+5;
static bank1 bit	T0SE	@ (unsigned)&OPTION*8+4;
static bank1 bit	PSA	@ (unsigned)&OPTION*8+3;
static bank1 bit	PS2	@ (unsigned)&OPTION*8+2;
static bank1 bit	PS1	@ (unsigned)&OPTION*8+1;
static bank1 bit	PS0	@ (unsigned)&OPTION*8+0;

/*      TRISA bits      */
static bank1 bit        TRISA5  @ (unsigned)&TRISA*8+5;
static bank1 bit        TRISA4  @ (unsigned)&TRISA*8+4;
static bank1 bit        TRISA3  @ (unsigned)&TRISA*8+3;
static bank1 bit        TRISA2  @ (unsigned)&TRISA*8+2;
static bank1 bit        TRISA1  @ (unsigned)&TRISA*8+1;
static bank1 bit        TRISA0  @ (unsigned)&TRISA*8+0;

/*      TRISB bits      */
static bank1 bit        TRISB7  @ (unsigned)&TRISB*8+7;
static bank1 bit        TRISB6  @ (unsigned)&TRISB*8+6;
static bank1 bit        TRISB5  @ (unsigned)&TRISB*8+5;
static bank1 bit        TRISB4  @ (unsigned)&TRISB*8+4;
static bank1 bit        TRISB3  @ (unsigned)&TRISB*8+3;
static bank1 bit        TRISB2  @ (unsigned)&TRISB*8+2;
static bank1 bit        TRISB1  @ (unsigned)&TRISB*8+1;
static bank1 bit        TRISB0  @ (unsigned)&TRISB*8+0;

/*      TRISC bits      */
static bank1 bit        TRISC5  @ (unsigned)&TRISC*8+5;
static bank1 bit        TRISC4  @ (unsigned)&TRISC*8+4;
static bank1 bit        TRISC3  @ (unsigned)&TRISC*8+3;
static bank1 bit        TRISC2  @ (unsigned)&TRISC*8+2;
static bank1 bit        TRISC1  @ (unsigned)&TRISC*8+1;
static bank1 bit        TRISC0  @ (unsigned)&TRISC*8+0;

/*      TRISD bits      */
static bank1 bit        TRISD7  @ (unsigned)&TRISD*8+7;
static bank1 bit        TRISD6  @ (unsigned)&TRISD*8+6;
static bank1 bit        TRISD5  @ (unsigned)&TRISD*8+5;
static bank1 bit        TRISD4  @ (unsigned)&TRISD*8+4;
static bank1 bit        TRISD3  @ (unsigned)&TRISD*8+3;
static bank1 bit        TRISD2  @ (unsigned)&TRISD*8+2;
static bank1 bit        TRISD1  @ (unsigned)&TRISD*8+1;
static bank1 bit        TRISD0  @ (unsigned)&TRISD*8+0;

/*      TRISE bits      */
static bank1 bit        TRISE7  @ (unsigned)&TRISE*8+7;
static bank1 bit        TRISE6  @ (unsigned)&TRISE*8+6;
static bank1 bit        TRISE5  @ (unsigned)&TRISE*8+5;
static bank1 bit        TRISE4  @ (unsigned)&TRISE*8+4;
static bank1 bit        TRISE3  @ (unsigned)&TRISE*8+3;
static bank1 bit        TRISE2  @ (unsigned)&TRISE*8+2;
static bank1 bit        TRISE1  @ (unsigned)&TRISE*8+1;
static bank1 bit        TRISE0  @ (unsigned)&TRISE*8+0;