pic1267x.h

一个PIC的demo程序包

/*
 *	Header file for the Microchip 
 *	PIC 12C671 chip
 *	PIC 12C672 chip
 *	Midrange Microcontrollers
 */

static volatile unsigned char	RTCC	@ 0x01;
static volatile unsigned char	TMR0	@ 0x01;
static volatile unsigned char	PCL	@ 0x02;
static volatile unsigned char	STATUS	@ 0x03;
static 		unsigned char	FSR	@ 0x04;
static volatile unsigned char	GPIO	@ 0x05;
static 		unsigned char	PCLATH	@ 0x0A;
static volatile unsigned char	INTCON	@ 0x0B;
static volatile unsigned char	PIR1	@ 0x0C;
static volatile unsigned char	ADRES	@ 0x1E;
static volatile unsigned char	ADCON0	@ 0x1F;

static 		unsigned char bank1	OPTION	@ 0x81;
static 		unsigned char bank1	TRIS	@ 0x85;
static volatile unsigned char bank1	PIE1	@ 0x8C;
static volatile unsigned char bank1	PCON	@ 0x8E;
static volatile unsigned char bank1	OSCCAL	@ 0x8F;
static volatile unsigned char bank1	ADCON1	@ 0x9F;

/*	STATUS bits	*/
static bit	RP0	@ (unsigned)&STATUS*8+5;
static bit	TO	@ (unsigned)&STATUS*8+4;
static bit	PD	@ (unsigned)&STATUS*8+3;
static bit	ZERO	@ (unsigned)&STATUS*8+2;
static bit	DC	@ (unsigned)&STATUS*8+1;
static bit	CARRY	@ (unsigned)&STATUS*8+0;

/*	GPIO bits	*/
static bit	GP5	@ (unsigned)&GPIO*8+5;
static bit	GP4	@ (unsigned)&GPIO*8+4;
static bit	GP3	@ (unsigned)&GPIO*8+3;
static bit	GP2	@ (unsigned)&GPIO*8+2;
static bit	GP1	@ (unsigned)&GPIO*8+1;
static bit	GP0	@ (unsigned)&GPIO*8+0;

/*	INTCON bits	*/
static bit	GIE	@ (unsigned)&INTCON*8+7;
static bit	PEIE	@ (unsigned)&INTCON*8+6;
static bit	T0IE	@ (unsigned)&INTCON*8+5;
static bit	INTE	@ (unsigned)&INTCON*8+4;
static bit	GPIE	@ (unsigned)&INTCON*8+3;
static bit	T0IF	@ (unsigned)&INTCON*8+2;
static bit	INTF	@ (unsigned)&INTCON*8+1;
static bit	GPIF	@ (unsigned)&INTCON*8+0;

/*	PIR1 bits */
static bit	ADIF	@ (unsigned)&PIR1*8+6;

/*	ADCON0 bits	*/
static bit	ADCS1	@ (unsigned)&ADCON0*8+7;
static bit	ADCS0	@ (unsigned)&ADCON0*8+6;
static bit	CHS1	@ (unsigned)&ADCON0*8+4;
static bit	CHS0	@ (unsigned)&ADCON0*8+3;
static bit	GODONE	@ (unsigned)&ADCON0*8+2;
static bit	ADON	@ (unsigned)&ADCON0*8+0;

/*	OPTION bits	*/
static bank1 bit	GPPU	@ (unsigned)&OPTION*8+7;
static bank1 bit	INTEDG	@ (unsigned)&OPTION*8+6;
static bank1 bit	T0CS	@ (unsigned)&OPTION*8+5;
static bank1 bit	T0SE	@ (unsigned)&OPTION*8+4;
static bank1 bit	PSA	@ (unsigned)&OPTION*8+3;
static bank1 bit	PS2	@ (unsigned)&OPTION*8+2;
static bank1 bit	PS1	@ (unsigned)&OPTION*8+1;
static bank1 bit	PS0	@ (unsigned)&OPTION*8+0;

/*      TRIS bits      */
static bank1 bit        TRIS5  @ (unsigned)&TRIS*8+5;
static bank1 bit        TRIS4  @ (unsigned)&TRIS*8+4;
static bank1 bit        TRIS3  @ (unsigned)&TRIS*8+3;
static bank1 bit        TRIS2  @ (unsigned)&TRIS*8+2;
static bank1 bit        TRIS1  @ (unsigned)&TRIS*8+1;
static bank1 bit        TRIS0  @ (unsigned)&TRIS*8+0;

/*	PIE1 bits	*/
static bank1 bit	ADIE	@ (unsigned)&PIE1*8+6;

/*	PCON bits */
static bank1 bit	POR	@ (unsigned)&PCON*8+1;

/*	OSCCAL bits */
static bank1 bit	CAL3	@ (unsigned)&OSCCAL*8+7;
static bank1 bit	CAL2	@ (unsigned)&OSCCAL*8+6;
static bank1 bit	CAL1	@ (unsigned)&OSCCAL*8+5;
static bank1 bit	CAL0	@ (unsigned)&OSCCAL*8+4;
static bank1 bit	CALFST	@ (unsigned)&OSCCAL*8+3;
static bank1 bit	CALSLW	@ (unsigned)&OSCCAL*8+2;

/*	ADCON1 bits */
static bank1 bit	PCFG2	@ (unsigned)&ADCON1*8+2;
static bank1 bit	PCFG1	@ (unsigned)&ADCON1*8+1;
static bank1 bit	PCFG0	@ (unsigned)&ADCON1*8+0;

/*	Calibration constant in ROM */

#ifdef	_12C671
#define	_READ_OSCCAL_DATA()	(*(unsigned char() *)0x3FF)()
#endif

#ifdef	_12C672
#define	_READ_OSCCAL_DATA()	(*(unsigned char() *)0x7FF)()
#endif

#define	CONFIG_ADDR	0x2007
#define FOSC0		0x01
#define	FOSC1		0x02
#define FOSC2		0x04
#define WDTE		0x08
#define PWRTE		0x10
#define CP0		0x20
#define CP1		0x40
#define MCLRE		0x80