dc21040reg.h

很好的一个嵌入式linux平台下的bootloader

#define	TULIP_BUSMODE_BURSTLEN_MASK	0x00003F00L
#define	TULIP_BUSMODE_BURSTLEN_DEFAULT	0x00000000L
#define	TULIP_BUSMODE_BURSTLEN_1LW	0x00000100L
#define	TULIP_BUSMODE_BURSTLEN_2LW	0x00000200L
#define	TULIP_BUSMODE_BURSTLEN_4LW	0x00000400L
#define	TULIP_BUSMODE_BURSTLEN_8LW	0x00000800L
#define	TULIP_BUSMODE_BURSTLEN_16LW	0x00001000L
#define	TULIP_BUSMODE_BURSTLEN_32LW	0x00002000L
#define	TULIP_BUSMODE_CACHE_NOALIGN	0x00000000L
#define	TULIP_BUSMODE_CACHE_ALIGN8	0x00004000L
#define	TULIP_BUSMODE_CACHE_ALIGN16	0x00008000L
#define	TULIP_BUSMODE_CACHE_ALIGN32	0x0000C000L
#define	TULIP_BUSMODE_TXPOLL_NEVER	0x00000000L
#define	TULIP_BUSMODE_TXPOLL_200000ns	0x00020000L
#define	TULIP_BUSMODE_TXPOLL_800000ns	0x00040000L
#define	TULIP_BUSMODE_TXPOLL_1600000ns	0x00060000L
#define	TULIP_BUSMODE_TXPOLL_12800ns	0x00080000L	/* 21041 only */
#define	TULIP_BUSMODE_TXPOLL_25600ns	0x000A0000L	/* 21041 only */
#define	TULIP_BUSMODE_TXPOLL_51200ns	0x000C0000L	/* 21041 only */
#define	TULIP_BUSMODE_TXPOLL_102400ns	0x000E0000L	/* 21041 only */
#define	TULIP_BUSMODE_DESC_BIGENDIAN	0x00100000L	/* 21041 only */
#define	TULIP_BUSMODE_READMULTIPLE	0x00200000L	/* */

#define	TULIP_REG_CFDA			0x40
#define	TULIP_CFDA_SLEEP		0x80000000L
#define	TULIP_CFDA_SNOOZE		0x40000000L

#define	TULIP_GP_PINSET			0x00000100L
/*
 * These are the definitions used for the DEC 21140
 * evaluation board.
 */
#define	TULIP_GP_EB_PINS		0x0000001F	/* General Purpose Pin directions */
#define	TULIP_GP_EB_OK10		0x00000080	/* 10 Mb/sec Signal Detect gep<7> */
#define	TULIP_GP_EB_OK100		0x00000040	/* 100 Mb/sec Signal Detect gep<6> */
#define	TULIP_GP_EB_INIT		0x0000000B	/* No loopback --- point-to-point */

/*
 * These are the defintitions used for the SMC9332 (21140) board.
 */
#define	TULIP_GP_SMC_9332_PINS		0x0000003F	/* General Purpose Pin directions */
#define	TULIP_GP_SMC_9332_OK10		0x00000080	/* 10 Mb/sec Signal Detect gep<7> */
#define	TULIP_GP_SMC_9332_OK100		0x00000040	/* 100 Mb/sec Signal Detect gep<6> */
#define	TULIP_GP_SMC_9332_INIT		0x00000009	/* No loopback --- point-to-point */

#define	TULIP_OUI_SMC_0			0x00
#define	TULIP_OUI_SMC_1			0x00
#define	TULIP_OUI_SMC_2			0xC0

/*
 * There are the definitions used for the DEC DE500
 * 10/100 family of boards
 */
#define	TULIP_GP_DE500_PINS		0x0000001FL
#define	TULIP_GP_DE500_LINK_PASS	0x00000080L
#define	TULIP_GP_DE500_SYM_LINK		0x00000040L
#define	TULIP_GP_DE500_SIGNAL_DETECT	0x00000020L
#define	TULIP_GP_DE500_PHY_RESET	0x00000010L
#define	TULIP_GP_DE500_HALFDUPLEX	0x00000008L
#define	TULIP_GP_DE500_PHY_LOOPBACK	0x00000004L
#define	TULIP_GP_DE500_FORCE_LED	0x00000002L
#define	TULIP_GP_DE500_FORCE_100	0x00000001L

/*
 * These are the defintitions used for the Cogent EM100
 * 21140 board.
 */
#define	TULIP_GP_EM100_PINS		0x0000003F	/* General Purpose Pin directions */
#define	TULIP_GP_EM100_INIT		0x00000009	/* No loopback --- point-to-point */
#define	TULIP_OUI_COGENT_0		0x00
#define	TULIP_OUI_COGENT_1		0x00
#define	TULIP_OUI_COGENT_2		0x92
#define	TULIP_COGENT_EM100TX_ID		0x12
#define	TULIP_COGENT_EM100FX_ID		0x15


/*
 * These are the defintitions used for the Znyx ZX342
 * 10/100 board
 */
#define	TULIP_OUI_ZNYX_0		0x00
#define	TULIP_OUI_ZNYX_1		0xC0
#define	TULIP_OUI_ZNYX_2		0x95

#define	TULIP_ZNYX_ID_ZX312		0x0602
#define	TULIP_ZNYX_ID_ZX312T		0x0622
#define	TULIP_ZNYX_ID_ZX314_INTA	0x0701
#define	TULIP_ZNYX_ID_ZX314		0x0711
#define	TULIP_ZNYX_ID_ZX315_INTA	0x0801
#define	TULIP_ZNYX_ID_ZX315		0x0811
#define	TULIP_ZNYX_ID_ZX342		0x0901
#define	TULIP_ZNYX_ID_ZX342B		0x0921
#define	TULIP_ZNYX_ID_ZX342_X3		0x0902
#define	TULIP_ZNYX_ID_ZX342_X4		0x0903
#define	TULIP_ZNYX_ID_ZX344		0x0A01
#define	TULIP_ZNYX_ID_ZX351		0x0B01
#define	TULIP_ZNYX_ID_ZX345		0x0C01
#define	TULIP_ZNYX_ID_ZX311		0x0D01
#define	TULIP_ZNYX_ID_ZX346		0x0E01

#define	TULIP_GP_ZX34X_PINS		0x0000001F	/* General Purpose Pin directions */
#define	TULIP_GP_ZX344_PINS		0x0000000B	/* General Purpose Pin directions */
#define	TULIP_GP_ZX345_PINS		0x00000003	/* General Purpose Pin directions */
#define	TULIP_GP_ZX346_PINS		0x00000043	/* General Purpose Pin directions */
#define	TULIP_GP_ZX34X_LNKFAIL		0x00000080	/* 10Mb/s Link Failure */
#define	TULIP_GP_ZX34X_SYMDET		0x00000040	/* 100Mb/s Symbol Detect */
#define	TULIP_GP_ZX345_PHYACT		0x00000040	/* PHY Activity */
#define	TULIP_GP_ZX34X_SIGDET		0x00000020	/* 100Mb/s Signal Detect */
#define	TULIP_GP_ZX346_AUTONEG_ENABLED	0x00000020	/* 802.3u autoneg enabled */
#define	TULIP_GP_ZX342_COLENA		0x00000008	/* 10t Ext LB */
#define	TULIP_GP_ZX344_ROTINT		0x00000008	/* PPB IRQ rotation */
#define	TULIP_GP_ZX345_SPEED10		0x00000008	/* 10Mb speed detect */
#define	TULIP_GP_ZX346_SPEED100		0x00000008	/* 100Mb speed detect */
#define	TULIP_GP_ZX34X_NCOLENA		0x00000004	/* 10t Int LB */
#define	TULIP_GP_ZX34X_RXMATCH		0x00000004	/* RX Match */
#define	TULIP_GP_ZX346_FULLDUPLEX	0x00000004	/* Full Duplex Sensed */
#define	TULIP_GP_ZX34X_LB102		0x00000002	/* 100tx twister LB */
#define	TULIP_GP_ZX34X_NLB101		0x00000001	/* PDT/PDR LB */
#define	TULIP_GP_ZX34X_INIT		0x00000009	

/*
 * Compex's OUI.  We need to twiddle a bit on their 21041 card.
 */
#define	TULIP_OUI_COMPEX_0		0x00
#define	TULIP_OUI_COMPEX_1		0x80
#define	TULIP_OUI_COMPEX_2		0x48
#define	TULIP_21041_COMPEX_XREGDATA	1

/*
 * Asante's OUI and stuff...
 */
#define TULIP_OUI_ASANTE_0		0x00
#define TULIP_OUI_ASANTE_1		0x00
#define TULIP_OUI_ASANTE_2		0x94
#define TULIP_GP_ASANTE_PINS		0x000000bf	/* GP pin config */
#define TULIP_GP_ASANTE_PHYRESET	0x00000008	/* Reset PHY */

/*
 * ACCTON EN1207 specialties
 */

#define TULIP_OUI_EN1207_0		0x00
#define TULIP_OUI_EN1207_1		0x00
#define TULIP_OUI_EN1207_2		0xE8

#define TULIP_CSR8_EN1207		0x08
#define TULIP_CSR9_EN1207		0x00
#define TULIP_CSR10_EN1207		0x03
#define TULIP_CSR11_EN1207		0x1F

#define TULIP_GP_EN1207_BNC_INIT        0x0000011B
#define TULIP_GP_EN1207_UTP_INIT        0x9E00000B
#define TULIP_GP_EN1207_100_INIT        0x6D00031B

/*
 * SROM definitions for the 21140 and 21041.
 */
#define	SROMXREG	0x0400
#define SROMSEL         0x0800
#define SROMRD          0x4000
#define SROMWR          0x2000
#define SROMDIN         0x0008
#define SROMDOUT        0x0004
#define SROMDOUTON      0x0004
#define SROMDOUTOFF     0x0004
#define SROMCLKON       0x0002
#define SROMCLKOFF      0x0002
#define SROMCSON        0x0001
#define SROMCSOFF       0x0001
#define SROMCS          0x0001

#define	SROMCMD_MODE	4
#define	SROMCMD_WR	5
#define	SROMCMD_RD	6

#define	SROM_BITWIDTH	6

/*
 * MII Definitions for the 21041 and 21140/21140A/21142
 */
#define	MII_PREAMBLE		(~0)
#define	MII_TEST		0xAAAAAAAA
#define	MII_RDCMD		0xF6		/* 1111.0110 */
#define	MII_WRCMD		0xF5		/* 1111.0101 */
#define	MII_DIN			0x00080000
#define	MII_RD			0x00040000
#define	MII_WR			0x00000000
#define	MII_DOUT		0x00020000
#define	MII_CLK			0x00010000
#define	MII_CLKON		MII_CLK
#define	MII_CLKOFF		MII_CLK

#define	PHYREG_CONTROL			0
#define	PHYREG_STATUS			1
#define	PHYREG_IDLOW			2
#define	PHYREG_IDHIGH			3
#define	PHYREG_AUTONEG_ADVERTISEMENT	4
#define	PHYREG_AUTONEG_ABILITIES	5
#define	PHYREG_AUTONEG_EXPANSION	6
#define	PHYREG_AUTONEG_NEXTPAGE		7

#define	PHYSTS_100BASET4	0x8000
#define	PHYSTS_100BASETX_FD	0x4000
#define	PHYSTS_100BASETX	0x2000
#define	PHYSTS_10BASET_FD	0x1000
#define	PHYSTS_10BASET		0x0800
#define	PHYSTS_AUTONEG_DONE	0x0020
#define	PHYSTS_REMOTE_FAULT	0x0010
#define	PHYSTS_CAN_AUTONEG	0x0008
#define	PHYSTS_LINK_UP		0x0004
#define	PHYSTS_JABBER_DETECT	0x0002
#define	PHYSTS_EXTENDED_REGS	0x0001

#define	PHYCTL_RESET		0x8000
#define PHYCTL_LOOPBACK		0x4000
#define	PHYCTL_SELECT_100MB	0x2000
#define	PHYCTL_AUTONEG_ENABLE	0x1000
#define PHYCTL_POWERDOWN	0x0800
#define	PHYCTL_ISOLATE		0x0400
#define	PHYCTL_AUTONEG_RESTART	0x0200
#define	PHYCTL_FULL_DUPLEX	0x0100
#define	PHYCTL_COLLISION	0x0080


#define MII_RD          0x00040000
#define MII_WR          0x00000000
#define MII_DIN         0x00080000
#define MII_DOUT        0x00020000
#define MII_DOUTON      MII_DOUT
#define MII_DOUTOFF     MII_DOUT
#define MII_CLK		0x00010000
#define MII_CLKON       MII_CLK
#define MII_CLKOFF      MII_CLK

/*
 * Definitions for the DE425.
 */
#define	DE425_CFID		0x08	/* Configuration Id */
#define	DE425_CFCS		0x0C	/* Configuration Command-Status */
#define	DE425_CFRV		0x18	/* Configuration Revision */
#define	DE425_CFLT		0x1C	/* Configuration Latency Timer */
#define	DE425_CBIO		0x28	/* Configuration Base IO Address */
#define	DE425_CFDA		0x2C	/* Configuration Driver Area */
#define	DE425_ENETROM_OFFSET	0xC90	/* Offset in I/O space for ENETROM */
#define	DE425_CFG0		0xC88	/* IRQ register */
#define	DE425_EISAID		0x10a34250 /* EISA device id */
#define	DE425_EISA_IOSIZE	0x100

#define	DEC_VENDORID		0x1011
#define	CHIPID_21040		0x0002
#define	CHIPID_21140		0x0009
#define	CHIPID_21041		0x0014
#define	CHIPID_21142		0x0019
#define	PCI_VENDORID(x)		((x) & 0xFFFF)
#define	PCI_CHIPID(x)		(((x) >> 16) & 0xFFFF)

/*
 * Generic SROM Format
 *
 *
 */

typedef struct {
    u_int8_t sh_idbuf[18];
    u_int8_t sh_version;
    u_int8_t sh_adapter_count;
    u_int8_t sh_ieee802_address[6];
} tulip_srom_header_t;

typedef struct {
    u_int8_t sai_device;
    u_int8_t sai_leaf_offset_lowbyte;
    u_int8_t sai_leaf_offset_highbyte;
} tulip_srom_adapter_info_t;

typedef enum {
    TULIP_SROM_CONNTYPE_10BASET			=0x0000,
    TULIP_SROM_CONNTYPE_BNC			=0x0001,
    TULIP_SROM_CONNTYPE_AUI			=0x0002,
    TULIP_SROM_CONNTYPE_100BASETX		=0x0003,
    TULIP_SROM_CONNTYPE_100BASET4		=0x0006,
    TULIP_SROM_CONNTYPE_100BASEFX		=0x0007,
    TULIP_SROM_CONNTYPE_MII_10BASET		=0x0009,
    TULIP_SROM_CONNTYPE_MII_100BASETX		=0x000D,
    TULIP_SROM_CONNTYPE_MII_100BASET4		=0x000F,
    TULIP_SROM_CONNTYPE_MII_100BASEFX		=0x0010,
    TULIP_SROM_CONNTYPE_10BASET_NWAY		=0x0100,
    TULIP_SROM_CONNTYPE_10BASET_FD		=0x0204,
    TULIP_SROM_CONNTYPE_MII_10BASET_FD		=0x020A,
    TULIP_SROM_CONNTYPE_100BASETX_FD		=0x020E,
    TULIP_SROM_CONNTYPE_MII_100BASETX_FD	=0x0211,
    TULIP_SROM_CONNTYPE_10BASET_NOLINKPASS	=0x0400,
    TULIP_SROM_CONNTYPE_AUTOSENSE		=0x0800,
    TULIP_SROM_CONNTYPE_AUTOSENSE_POWERUP	=0x8800,
    TULIP_SROM_CONNTYPE_AUTOSENSE_NWAY		=0x9000,
    TULIP_SROM_CONNTYPE_NOT_USED		=0xFFFF
} tulip_srom_connection_t;

typedef enum {
    TULIP_SROM_MEDIA_10BASET			=0x0000,
    TULIP_SROM_MEDIA_BNC			=0x0001,
    TULIP_SROM_MEDIA_AUI			=0x0002,
    TULIP_SROM_MEDIA_100BASETX			=0x0003,
    TULIP_SROM_MEDIA_10BASET_FD			=0x0004,
    TULIP_SROM_MEDIA_100BASETX_FD		=0x0005,
    TULIP_SROM_MEDIA_100BASET4			=0x0006,
    TULIP_SROM_MEDIA_100BASEFX			=0x0007,
    TULIP_SROM_MEDIA_100BASEFX_FD		=0x0008
} tulip_srom_media_t;

#define	TULIP_SROM_21041_EXTENDED	0x40

#define	TULIP_SROM_2114X_NOINDICATOR	0x8000
#define	TULIP_SROM_2114X_DEFAULT	0x4000
#define	TULIP_SROM_2114X_POLARITY	0x0080
#define	TULIP_SROM_2114X_CMDBITS(n)	(((n) & 0x0071) << 18)
#define	TULIP_SROM_2114X_BITPOS(b)	(1 << (((b) & 0x0E) >> 1))



#endif /* !defined(_DC21040_H) */