📄 if_devar.h
字号:
/* $OpenBSD: if_devar.h,v 1.5 1997/11/16 07:41:27 millert Exp $ *//* $NetBSD: if_devar.h,v 1.13 1997/06/08 18:46:36 thorpej Exp $ *//*- * Copyright (c) 1994-1997 Matt Thomas (matt@3am-software.com) * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. The name of the author may not be used to endorse or promote products * derived from this software withough specific prior written permission * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Id: if_devar.h,v 1.23 1997/06/03 18:51:16 thomas Exp */#if !defined(_DEVAR_H)#define _DEVAR_H#if defined(__OpenBSD__)#define __BROKEN_INDIRECT_CONFIG#endif#if defined(__NetBSD__) || defined(__OpenBSD__)typedef bus_addr_t tulip_csrptr_t;#define TULIP_CSR_READ(sc, csr) \ bus_space_read_4((sc)->tulip_bustag, (sc)->tulip_bushandle, (sc)->tulip_csrs.csr)#define TULIP_CSR_WRITE(sc, csr, val) \ bus_space_write_4((sc)->tulip_bustag, (sc)->tulip_bushandle, (sc)->tulip_csrs.csr, (val))#define TULIP_CSR_READBYTE(sc, csr) \ bus_space_read_1((sc)->tulip_bustag, (sc)->tulip_bushandle, (sc)->tulip_csrs.csr)#define TULIP_CSR_WRITEBYTE(sc, csr, val) \ bus_space_write_1((sc)->tulip_bustag, (sc)->tulip_bushandle, (sc)->tulip_csrs.csr, (val))#endif /* __NetBSD__ */#ifdef TULIP_IOMAPPED#define TULIP_EISA_CSRSIZE 16#define TULIP_EISA_CSROFFSET 0#define TULIP_PCI_CSRSIZE 8#define TULIP_PCI_CSROFFSET 0#if !defined(__NetBSD__) && !defined(__OpenBSD__)typedef u_int16_t tulip_csrptr_t;#define TULIP_CSR_READ(sc, csr) (inl((sc)->tulip_csrs.csr))#define TULIP_CSR_WRITE(sc, csr, val) outl((sc)->tulip_csrs.csr, val)#define TULIP_CSR_READBYTE(sc, csr) (inb((sc)->tulip_csrs.csr))#define TULIP_CSR_WRITEBYTE(sc, csr, val) outb((sc)->tulip_csrs.csr, val)#endif /* __NetBSD__ */#else /* TULIP_IOMAPPED */#define TULIP_PCI_CSRSIZE 2#define TULIP_PCI_CSROFFSET 0#if !defined(__NetBSD__) && !defined(__OpenBSD__)typedef volatile u_int32_t *tulip_csrptr_t;/* host <-> little endian conversion */#if #endian(little)#define ltohl(x) (x)#define ltohs(x) (x)#define htoll(x) (x)#define htols(x) (x)#else#define ltohl(x) \ ({ \ unsigned long v = x; \ ((v & 0x000000ff) << 24) | \ ((v & 0x0000ff00) << 8) | \ ((v >> 8) & 0x0000ff00) | \ ((v >> 24) & 0x000000ff); \ })#define ltohs(x) \ ({ \ unsigned short v = x; \ (((v << 8) & 0xff00) | \ ((v >> 8) & 0x00ff)); \ })#define htoll(x) ltohl(x)#define htols(x) ltohs(x)#endif/* * macros to read and write CSRs. Note that the "0 +" in * READ_CSR is to prevent the macro from being an lvalue * and WRITE_CSR shouldn't be assigned from. */#define TULIP_CSR_READ(sc, csr) (0 + ltohl(*(sc)->tulip_csrs.csr))#define TULIP_CSR_WRITE(sc, csr, val) ((void)(*(sc)->tulip_csrs.csr = htoll(val)))#endif /* __NetBSD__ */#endif /* TULIP_IOMAPPED *//* * Swap macro to access certain data types. */#if BYTE_ORDER == BIG_ENDIAN__inline__ static u_int32_tFILT_SWAP(x) u_int32_t x;{ u_int32_t s; s = x; s = s << 16; return s;}#else#define FILT_SWAP(x) (x)#endif/* * This structure contains "pointers" for the registers on * the various 21x4x chips. CSR0 through CSR8 are common * to all chips. After that, it gets messy... */typedef struct { tulip_csrptr_t csr_busmode; /* CSR0 */ tulip_csrptr_t csr_txpoll; /* CSR1 */ tulip_csrptr_t csr_rxpoll; /* CSR2 */ tulip_csrptr_t csr_rxlist; /* CSR3 */ tulip_csrptr_t csr_txlist; /* CSR4 */ tulip_csrptr_t csr_status; /* CSR5 */ tulip_csrptr_t csr_command; /* CSR6 */ tulip_csrptr_t csr_intr; /* CSR7 */ tulip_csrptr_t csr_missed_frames; /* CSR8 */ tulip_csrptr_t csr_9; /* CSR9 */ tulip_csrptr_t csr_10; /* CSR10 */ tulip_csrptr_t csr_11; /* CSR11 */ tulip_csrptr_t csr_12; /* CSR12 */ tulip_csrptr_t csr_13; /* CSR13 */ tulip_csrptr_t csr_14; /* CSR14 */ tulip_csrptr_t csr_15; /* CSR15 */} tulip_regfile_t;#define csr_enetrom csr_9 /* 21040 */#define csr_reserved csr_10 /* 21040 */#define csr_full_duplex csr_11 /* 21040 */#define csr_bootrom csr_10 /* 21041/21140A/?? */#define csr_gp csr_12 /* 21140* */#define csr_watchdog csr_15 /* 21140* */#define csr_gp_timer csr_11 /* 21041/21140* */#define csr_srom_mii csr_9 /* 21041/21140* */#define csr_sia_status csr_12 /* 2104x */#define csr_sia_connectivity csr_13 /* 2104x */#define csr_sia_tx_rx csr_14 /* 2104x */#define csr_sia_general csr_15 /* 2104x *//* * While 21x4x allows chaining of its descriptors, this driver * doesn't take advantage of it. We keep the descriptors in a * traditional FIFO ring. */typedef struct { tulip_desc_t *ri_first; /* first entry in ring */ tulip_desc_t *ri_last; /* one after last entry */ tulip_desc_t *ri_nextin; /* next to processed by host */ tulip_desc_t *ri_nextout; /* next to processed by adapter */ int ri_max; int ri_free;} tulip_ringinfo_t;/* * The 21040 has a stupid restriction in that the receive * buffers must be longword aligned. But since Ethernet * headers are not a multiple of longwords in size this forces * the data to non-longword aligned. Since IP requires the * data to be longword aligned, we need to copy it after it has * been DMA'ed in our memory. * * Since we have to copy it anyways, we might as well as allocate * dedicated receive space for the input. This allows to use a * small receive buffer size and more ring entries to be able to * better keep with a flood of tiny Ethernet packets. * * The receive space MUST ALWAYS be a multiple of the page size. * And the number of receive descriptors multiplied by the size * of the receive buffers must equal the recevive space. This * is so that we can manipulate the page tables so that even if a * packet wraps around the end of the receive space, we can * treat it as virtually contiguous. * * The above used to be true (the stupid restriction is still true) * but we gone to directly DMA'ing into MBUFs (unless it's on an * architecture which can't handle unaligned accesses) because with * 100Mb/s cards the copying is just too much of a hit. */#if defined(__alpha__) || defined(__mips)#define TULIP_COPY_RXDATA 1#endif#define TULIP_TXTIMER 4#define TULIP_RXDESCS 48#define TULIP_TXDESCS 128#define TULIP_RXQ_TARGET 32#if TULIP_RXQ_TARGET >= TULIP_RXDESCS#error TULIP_RXQ_TARGET must be less than TULIP_RXDESCS#endif#define TULIP_RX_BUFLEN ((MCLBYTES < 2048 ? MCLBYTES : 2048) - 16)/* * Forward reference to make C happy. */typedef struct _tulip_softc_t tulip_softc_t;/* * The various controllers support. Technically the DE425 is just * a 21040 on EISA. But since it remarkably difference from normal * 21040s, we give it its own chip id. */typedef enum { TULIP_21040, TULIP_DE425, TULIP_21041, TULIP_21140, TULIP_21140A, TULIP_21142, TULIP_21143, TULIP_CHIPID_UNKNOWN} tulip_chipid_t;/* * Various physical media types supported. * BNCAUI is BNC or AUI since on the 21040 you can't really tell * which is in use. */typedef enum { TULIP_MEDIA_UNKNOWN, TULIP_MEDIA_10BASET, TULIP_MEDIA_10BASET_FD, TULIP_MEDIA_BNC, TULIP_MEDIA_AUI, TULIP_MEDIA_EXTSIA, TULIP_MEDIA_AUIBNC, TULIP_MEDIA_100BASETX, TULIP_MEDIA_100BASETX_FD, TULIP_MEDIA_100BASET4, TULIP_MEDIA_100BASEFX, TULIP_MEDIA_100BASEFX_FD, TULIP_MEDIA_MAX} tulip_media_t;#define TULIP_BIT(b) (1L << ((int)(b)))#define TULIP_FDBIT(m) (1L << ((int)TULIP_MEDIA_ ## m ## _FD))#define TULIP_MBIT(m) (1L << ((int)TULIP_MEDIA_ ## m ))#define TULIP_IS_MEDIA_FD(m) (TULIP_BIT(m) & \ (TULIP_FDBIT(10BASET) \ |TULIP_FDBIT(100BASETX) \ |TULIP_FDBIT(100BASEFX)))#define TULIP_CAN_MEDIA_FD(m) (TULIP_BIT(m) & \ (TULIP_MBIT(10BASET) \ |TULIP_MBIT(100BASETX) \ |TULIP_MBIT(100BASEFX)))#define TULIP_FD_MEDIA_OF(m) ((tulip_media_t)((m) + 1))#define TULIP_HD_MEDIA_OF(m) ((tulip_media_t)((m) - 1))#define TULIP_IS_MEDIA_100MB(m) ((m) >= TULIP_MEDIA_100BASETX)#define TULIP_IS_MEDIA_TP(m) ((TULIP_BIT(m) & \ (TULIP_MBIT(BNC) \ |TULIP_MBIT(AUI) \ |TULIP_MBIT(AUIBNC) \ |TULIP_MBIT(EXTSIA))) == 0)#define TULIP_SROM_ATTR_MII 0x0100#define TULIP_SROM_ATTR_NWAY 0x0200#define TULIP_SROM_ATTR_AUTOSENSE 0x0400#define TULIP_SROM_ATTR_POWERUP 0x0800#define TULIP_SROM_ATTR_NOLINKPASS 0x1000typedef struct { enum { TULIP_MEDIAINFO_NONE, TULIP_MEDIAINFO_SIA, TULIP_MEDIAINFO_GPR, TULIP_MEDIAINFO_MII, TULIP_MEDIAINFO_RESET, TULIP_MEDIAINFO_SYM } mi_type; union { struct { u_int16_t sia_connectivity; u_int16_t sia_tx_rx; u_int16_t sia_general; u_int32_t sia_gp_control; /* 21142/21143 */ u_int32_t sia_gp_data; /* 21142/21143 */ } un_sia; struct { u_int32_t gpr_cmdmode; u_int32_t gpr_gpcontrol; /* 21142/21143 */ u_int32_t gpr_gpdata; u_int8_t gpr_actmask; u_int8_t gpr_actdata; u_int8_t gpr_default : 1; } un_gpr; struct { u_int32_t mii_mediamask; u_int16_t mii_capabilities; u_int16_t mii_advertisement; u_int16_t mii_full_duplex; u_int16_t mii_tx_threshold; u_int16_t mii_interrupt; /* 21142/21143 */ u_int8_t mii_phyaddr; u_int8_t mii_gpr_length; u_int8_t mii_gpr_offset; u_int8_t mii_reset_length; u_int8_t mii_reset_offset; u_int32_t mii_phyid; } un_mii; } mi_un;} tulip_media_info_t;#define mi_sia_connectivity mi_un.un_sia.sia_connectivity#define mi_sia_tx_rx mi_un.un_sia.sia_tx_rx#define mi_sia_general mi_un.un_sia.sia_general#define mi_sia_gp_control mi_un.un_sia.sia_gp_control#define mi_sia_gp_data mi_un.un_sia.sia_gp_data#define mi_gpcontrol mi_un.un_gpr.gpr_gpcontrol#define mi_gpdata mi_un.un_gpr.gpr_gpdata#define mi_actmask mi_un.un_gpr.gpr_actmask#define mi_actdata mi_un.un_gpr.gpr_actdata#define mi_default mi_un.un_gpr.gpr_default#define mi_cmdmode mi_un.un_gpr.gpr_cmdmode#define mi_phyaddr mi_un.un_mii.mii_phyaddr#define mi_gpr_length mi_un.un_mii.mii_gpr_length#define mi_gpr_offset mi_un.un_mii.mii_gpr_offset#define mi_reset_length mi_un.un_mii.mii_reset_length#define mi_reset_offset mi_un.un_mii.mii_reset_offset#define mi_capabilities mi_un.un_mii.mii_capabilities#define mi_advertisement mi_un.un_mii.mii_advertisement#define mi_full_duplex mi_un.un_mii.mii_full_duplex#define mi_tx_threshold mi_un.un_mii.mii_tx_threshold#define mi_mediamask mi_un.un_mii.mii_mediamask#define mi_mii_interrupt mi_un.un_mii.mii_interrupt#define mi_phyid mi_un.un_mii.mii_phyid#define TULIP_MEDIAINFO_SIA_INIT(sc, mi, chipid, media) do { \ (mi)->mi_type = TULIP_MEDIAINFO_SIA; \ sc->tulip_mediums[TULIP_MEDIA_ ## media] = (mi); \ (mi)->mi_sia_connectivity = TULIP_ ## chipid ## _SIACONN_ ## media; \ (mi)->mi_sia_tx_rx = TULIP_ ## chipid ## _SIATXRX_ ## media; \ (mi)->mi_sia_general = TULIP_ ## chipid ## _SIAGEN_ ## media; \} while (0)#define TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, media) do { \ if ((sc)->tulip_mediums[TULIP_MEDIA_ ## media] == NULL \ && ((mi)->mi_capabilities & PHYSTS_ ## media)) { \ (sc)->tulip_mediums[TULIP_MEDIA_ ## media] = (mi); \ (mi)->mi_mediamask |= TULIP_BIT(TULIP_MEDIA_ ## media); \ } \} while (0)#define TULIP_MII_NOPHY 32/* * Some boards need to treated specially. The following enumeration * identifies the cards with quirks (or those we just want to single * out for special merit or scorn). */typedef enum { TULIP_21040_GENERIC, /* Generic 21040 (works with most any board) */ TULIP_21140_ISV, /* Digital Semicondutor 21140 ISV SROM Format */ TULIP_21142_ISV, /* Digital Semicondutor 21142 ISV SROM Format */ TULIP_21143_ISV, /* Digital Semicondutor 21143 ISV SROM Format */
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -