ms_compile.c

一个用在mips体系结构中的操作系统

void mc_fp_s (uint inst, uint addr, INST *ip)
	{
	switch (inst & 0x3f)
		{
		case 0:
			ip->op = OPFADDS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 1:
			ip->op = OPFSUBS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 2:
			ip->op = OPFMULS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 3:
			ip->op = OPFDIVS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 4:
			ip->op = OPFSQRTS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 5:
			ip->op = OPFABSS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 6:
			ip->op = OPCPYC1;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 7:
			ip->op = OPFNEGS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		/* 8 - 11 unused */

		case 12:
			ip->op = OPFROUNDS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 13:
			ip->op = OPFTRUNCS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 14:
			ip->op = OPFCEILS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 15:
			ip->op = OPFFLOORS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		/* 16 - 32 unused */

		case 33:		/* CVT.D.S	*/
			ip->op = OPCVTDS;
			ip->r1 = DDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		/* 34 - 35 unused */

		case 36:		/* CVT.W.S	*/
			ip->op = OPCVTWS;
			ip->r1 = FDRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = DDRI(inst);
			ip->imm = 0;
			break;

		/* 37 - 47 unused */

		case 48:		/* C.F.S	*/
			ip->op = OPCFS;
			ip->r1 = CNDREG;
			ip->r2 = -1;
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 49:		/* C.UN.S	*/
			ip->op = OPCUNS;
			ip->r1 = CNDREG;
			ip->r2 = -1;
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 50:		/* C.EQ.S	*/
			ip->op = OPCEQS;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 51:		/* C.UEQ.S	*/
			ip->op = OPCUEQS;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 52:		/* C.OLT.S	*/
			ip->op = OPCOLTS;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 53:		/* C.ULT.S	*/
			ip->op = OPCULTS;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 54:		/* C.OLE.S	*/
			ip->op = OPCOLES;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 55:		/* C.ULE.S	*/
			ip->op = OPCULES;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 56:		/* C.SF.S	*/
			ip->op = OPCSFS;
			ip->r1 = CNDREG;
			ip->r2 = -1;
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 57:		/* C.NGLE.S	*/
			ip->op = OPCNGLES;
			ip->r1 = CNDREG;
			ip->r2 = -1;
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 58:		/* C.SEQ.S	*/
			ip->op = OPCSEQS;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 59:		/* C.NGL.S	*/
			ip->op = OPCNGLS;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 60:		/* C.LT.S	*/
			ip->op = OPCLTS;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 61:		/* C.NGE.S	*/
			ip->op = OPCNGES;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 62:		/* C.LE.S	*/
			ip->op = OPCLES;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		case 63:		/* C.NGT.S	*/
			ip->op = OPCNGTS;
			ip->r1 = CNDREG;
			ip->r2 = FSRI(inst);
			ip->r3 = FTRI(inst);
			ip->imm = 0;
			break;

		default:
#ifdef PRINT_WARN
			fprintf (stderr, "Illegal instruction (undefined)\n");
			fprintf (stderr, "Location: 0x%8.8x\n", addr);
#endif
			ip->r1 = ip->r2 = ip->r3 = -1;
			ip->op = OPILL;
			break;
		}
	}


	/*
	 *  mc_fp_d  -  Double precision floating point operations
	 */

void mc_fp_d (uint inst, uint addr, INST *ip)
	{
	switch (inst & 0x3f)
		{
		case 0:
			ip->op = OPFADDD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 1:
			ip->op = OPFSUBD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 2:
			ip->op = OPFMULD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 3:
			ip->op = OPFDIVD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 4:
			ip->op = OPFSQRTD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 5:
			ip->op = OPFABSD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 6:
			ip->op = OPFMOVD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 7:
			ip->op = OPFNEGD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		/* 8 - 11 unused */

		case 12:
			ip->op = OPFROUNDD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 13:
			ip->op = OPFTRUNCD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 14:
			ip->op = OPFCEILD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 15:
			ip->op = OPFFLOORD;
			ip->r1 = DDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		/* 16 - 31 unused */

		case 32:		/* CVT.S.D	*/
			ip->op = OPCVTSD;
			ip->r1 = FDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = DDRI(inst);
			ip->imm = 0;
			break;

		/* 33 - 35 unused */

		case 36:		/* CVT.W.D	*/
			ip->op = OPCVTWD;
			ip->r1 = FDRI(inst);
			ip->r2 = DSRI(inst);
			ip->r3 = DDRI(inst);
			ip->imm = 0;
			break;

		/* 37 - 47 unused */

		case 48:		/* C.F.D	*/
			ip->op = OPCFS;
			ip->r1 = CNDREG;
			ip->r2 = -1;
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 49:		/* C.UN.D	*/
			ip->op = OPCUNS;
			ip->r1 = CNDREG;
			ip->r2 = -1;
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 50:		/* C.EQ.D	*/
			ip->op = OPCEQD;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 51:		/* C.UEQ.D	*/
			ip->op = OPCUEQD;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 52:		/* C.OLT.D	*/
			ip->op = OPCOLTD;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 53:		/* C.ULT.D	*/
			ip->op = OPCULTD;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 54:		/* C.OLE.D	*/
			ip->op = OPCOLED;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 55:		/* C.ULE.D	*/
			ip->op = OPCULED;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 56:		/* C.SF.D	*/
			ip->op = OPCSFS;
			ip->r1 = CNDREG;
			ip->r2 = -1;
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 57:		/* C.NGLE.D	*/
			ip->op = OPCNGLES;
			ip->r1 = CNDREG;
			ip->r2 = -1;
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 58:		/* C.SEQ.D	*/
			ip->op = OPCSEQD;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 59:		/* C.NGL.D	*/
			ip->op = OPCNGLD;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 60:		/* C.LT.D	*/
			ip->op = OPCLTD;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 61:		/* C.NGE.D	*/
			ip->op = OPCNGED;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 62:		/* C.LE.D	*/
			ip->op = OPCLED;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		case 63:		/* C.NGT.D	*/
			ip->op = OPCNGTD;
			ip->r1 = CNDREG;
			ip->r2 = DSRI(inst);
			ip->r3 = DTRI(inst);
			ip->imm = 0;
			break;

		default:
#ifdef PRINT_WARN
			fprintf (stderr, "Illegal instruction (undefined)\n");
			fprintf (stderr, "Location: 0x%8.8x\n", addr);
#endif
			ip->op = OPILL;
			ip->r1 = ip->r2 = ip->r3 = -1;
			break;
		}
	}



	/*
	 *  mc_cop0  -  Handle the coprocessor 0 
	 */

void mc_cop0 (uint inst, uint addr, INST *ip)
{
       ip->op = OPCP0;
        ip->r1 = -1;
        ip->r2 = -1;
        ip->r3 = -1;
        ip->imm = inst;
	switch ((inst >> 21) & 0x1f) {		
    	case 4:  /* move to C0processor */
	    ip->r2 = RTRI(inst);
            break;
        case 0:   /* move from C0 */
	    ip->r1 = RTRI(inst);
	    ip->op = OPCP0_SPEC;  /* Can speculative execute this one. */
            break;
         default:
           break;
	}
}