ms_compile.c

一个用在mips体系结构中的操作系统

		case 7:
			ip->op = OPSRAV;
			ip->r1 = RDRI(inst);
			ip->r2 = RTRI(inst);
			ip->r3 = RSRI(inst);
			ip->imm = 0;
			break;

		case 8:				/* Use JRET opcode to	*/
						/* identify subroutine	*/
						/* returns.		*/
			ip->r1 = -1;
			ip->r2 = RSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			ip->op = (ip->r2 == LP ? OPJRET : OPJR);
			branch_shadow = 1;
			break;

		case 9:
			ip->op = OPJALR;
			ip->r1 = RDRI(inst);
			ip->r2 = RSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			branch_shadow = 1;
			break;

		/* 10, 11 unused */

		case 12:
			ip->op = OPSYSCALL;
			ip->r1 = -1;
			ip->r2 = -1;
			ip->r3 = -1;
			ip->imm = 0;
			break;

			
		case 13:
			ip->op = OPBREAK;
			ip->r1 = -1;
			ip->r2 = -1;
			ip->r3 = -1;
			ip->imm = 0;
			break;

		/* 14 unused */

		case 15:				/* SYNC		*/
#ifdef PRINT_WARN
			fprintf (stderr, "SYNC instruction not supported\n");
			fprintf (stderr, "Location: 0x%8.8x\n", addr);
#endif
			ip->r1 = ip->r2 = ip->r3 = -1;
			ip->op = OPILL;
			break;

		case 16:
			ip->op = OPCPY;
			ip->r1 = RDRI(inst);
			ip->r2 = HIREG;
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 17:
			ip->op = OPHCPY;
			ip->r1 = HIREG;
			ip->r2 = RSRI(inst);
			ip->r3 = HILOREG;
			ip->imm = 0;
			break;

		case 18:
			ip->op = OPCPY;
			ip->r1 = RDRI(inst);
			ip->r2 = LOREG;
			ip->r3 = -1;
			ip->imm = 0;
			break;

		case 19:
			ip->op = OPHCPY;
			ip->r1 = LOREG;
			ip->r2 = RSRI(inst);
			ip->r3 = HILOREG;
			ip->imm = 0;
			break;

		/* 20 - 23 unused */

		case 24:
			ip->op = OPMULT;
			ip->r1 = HILOREG;
			ip->r2 = RTRI(inst);
			ip->r3 = RSRI(inst);
			ip->imm = 0;
			break;

		case 25:
			ip->op = OPMULTU;
			ip->r1 = HILOREG;
			ip->r2 = RTRI(inst);
			ip->r3 = RSRI(inst);
			ip->imm = 0;
			break;

		case 26:
			ip->op = OPDIV;
			ip->r1 = HILOREG;
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		case 27:
			ip->op = OPDIVU;
			ip->r1 = HILOREG;
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		/* 28 - 31 unused */

		case 32:
			ip->op = OPADD;
			ip->r1 = RDRI(inst);
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		case 33:
			ip->op = OPADDU;
			ip->r1 = RDRI(inst);
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		case 34:
			ip->op = OPSUB;
			ip->r1 = RDRI(inst);
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		case 35:
			ip->op = OPSUBU;
			ip->r1 = RDRI(inst);
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		case 36:
			ip->op = OPAND;
			ip->r1 = RDRI(inst);
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		case 37:
			ip->op = OPOR;
			ip->r1 = RDRI(inst);
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		case 38:
			ip->op = OPXOR;
			ip->r1 = RDRI(inst);
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		case 39:
			ip->op = OPNOR;
			ip->r1 = RDRI(inst);
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		/* 40, 41 unused */

		case 42:
			ip->op = OPSLT;
			ip->r1 = RDRI(inst);
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		case 43:
			ip->op = OPSLTU;
			ip->r1 = RDRI(inst);
			ip->r2 = RSRI(inst);
			ip->r3 = RTRI(inst);
			ip->imm = 0;
			break;

		/* 44 - 47 unused */

		case 48:				/* TGE		*/
		case 49:				/* TGEU		*/
		case 50:				/* TLT		*/
		case 51:				/* TLTU		*/
		case 52:				/* TEQ		*/
		case 54:				/* TNE		*/
#ifdef PRINT_WARN
			fprintf (stderr, "Trap instructions not supported\n");
			fprintf (stderr, "Location: 0x%8.8x\n", addr);
#endif
			ip->r1 = ip->r2 = ip->r3 = -1;
			ip->op = OPILL;
			break;

		/* 53, 55 - 63 unused */

		default:
#ifdef PRINT_WARN
			fprintf (stderr, "Illegal instruction (undefined)\n");
			fprintf (stderr, "Location: 0x%8.8x\n", addr);
#endif
			ip->r1 = ip->r2 = ip->r3 = -1;
			ip->op = OPILL;
			break;
		}

	return (branch_shadow);
	}


	/*
	 *  mc_regimm  -  Handle the register immediate opcodes
	 */

int mc_regimm (uint inst, uint addr, INST *ip)
	{
	int branch_shadow = 0;

	switch ((inst>>16) & 0x1f)
		{
		case 0:					/* BLTZ		*/
			ip->op = OPBLTZ;
			ip->r1 = -1;
			ip->r2 = RSRI(inst);
			ip->r3 = -1;
			ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
					(addr+4) + ((inst&0x0000ffff) << 2) );
			branch_shadow = 1;
			break;

		case 1:					/* BGEZ		*/
			ip->op = OPBGEZ;
			ip->r1 = -1;
			ip->r2 = RSRI(inst);
			ip->r3 = -1;
			ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
					(addr+4) + ((inst&0x0000ffff) << 2) );
			branch_shadow = 1;
			break;

		case 2:					/* BLTZL	*/
			ip->op = OPBLTZL;
			ip->r1 = -1;
			ip->r2 = RSRI(inst);
			ip->r3 = -1;
			ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
					(addr+4) + ((inst&0x0000ffff) << 2) );
			branch_shadow = 1;
			break;

		case 3:					/* BGEZL	*/
			ip->op = OPBGEZL;
			ip->r1 = -1;
			ip->r2 = RSRI(inst);
			ip->r3 = -1;
			ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
					(addr+4) + ((inst&0x0000ffff) << 2) );
			branch_shadow = 1;
			break;

		/* 4-7 unused */

		case  8:				/* TGEI		*/
		case  9:				/* TGEIU	*/
		case 10:				/* TLTI		*/
		case 11:				/* TLTIU	*/
		case 12:				/* TEQI		*/
		case 14:				/* TNEI		*/
#ifdef PRINT_WARN
			fprintf (stderr, "Trap instructions not supported\n");
			fprintf (stderr, "Location: 0x%8.8x\n", addr);
#endif
			ip->r1 = ip->r2 = ip->r3 = -1;
			ip->op = OPILL;
			break;

		/* 13, 15 unused */

		case 16:				/* BLTZAL	*/
			ip->op = OPBLTZAL;
			ip->r1 = LP;
			ip->r2 = RSRI(inst);
			ip->r3 = -1;
			ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
				(addr+4) + ((inst&0x0000ffff) << 2) );
			branch_shadow = 1;
			break;

		case 17:				/* BGEZAL	*/
			ip->op = OPBGEZAL;
			ip->r1 = LP;
			ip->r2 = RSRI(inst);
			ip->r3 = -1;
			ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
				(addr+4) + ((inst&0x0000ffff) << 2) );
			branch_shadow = 1;
			break;

		case 18:				/* BLTZALL	*/
			ip->op = OPBLTZALL;
			ip->r1 = LP;
			ip->r2 = RSRI(inst);
			ip->r3 = -1;
			ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
				(addr+4) + ((inst&0x0000ffff) << 2) );
			branch_shadow = 1;
			break;

		case 19:				/* BGEZALL	*/
			ip->op = OPBGEZALL;
			ip->r1 = LP;
			ip->r2 = RSRI(inst);
			ip->r3 = -1;
			ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
				(addr+4) + ((inst&0x0000ffff) << 2) );
			branch_shadow = 1;
			break;

		/* 20 - 31 unused */

		default:
#ifdef PRINT_WARN
			fprintf (stderr, "Illegal instruction (undefined)\n");
			fprintf (stderr, "Location: 0x%8.8x\n", addr);
#endif
			ip->r1 = ip->r2 = ip->r3 = -1;
			ip->op = OPILL;
			break;
		}

	return (branch_shadow);
	}


	/*
	 *  mc_cop1  -  Handle the coprocessor 1 (floating point) opcodes
	 */

int mc_cop1 (uint inst, uint addr, INST *ip)
	{
	int branch_shadow = 0;

	switch ((inst >> 21) & 0x1f)		/* Decode the fmt field	*/
		{
		case 0:					/* MFC1		*/
			ip->op = OPCPYC1;
			ip->r1 = RTRI(inst);
			ip->r2 = FSRI(inst);
			ip->r3 = -1;
			ip->imm = 0;
			break;

		/* 1 unused */

		case 2:					/* CFC1		*/
			ip->op = OPCPYC1;
			ip->r1 = RTRI(inst);
			ip->r2 = ((inst>>11)&0x01) + FPCTL;
			ip->r3 = -1;
			ip->imm = 0;
			if ((inst>>11)&0x01)
				{
				ip->op = CTL_CFC;
				ip->r3 = CNDREG;
				}
			break;

		/* 3 unused */

		case 4:					/* MTC1		*/
			ip->op = OPHCPYC1;
			ip->r1 = FSRI(inst);
			ip->r2 = RTRI(inst);
			ip->r3 = DSRI(inst);
			ip->imm = 0;
			break;

		/* 5 unused */

		case 6:					/* CTC1		*/
			ip->r1 = ((inst>>11)&0x01) + FPCTL;
			ip->r2 = RTRI(inst);
			ip->r3 = FPCTL;
			ip->imm = 0;

			ip->op = (ip->r1 == FPCTL + 1 ? CTL_FPC : OPHCPYC1);
			break;


		/* 7 unused */

		case 8:				/* Conditional branches	*/
			switch ((inst>>16) & 0x1f)
				{
				case 0:
					ip->op = OPBC1F;
					ip->r1 = -1;
					ip->r2 = CNDREG;
					ip->r3 = -1;
					ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
					(addr+4) + ((inst&0x0000ffff) << 2) );
					branch_shadow = 1;
					break;

				case 1:
					ip->op = OPBC1T;
					ip->r1 = -1;
					ip->r2 = CNDREG;
					ip->r3 = -1;
					ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
					(addr+4) + ((inst&0x0000ffff) << 2) );
					branch_shadow = 1;
					break;

				case 2:			/* BC1FL	*/
					ip->op = OPBC1FL;
					ip->r1 = -1;
					ip->r2 = CNDREG;
					ip->r3 = -1;
					ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
					(addr+4) + ((inst&0x0000ffff) << 2) );
					branch_shadow = 1;
					break;

				case 3:			/* BC1TL	*/
					ip->op = OPBC1TL;
					ip->r1 = -1;
					ip->r2 = CNDREG;
					ip->r3 = -1;
					ip->imm = (inst & 0x00008000 ?
			    (addr+4) - ((0x10000 - (inst&0x0000ffff)) << 2) :
					(addr+4) + ((inst&0x0000ffff) << 2) );
					branch_shadow = 1;
					break;

				/* 4 - 31 unused */

				default:
#ifdef PRINT_WARN
					fprintf (stderr,
					"Illegal instruction (undefined)\n");
					fprintf (stderr,
						"Location: 0x%8.8x\n", addr);
#endif
					ip->op = OPILL;
					ip->r1 = ip->r2 = ip->r3 = -1;
					break;
				}
			break;

		/* 9-15 unused */

		case 16:			/* Single precision	*/
			mc_fp_s (inst, addr, ip);
			break;

		case 17:			/* Double precision	*/
			mc_fp_d (inst, addr, ip);
			break;

		/* 18, 19 unused */

		case 20:			/* Fixed point		*/
			switch (inst & 0x3f)
				{
				/* 0 - 31 unused */

				case 32:		/* CVT.S.W	*/
					ip->op = OPCVTSW;
					ip->r1 = FDRI(inst);
					ip->r2 = FSRI(inst);
					ip->r3 = DDRI(inst);
					ip->imm = 0;
					break;

				case 33:		/* CVT.D.W	*/
					ip->op = OPCVTDW;
					ip->r1 = DDRI(inst);
					ip->r2 = FSRI(inst);
					ip->r3 = -1;
					ip->imm = 0;
					break;

				/* 34 - 63 unused */

				default:
#ifdef PRINT_WARN
					fprintf (stderr,
					"Illegal instruction (undefined)\n");
					fprintf (stderr,
						"Location: 0x%8.8x\n", addr);
#endif
					ip->op = OPILL;
					ip->r1 = ip->r2 = ip->r3 = -1;
					break;
				}
			break;

		/* 21 - 31 unused */

		default:
#ifdef PRINT_WARN
			fprintf (stderr, "Illegal instruction (undefined)\n");
			fprintf (stderr, "Location: 0x%8.8x\n", addr);
#endif
			ip->op = OPILL;
			ip->r1 = ip->r2 = ip->r3 = -1;
			break;
		}

	return (branch_shadow);
	}


	/*
	 *  mc_fp_s  -  Single precision floating point operations
	 */