mips_gdb.h

一个用在mips体系结构中的操作系统

/*
 * Copyright (C) 1996-1998 by the Board of Trustees
 *    of Leland Stanford Junior University.
 * 
 * This file is part of the SimOS distribution. 
 * See LICENSE file for terms of the license. 
 *
 */


#ifndef MIPS_GDB_H
#define MIPS_GDB_H

/* For getreg and putreg, you need a mapping from register number
 * to mips register.  This mapping comes from gdb.  The config/mips directory
 * sets up the defines in tm-mips.h and then modifies them in tm-irix3.h.
 *
 * The first 32 values correspond to the integer registers, the second 32
 * to the floating point registers, then there are 7 control registers.
 */

#define GDB_NUM_REGS 71

#define ZERO_REGNUM   0         /* first integer register */
#define RA_REGNUM    31         /* last integer register */
#define FP0_REGNUM   32         /* first floating point register */
#define FP31_REGNUM  63         /* last floating point register */
#define PC_REGNUM    64         /* Contains program counter */
#define CAUSE_REGNUM 65         /* CAUSE register */
#define BAD_REGNUM   66         /* BADVADDR register */
#define HI_REGNUM    67         /* Multiple/divide temp */
#define LO_REGNUM    68         /* ... */
#define FCRCS_REGNUM 69         /* FP control/status */
#define FCRIR_REGNUM 70         /* FP implementation/revision */

/* in the future we will extend gdb to know about more registers.  When
 * we do, it will be nice if the detailed modes can read and set the 
 * following
 */

#define INX_REGNUM   71         /* C0_INX */
#define RAND_REGNUM  72         /* C0_RAND */
#define TLBLO_REGNUM 73         /* C0_TLBLO */
#define CTXT_REGNUM  74         /* C0_CTXT */
#define TLBHI_REGNUM 75         /* C0_TLBHI */
#define SR_REGNUM    76         /* C0_SR */
#define EPC_REGNUM   77         /* C0_EPC */
#define PRID_REGNUM   78        /* C0_PRID*/
#define ERROR_EPC_REGNUM 79     /* C0_ERROR_EPC */
#define COUNT_REGNUM   80	/* C0_COUNT */
#define COMPARE_REGNUM 81	/* C0_COMPARE */
#define TLBLO1_REGNUM  82	/* C0_TLBLO1 */
#define PGMASK_REGNUM  83	/* C0_PGMASK */
#define NPC_REGNUM  100         /* nPC == PC+4, unless we are in delay slot */


#define REGISTER_NAMES { \
   "zero",  "at",    "v0",    "v1", \
   "a0",    "a1",    "a2",    "a3", \
   "t0",    "t1",    "t2",    "t3", \
   "t4",    "t5",    "t6",    "t7", \
   "s0",    "s1",    "s2",    "s3", \
   "s4",    "s5",    "s6",    "s7", \
   "t8",    "t9",    "k0",    "k1", \
   "gp",    "sp",    "fp",    "ra", \
   "fp0",   "fp1",   "fp2",   "fp3",  \
   "fp4",   "fp5",   "fp6",   "fp7",  \
   "fp8",   "fp9",   "fp10",  "fp11",  \
   "fp12",  "fp13",  "fp14",  "fp15",  \
   "fp16",  "fp17",  "fp18",  "fp19",  \
   "fp20",  "fp21",  "fp22",  "fp23",  \
   "fp24",  "fp25",  "fp26",  "fp27",  \
   "fp28",  "fp29",  "fp30",  "fp31", \
   "pc",    "cause", "bad",   "hi", \
   "lo",    "fcrcs", "fcrir", "indx", \
   "rand",  "tlblo", "cntx",  "tlbhi", \
   "sr",    "epc",   "prid",  "error_epc", \
   "count", "compare", "tlblo1", "pgmask", \
   "dfp0",  "dfp2",  "dfp4",  "dfp6", \
   "dfp8",  "dfp10", "dfp12", "dfp14", \
   "dfp16", "dfp18", "dfp20", "dfp22", \
   "dfp24", "dfp26", "dfp28", "dfp30" \
}

#endif