machine_defs.h

一个用在mips体系结构中的操作系统

  /***********************************************************************
   
     machine_defs.h
   
   ***********************************************************************/

  /*************************************************************************
   *                                                                       *
   *               Copyright (C) 1993-1998 Stanford University             *
   *                                                                       *
   *  These coded instructions, statements, and computer programs contain  *
   *  unpublished proprietary information of Stanford University, and      *
   *  are protected by Federal copyright law.  They may not be disclosed   *
   *  to third parties or copied or duplicated in any form, in whole or    *
   *  in part, without the prior written consent of Stanford University.   *
   *                                                                       *
   *************************************************************************/

#ifndef __DPGCC__
#ifndef _HEADER_STACK_
#define _HEADER_STACK_
#endif
#endif

#ifndef _MACHINE_DEFS_H
#define _MACHINE_DEFS_H

/*
 * Created by: Dan Teodosiu, 07/96
 *
 * This header file defines the OS view of the MAGIC service address space
 * and of the device registers.
 *
 * The service address space addresses used by the OS are VIRTUAL addresses.
 * Depending on whether we simulate a 32 bit or a 64 bit processor,
 * the service address mappings will be different. MAGIC physical addresses
 * are 40 bits wide, so in 32 bit mode (current SimOS) we had to squeeze
 * the service address space into less address bits.
 *
 * There are two kinds of macros in this file:
 *
 *  - MAGIC definitions, pertaining to the services offered by the
 *    MAGIC node controller. All these macros start with MAGIC_...,
 *    Those definitions are further subdivided into ones which do not
 *    depend on the address mappings (such as MAGIC register numbers,
 *    error codes, etc.), and ones which do (such as the macros that help
 *    construct MAGIC PPR addresses).
 *    The current simulated MAGIC only supports doubleword accesses.
 *
 *  - devices register definitions, of the form DEV_... These defs
 *    describe the various device registers. Devices are accessed by
 *    performing uncached word (32bit) reads and writes to their registers.
 *
 * Notes:
 *    The macro SIMOS64BIT selects the 64 bit version of those definitions;
 *    by default, you get the 32 bit version. 64 bit is currently not
 *    implemented.
 *
 * Related documents:
 *  - FLASH: Physical Address Layout
 *  - FLASH: PP Software Services
 *  - SimOS to FLASH Physical Address Mapping
 *
 */


/***************************************************************************
 MAGIC defs which do not depend on the virtual -> physical address mapping
 ***************************************************************************/

/** zone numbering for service address space **/

#define MAGIC_ZONE_FRAM_ALIAS       0
#define MAGIC_ZONE_PPR_ALIAS        1
#define MAGIC_ZONE_PPC_ALIAS        2
#define MAGIC_ZONE_FIREWALL         3
#define MAGIC_ZONE_DMAMAP           4
#define MAGIC_ZONE_SWTLB            5
#define MAGIC_ZONE_MISSCNT          6
#define MAGIC_ZONE_NODEMAP          7
#define MAGIC_ZONE_PPR              8
#define MAGIC_ZONE_PPC              9
#define MAGIC_ZONE_MILO_ALIAS       10
#define MAGIC_ZONE_EV5_ALIAS        10
#define MAGIC_ZONE_NODECOMM         11        /* node communication zone */
                                              /* do not def zone 12: see below why */
#define MAGIC_ZONE_MIG_REP          13        /* Zone for per-page cache and write counters */
#define MAGIC_ZONE_BDOOR_DEV        14        /* backdoor area for devices */
#define MAGIC_ZONE_FPROM_ALIAS      15

#ifndef SIMOS64BIT
#undef  MAGIC_ZONE_FPROM_ALIAS                /* In 32bit Simos, 0xbfc00000 maps to... */
#define MAGIC_ZONE_FPROM_ALIAS      12        /* ... zone 12 */
#endif

/** PPR numbering **/

/* Individual MAGIC registers */

#define MAGIC_PPR_IECHIGH            0x0000    /* r */
#define MAGIC_PPR_ACKINTERNAL        0x0001    /* w */
#define MAGIC_PPR_IECENABLE          0x0002    /* r/w */
#define MAGIC_PPR_SENDIPI            0x0003    /* w */
#define MAGIC_PPR_OPSPACE            0x0004    /* r/w */
#define MAGIC_PPR_ASID               0x0005    /* r/w */
#define MAGIC_PPR_TLBINVAL           0x0006    /* w */
#define MAGIC_PPR_TLBINUSE           0x0007    /* r */
#define MAGIC_PPR_MSGTAG             0x0008    /* r/w */
#define MAGIC_PPR_STALLOSPC          0x0009    /* r/w */
#define MAGIC_PPR_CYCLECOUNT         0x000a    /* r */
#define MAGIC_PPR_NETMSGTIME         0x000b    /* r */
#define MAGIC_PPR_SIPSLOACK          0x000c    /* r */
#define MAGIC_PPR_SIPSHIACK          0x000d    /* r */
#define MAGIC_PPR_IECPENDING         0x000e    /* r/w */
#define MAGIC_PPR_RTC                0x000f    /* r */

#define MAGIC_PPR_UNUSED10           0x0010    /* r */
#define MAGIC_PPR_PROTVERSION        0x0011    /* r */
#define MAGIC_PPR_HWVERSION          0x0012    /* r */
#define MAGIC_PPR_REMAPMASK          0x0013    /* r/w */
#define MAGIC_PPR_PROTCONTROL        0x0014    /* r/w */
#define MAGIC_PPR_RESERVED_15        0x0015    /* */
#define MAGIC_PPR_RESERVED_16        0x0016    /* */
#define MAGIC_PPR_RESERVED_17        0x0017    /* */
#define MAGIC_PPR_OUTOFRANGE         0x0018    /* r */
#define MAGIC_PPR_INTERVAL           0x0019    /* r/w */
#define MAGIC_PPR_SLOTMAP            0x001a    /* r/w */
#define    MAGIC_SLOTMAP_SLOT0_OFFS         0
#define    MAGIC_SLOTMAP_SLOT0_MASK         0x00000000000000FFLL
#define    MAGIC_SLOTMAP_SLOT1_OFFS         8
#define    MAGIC_SLOTMAP_SLOT1_MASK         0x000000000000FF00LL
#define    MAGIC_SLOTMAP_SLOT2_OFFS         16
#define    MAGIC_SLOTMAP_SLOT2_MASK         0x0000000000FF0000LL
#define    MAGIC_SLOTMAP_SLOT3_OFFS         24
#define    MAGIC_SLOTMAP_SLOT3_MASK         0x00000000FF000000LL
#define MAGIC_PPR_FWSHIFT            0x001b    /* r/w */
#define MAGIC_PPR_RECOVERYSYNC       0x001c    /* r */
#define    MAGIC_RECOVERYSYNC_PHASE_MASK    0xF000000000000000LL;
#define    MAGIC_RECOVERYSYNC_PHASE_SHIFT   60
#define    MAGIC_RECOVERYSYNC_PHASE_ZERO    (0x0LL << MAGIC_RECOVERYSYNC_PHASE_SHIFT)
#define    MAGIC_RECOVERYSYNC_PHASE_ONE     (0x1LL << MAGIC_RECOVERYSYNC_PHASE_SHIFT)
#define    MAGIC_RECOVERYSYNC_PHASE_TWO     (0x2LL << MAGIC_RECOVERYSYNC_PHASE_SHIFT)
#define    MAGIC_RECOVERYSYNC_PHASE_THREE   (0x3LL << MAGIC_RECOVERYSYNC_PHASE_SHIFT)
#define    MAGIC_RECOVERYSYNC_TIMESTAMP_MASK  0x0FFFFFFFFFFFFFFFLL
#define    MAGIC_RECOVERYSYNC_TIMESTAMP_SHIFT 0
#define MAGIC_PPR_REPORT_DIAG_RESULT 0x001d    /* w */
#define    MAGIC_REPORT_PASS_DIAG           0  /* other values indicate fail */
#define MAGIC_PPR_RESERVED_1E        0x001e    /* w */
#define MAGIC_PPR_DRAIN_POLL         0x001f    /* r */

#define MAGIC_PPR_NODECONFIG         0x0020    /* r */
#define    MAGIC_NODECONFIG_THISNODE_OFFS    0
#define    MAGIC_NODECONFIG_THISNODE_MASK    0x0000000000000fffLL
#define    MAGIC_NODECONFIG_FIRSTNODE_OFFS   12
#define    MAGIC_NODECONFIG_FIRSTNODE_MASK   0x0000000000fff000LL
#define    MAGIC_NODECONFIG_NODESINCELL_OFFS 24
#define    MAGIC_NODECONFIG_NODESINCELL_MASK 0x0000000fff000000LL
#define    MAGIC_NODECONFIG_THISCELL_OFFS    36
#define    MAGIC_NODECONFIG_THISCELL_MASK    0x0000fff000000000LL
#define    MAGIC_NODECONFIG_NCELLS_OFFS      48
#define    MAGIC_NODECONFIG_NCELLS_MASK      0x0fff000000000000LL

#define    MAGIC_NODECONFIG_THISNODE(val)                                  \
 (((val)&MAGIC_NODECONFIG_THISNODE_MASK)>>MAGIC_NODECONFIG_THISNODE_OFFS)
#define    MAGIC_NODECONFIG_FIRSTNODE(val)                                 \
 (((val)&MAGIC_NODECONFIG_FIRSTNODE_MASK)>>MAGIC_NODECONFIG_FIRSTNODE_OFFS)
#define    MAGIC_NODECONFIG_NODESINCELL(val)                               \
 (((val)&MAGIC_NODECONFIG_NODESINCELL_MASK)>>MAGIC_NODECONFIG_NODESINCELL_OFFS)
#define    MAGIC_NODECONFIG_THISCELL(val)                                  \
 (((val)&MAGIC_NODECONFIG_THISCELL_MASK)>>MAGIC_NODECONFIG_THISCELL_OFFS)
#define    MAGIC_NODECONFIG_NCELLS(val)                                    \
 (((val)&MAGIC_NODECONFIG_NCELLS_MASK)>>MAGIC_NODECONFIG_NCELLS_OFFS)

#define MAGIC_PPR_ADDRCONFIG         0x0021    /* r */
#define    MAGIC_ADDRCONFIG_PAGES_OFFS       0
#define    MAGIC_ADDRCONFIG_PAGES_MASK       0x0000ffffffffLL
#define    MAGIC_ADDRCONFIG_NNBITS_OFFS      32
#define    MAGIC_ADDRCONFIG_NNBITS_MASK      0x00ff00000000LL
#define    MAGIC_ADDRCONFIG_MASBITS_OFFS     40
#define    MAGIC_ADDRCONFIG_MASBITS_MASK     0xff0000000000LL

#define    MAGIC_ADDRCONFIG_PAGES(val) \
 (((val)&MAGIC_ADDRCONFIG_PAGES_MASK)>>MAGIC_ADDRCONFIG_PAGES_OFFS)
#define    MAGIC_ADDRCONFIG_NNBITS(val)                                    \
 (((val)&MAGIC_ADDRCONFIG_NNBITS_MASK)>>MAGIC_ADDRCONFIG_NNBITS_OFFS)
#define    MAGIC_ADDRCONFIG_MASBITS(val)                                   \
 (((val)&MAGIC_ADDRCONFIG_MASBITS_MASK)>>MAGIC_ADDRCONFIG_MASBITS_OFFS)

/* PPR for getting "hot" pages i.e. pages that reached threshold 
 * for cache-miss counting
 */
#define MAGIC_PPR_MIG_REP              0x03e
#define MIGREP_NULLPAGE                0xffffffff

/* OSPC mirror in uncached space (used by FPROM) */
#define MAGIC_PPR_OSPC               0x1000    /* r */


/** PPC error codes **/

#define MAGIC_PPC_NOT_SUCCESSFUL_BIT   0x8000000000000000LL /* set for error */
/* these return values should be ORed with the "not successful" bit */
#define MAGIC_PPC_RETRY_CODE           0x00   /* please retry request (default) */
#define MAGIC_PPC_BADGROUP             0x01   /* PPC group was invalid */
#define MAGIC_PPC_BADOPCODE            0x02   /* PPC opcode was invalid */
#define MAGIC_PPC_ARGOUTOFRANGE        0x03   /* some arg to the PPC was bad */
#define MAGIC_PPC_BUSY                 0x04   /* operation needed some local
					       * resource that was unavail */
#define MAGIC_PPC_REMOTEBUSY           0x05   /* operation needed some remote
					       * resource that was unavail */
#define MAGIC_PPC_REMOTEDEAD           0x06   /* destination node is marked
					       * as bad in the nodemap */
/* these results indicate the request cannot be serviced, and it should
   not be retried.  The interpretation of these is protocol-dependent
   One example is: the physical pages are remote.  The application
   can't know this, but the sequence was otherwise valid.  If a protocol
   can't handle remote pages, this is a possibility. So, e.g. fmemcpy
   uses PROT_FAIL1 to indicate it can't handle the pages.  See the
   individual _interface files to describe the interpretation*/
#define MAGIC_PPC_PROT_FAIL1           0x11
#define MAGIC_PPC_PROT_FAIL2           0x12
#define MAGIC_PPC_PROT_FAIL3           0x13
#define MAGIC_PPC_RETRY                (MAGIC_PPC_NOT_SUCCESSFUL_BIT|MAGIC_PPC_RETRY_CODE)

/** PPC groups **/

#define MAGIC_PPC_GROUP_KERNEL       0x000
#define MAGIC_PPC_GROUP_MSG          0x001

/** kernel group opcodes **/

#define MAGIC_PPC_OP_SIPSLO          0x000
#define MAGIC_PPC_OP_SIPSHI          0x001
#define MAGIC_PPC_OP_MEMCPY          0x002
#define MAGIC_PPC_OP_IBITWRITE       0x003
#define MAGIC_PPC_OP_IBITREAD        0x004
#define MAGIC_PPC_OP_DONATE          0x005
#define MAGIC_PPC_OP_RESETPOOL       0x006
#define MAGIC_PPC_OP_LOADSTATE       0x007
#define MAGIC_PPC_OP_STORESTATE      0x008
#define MAGIC_PPC_OP_MEMRESET        0x009
#define MAGIC_PPC_OP_VECTORPKT       0x00A
#define MAGIC_PPC_OP_BZERO           0x00B
/* HLL/Diag opcodes within kernel region */
#define MAGIC_PPC_OP_PRINTF1         0x00C
/* config info opcodes within kernel region */
/* note: result has same format as MAGIC_PPR_NODECONFIG and
 *       MAGIC_PPR_ADDRCONFIG PPR's.
 */
#define MAGIC_PPC_OP_CELLNODECONFIG  0x010
#define MAGIC_PPC_OP_NODEADDRCONFIG  0x011
#define MAGIC_PPC_OP_STARTSLAVENODE  0x012

/** msg group opcodes **/
#define MAGIC_PPC_OP_MEMCPY_V        0x000
#define MAGIC_PPC_OP_SIPS_V          0x001
#define MAGIC_PPC_OP_BZERO_V         0x002


/** OSPC defs **/

/* OSPC opcodes (generated by MAGIC, read by the OS).
 *
 * Contain the opcode of the OSPC and (for incoming SIPS) the CPU that
 * originated the message. The latter helps to authenticate SIPS and is
 * the only realiable information for truncated SIPS.
 */
#define MAGIC_OSPC_OPCODE_MASK       0x00000000000000ffLL
#define MAGIC_OSPC_OPCODE_OFFS       0
#define MAGIC_OSPC_ORIG_MASK         0x0000ffff00000000LL
#define MAGIC_OSPC_ORIG_OFFS         32

#define MAGIC_OSPC_OPCODE(_v)        ( ((_v) & MAGIC_OSPC_OPCODE_MASK) >> \
				       MAGIC_OSPC_OPCODE_OFFS )
#define MAGIC_OSPC_ORIG(_v)          ( ((_v) & MAGIC_OSPC_ORIG_MASK) >>   \
				       MAGIC_OSPC_ORIG_OFFS )

/* low-priority SIPS */
#define MAGIC_OSPC_LO_NONE           0xff     /* no OSPC pending */
#define MAGIC_OSPC_LO_SIPSREQ        0x01     /* lopri SIPS pending */
#define MAGIC_OSPC_LO_CACHECTR       0x02     /* ??? */
/* high-priority SIPS */
#define MAGIC_OSPC_HI_NONE           0xff     /* no OSPC pending */
#define MAGIC_OSPC_HI_SIPSREPLY      0x81     /* hipri SIPS pending */
#define MAGIC_OSPC_HI_TLBMISS        0x82     /* ??? */

/* vector request packets used during recovery */
#define MAGIC_OSPC_VEC_REQ_NONE      0xff
#define MAGIC_OSPC_VEC_REQ           0xd1
/* vector reply packets used during recovery */
#define MAGIC_OSPC_VEC_REP_NONE      0xff
#define MAGIC_OSPC_VEC_REP           0xe1

/* OSPC offsets */
#define MAGIC_OSPC_SIZE              128      /* OSPC size == 1 cache line */

#define MAGIC_OSPC_LO_OFFS           0*MAGIC_OSPC_SIZE /* lopri SIPS */
#define MAGIC_OSPC_HI_OFFS           1*MAGIC_OSPC_SIZE /* hipri SIPS */
#define MAGIC_OSPC_VEC_REQ_OFFS      2*MAGIC_OSPC_SIZE /* VP request */
#define MAGIC_OSPC_VEC_REP_OFFS      3*MAGIC_OSPC_SIZE /* VP reply   */

/***************************************************************************
 MAGIC defs which reflect the virtual -> physical address mapping
 ***************************************************************************/

/* auxiliary defs -- ONLY FOR INTERNAL USE IN THIS FILE */

#ifndef SIMOS64BIT     /* 32 bit address space (current SimOS version) */

/* virtual addresses for start of FPROM and FRAM */
#define FPROM_BASE _SEXT(0xbfc00000)
#define FRAM_BASE  _SEXT(0xa0000000)

#ifdef _KERNEL
#define __MAGIC_BASE                COMPAT_K1BASE /* KSEG1 */
#define __MAGIC_BASE_ACC            COMPAT_K1BASE /* still KSEG1 */
#else
#define __MAGIC_BASE                K1BASE /* KSEG1 */
#define __MAGIC_BASE_ACC            K1BASE /* still KSEG1 */
#endif
#define __MAGIC_OSPC_BASE           (K0BASE+0x1000) /* OSPC right after remap */
#define __MAGIC_OSPC_END            (K0BASE+0x2000) /* 1 page-alias for each node */

#define __MAGIC_NODE_BITS           5  /* max. 32 nodes */
#define __MAGIC_NODE_OFFS           24

#define __MAGIC_ZONE_BITS           4  /* 16 zones / node */
#define __MAGIC_ZONE_OFFS           20 /* 1MB / zone */

#define __MAGIC_REG_BITS            17
#define __MAGIC_REG_OFFS            3  /* registers are 64bit */

#define __MAGIC_PPC_SEQ_BITS        7  /* one cache line */
#define __MAGIC_PPC_SEQ_OFFS        0
#define __MAGIC_PPC_OPC_BITS        5  /* group corresponds to a 4K page */