iap3300.sum

尽量朝“单片”方向设计硬件系统。系统器件越多

***********************************************************************
                         PSDsoft Express Version 8.10
                         Summary of Design Assistant
***********************************************************************
PROJECT    : iap3300                       DATE : 05/03/2004
DEVICE     : uPSD3334D                     TIME : 12:12:49
MCU/DSP    : uPSD33XX    
***********************************************************************

Initial setting for Program and Data Space:
===========================================

  Main PSD flash memory will reside in this space at power-up:      Data Space Only
  Secondary PSD flash memory will reside in this space at power-up: Program Space Only

Pin Definitions:
================

Pin          Signal                    Pin
Name         Name                      Type
------------ ------------------------- ------------
pa7          pa7                       Peripheral I/O mode
pa6          pa6                       Peripheral I/O mode
pa5          pa5                       Peripheral I/O mode
pa4          pa4                       Peripheral I/O mode
pa3          pa3                       Peripheral I/O mode
pa2          pa2                       Peripheral I/O mode
pa1          pa1                       Peripheral I/O mode
pa0          pa0                       Peripheral I/O mode
pb7          LCD_e                     External chip select - Active Hi
pb6          LCD_a1                    Combinatorial
pb5          LCD_a0                    Combinatorial
pb3          En_EB                     Logic or address
pb2          En_EA                     Logic or address
pb1          En_DirOut                 Combinatorial
pb0          En_PulseOut               Combinatorial
tdo          tdo                       Dedicated JTAG - TDO
tdi          tdi                       Dedicated JTAG - TDI
tck          tck                       Dedicated JTAG - TCK
tms          tms                       Dedicated JTAG - TMS
ale          ale                       ALE output  
_psen        _psen                     Bus control output
_rd          _rd                       Bus control output
_wr          _wr                       Bus control output
a11          a11                       Address line
a10          a10                       Address line
a9           a9                        Address line
a8           a8                        Address line
ad7          a7                        Data/Address line
ad6          a6                        Data/Address line
ad5          a5                        Data/Address line
ad4          a4                        Data/Address line
ad3          a3                        Data/Address line
ad2          a2                        Data/Address line
ad1          a1                        Data/Address line
ad0          a0                        Data/Address line
debug        JTAG_debug_pin            JTAG debug pin
Xtal1        Xtal1                     Xtal1       
Xtal2        Xtal2                     Xtal2       
_Reset_In    _Reset_In                 Reset In    
Vref         VREF                      VREF input  

User defined nodes:
===================

Node         Node
Name         Type
------------ ------------
En_counter0  D-type register
En_PA        D-type register
En_PB        D-type register
En_Dir       D-type register

Page Register settings:
=======================

pgr0 is used for paging
pgr1 is used for paging
pgr2 is used for paging
pgr3 is not used
pgr4 is not used
pgr5 is not used
pgr6 is not used
pgr7 is not used

Equations:
==========

rs0 = ((address >= ^h2000) & (address <= ^h3FFF));
csiop = ((address >= ^h0200) & (address <= ^h02FF));
fs0 = ((address >= ^h0000) & (address <= ^h1FFF))
     # ((page == 0) & (address >= ^h8000) & (address <= ^hFFFF));
fs1 = ((page == 1) & (address >= ^h8000) & (address <= ^hFFFF));
fs2 = ((page == 2) & (address >= ^h8000) & (address <= ^hFFFF));
fs3 = ((page == 3) & (address >= ^h8000) & (address <= ^hFFFF));
fs4 = ((page == 4) & (address >= ^h8000) & (address <= ^hFFFF));
fs5 = ((page == 5) & (address >= ^h8000) & (address <= ^hFFFF));
fs6 = ((page == 6) & (address >= ^h8000) & (address <= ^hFFFF));
fs7 = ((page == 7) & (address >= ^h8000) & (address <= ^hFFFF));
csboot0 = ((address >= ^h0000) & (address <= ^h1FFF))
     # ((page == 0) & (address >= ^h8000) & (address <= ^h9FFF));
csboot1 = ((page == 0) & (address >= ^hA000) & (address <= ^hBFFF));
csboot2 = ((page == 0) & (address >= ^hC000) & (address <= ^hDFFF));
csboot3 = ((page == 0) & (address >= ^hE000) & (address <= ^hFFFF));
psel0 = ((address >= ^h0300) & (address <= ^h03FF) & (_psen));
LCD_e = ((address >= ^h0300) & (address <= ^h03FF) & (!_wr))
     # ((address >= ^h0300) & (address <= ^h03FF) & (!_rd));
LCD_a1 = a1;
LCD_a1.oe = Vcc;
LCD_a0 = a0;
LCD_a0.oe = Vcc;
En_DirOut = En_Dir;
En_DirOut.oe = Vcc;
En_PulseOut = En_PA& En_PB;
En_PulseOut.oe = Vcc;
En_counter0.ck = !(En_PA & En_PB);
En_counter0.re = !_reset;
En_counter0.pr = Gnd;
En_PA := Vcc;
En_PA.ck = Vcc;
En_PA.re = !(En_EA #( !En_EB));
En_PA.pr = En_EA &( !En_EB);
En_PB := Vcc;
En_PB.ck = Vcc;
En_PB.re = !(En_EA # En_EB);
En_PB.pr = En_EA & En_EB;
En_Dir := En_EB;
En_Dir.ck = !(En_PA & En_PB);
En_Dir.re = !_reset;
En_Dir.pr = Gnd;